mirror of
https://github.com/betaflight/betaflight.git
synced 2025-07-17 13:25:30 +03:00
Add PG for 4Bit SDIO, fix whitespaces.
This commit is contained in:
parent
aa8d6b3676
commit
cdb4c1ef44
5 changed files with 399 additions and 352 deletions
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@ -341,8 +341,11 @@ static SD_Error_t SD_CmdResponse(uint8_t SD_CMD, int8_t ResponseType)
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uint32_t TimeOut;
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uint32_t TimeOut;
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uint32_t Flag;
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uint32_t Flag;
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if(ResponseType == -1) Flag = SDIO_STA_CMDSENT;
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if(ResponseType == -1) {
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else Flag = SDIO_STA_CCRCFAIL | SDIO_STA_CMDREND | SDIO_STA_CTIMEOUT;
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Flag = SDIO_STA_CMDSENT;
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} else {
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Flag = SDIO_STA_CCRCFAIL | SDIO_STA_CMDREND | SDIO_STA_CTIMEOUT;
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}
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TimeOut = SD_SOFTWARE_COMMAND_TIMEOUT;
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TimeOut = SD_SOFTWARE_COMMAND_TIMEOUT;
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do
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do
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@ -354,20 +357,34 @@ static SD_Error_t SD_CmdResponse(uint8_t SD_CMD, int8_t ResponseType)
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if(ResponseType <= 0)
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if(ResponseType <= 0)
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{
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{
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if(TimeOut == 0) return SD_CMD_RSP_TIMEOUT;
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if(TimeOut == 0) {
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else return SD_OK;
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return SD_CMD_RSP_TIMEOUT;
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} else {
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return SD_OK;
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}
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}
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}
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if((SDIO->STA & SDIO_STA_CTIMEOUT) != 0) return SD_CMD_RSP_TIMEOUT;
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if((SDIO->STA & SDIO_STA_CTIMEOUT) != 0) {
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return SD_CMD_RSP_TIMEOUT;
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}
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if(ResponseType == 3)
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if(ResponseType == 3)
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{
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{
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if(TimeOut == 0) return SD_CMD_RSP_TIMEOUT; // Card is not V2.0 compliant or card does not support the set voltage range
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if(TimeOut == 0) {
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else return SD_OK; // Card is SD V2.0 compliant
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return SD_CMD_RSP_TIMEOUT; // Card is not V2.0 compliant or card does not support the set voltage range
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} else {
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return SD_OK; // Card is SD V2.0 compliant
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}
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}
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}
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if((SDIO->STA & SDIO_STA_CCRCFAIL) != 0) return SD_CMD_CRC_FAIL;
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if((SDIO->STA & SDIO_STA_CCRCFAIL) != 0) {
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if(ResponseType == 2) return SD_OK;
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return SD_CMD_CRC_FAIL;
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if((uint8_t)SDIO->RESPCMD != SD_CMD) return SD_ILLEGAL_CMD; // Check if response is of desired command
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}
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if(ResponseType == 2) {
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return SD_OK;
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}
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if((uint8_t)SDIO->RESPCMD != SD_CMD) {
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return SD_ILLEGAL_CMD; // Check if response is of desired command
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}
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Response_R1 = SDIO->RESP1; // We have received response, retrieve it for analysis
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Response_R1 = SDIO->RESP1; // We have received response, retrieve it for analysis
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@ -381,9 +398,15 @@ static SD_Error_t SD_CmdResponse(uint8_t SD_CMD, int8_t ResponseType)
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{
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{
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SD_CardRCA = Response_R1;
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SD_CardRCA = Response_R1;
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}
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}
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if((Response_R1 & SD_R6_GENERAL_UNKNOWN_ERROR) == SD_R6_GENERAL_UNKNOWN_ERROR) return SD_GENERAL_UNKNOWN_ERROR;
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if((Response_R1 & SD_R6_GENERAL_UNKNOWN_ERROR) == SD_R6_GENERAL_UNKNOWN_ERROR) {
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if((Response_R1 & SD_R6_ILLEGAL_CMD) == SD_R6_ILLEGAL_CMD) return SD_ILLEGAL_CMD;
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return SD_GENERAL_UNKNOWN_ERROR;
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if((Response_R1 & SD_R6_COM_CRC_FAILED) == SD_R6_COM_CRC_FAILED) return SD_COM_CRC_FAILED;
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}
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if((Response_R1 & SD_R6_ILLEGAL_CMD) == SD_R6_ILLEGAL_CMD) {
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return SD_ILLEGAL_CMD;
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}
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if((Response_R1 & SD_R6_COM_CRC_FAILED) == SD_R6_COM_CRC_FAILED) {
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return SD_COM_CRC_FAILED;
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}
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}
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}
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return SD_OK;
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return SD_OK;
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@ -1573,21 +1596,21 @@ void SD_Initialize_LL(DMA_Stream_TypeDef *dma)
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//Configure Pins
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//Configure Pins
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RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN | RCC_AHB1ENR_GPIODEN;
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RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN | RCC_AHB1ENR_GPIODEN;
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uint8_t is4BitWidth = sdioConfig()->use4BitWidth;
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const IO_t d0 = IOGetByTag(IO_TAG(PC8));
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const IO_t d0 = IOGetByTag(IO_TAG(PC8));
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#ifndef USE_SDIO_1BIT
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const IO_t d1 = IOGetByTag(IO_TAG(PC9));
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const IO_t d1 = IOGetByTag(IO_TAG(PC9));
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const IO_t d2 = IOGetByTag(IO_TAG(PC10));
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const IO_t d2 = IOGetByTag(IO_TAG(PC10));
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const IO_t d3 = IOGetByTag(IO_TAG(PC11));
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const IO_t d3 = IOGetByTag(IO_TAG(PC11));
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#endif
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const IO_t clk = IOGetByTag(IO_TAG(PC12));
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const IO_t clk = IOGetByTag(IO_TAG(PC12));
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const IO_t cmd = IOGetByTag(IO_TAG(PD2));
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const IO_t cmd = IOGetByTag(IO_TAG(PD2));
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IOInit(d0, OWNER_SDCARD, 0);
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IOInit(d0, OWNER_SDCARD, 0);
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#ifndef USE_SDIO_1BIT
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if (is4BitWidth) {
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IOInit(d1, OWNER_SDCARD, 0);
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IOInit(d1, OWNER_SDCARD, 0);
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IOInit(d2, OWNER_SDCARD, 0);
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IOInit(d2, OWNER_SDCARD, 0);
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IOInit(d3, OWNER_SDCARD, 0);
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IOInit(d3, OWNER_SDCARD, 0);
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#endif
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}
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IOInit(clk, OWNER_SDCARD, 0);
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IOInit(clk, OWNER_SDCARD, 0);
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IOInit(cmd, OWNER_SDCARD, 0);
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IOInit(cmd, OWNER_SDCARD, 0);
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@ -1596,11 +1619,11 @@ void SD_Initialize_LL(DMA_Stream_TypeDef *dma)
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#define SDIO_CLK IO_CONFIG(GPIO_Mode_AF, GPIO_Speed_100MHz, GPIO_OType_PP, GPIO_PuPd_NOPULL)
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#define SDIO_CLK IO_CONFIG(GPIO_Mode_AF, GPIO_Speed_100MHz, GPIO_OType_PP, GPIO_PuPd_NOPULL)
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IOConfigGPIOAF(d0, SDIO_DATA, GPIO_AF_SDIO);
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IOConfigGPIOAF(d0, SDIO_DATA, GPIO_AF_SDIO);
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#ifndef USE_SDIO_1BIT
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if (is4BitWidth) {
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IOConfigGPIOAF(d1, SDIO_DATA, GPIO_AF_SDIO);
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IOConfigGPIOAF(d1, SDIO_DATA, GPIO_AF_SDIO);
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IOConfigGPIOAF(d2, SDIO_DATA, GPIO_AF_SDIO);
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IOConfigGPIOAF(d2, SDIO_DATA, GPIO_AF_SDIO);
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IOConfigGPIOAF(d3, SDIO_DATA, GPIO_AF_SDIO);
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IOConfigGPIOAF(d3, SDIO_DATA, GPIO_AF_SDIO);
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#endif
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}
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IOConfigGPIOAF(clk, SDIO_CLK, GPIO_AF_SDIO);
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IOConfigGPIOAF(clk, SDIO_CLK, GPIO_AF_SDIO);
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IOConfigGPIOAF(cmd, SDIO_CMD, GPIO_AF_SDIO);
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IOConfigGPIOAF(cmd, SDIO_CMD, GPIO_AF_SDIO);
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@ -1684,12 +1707,11 @@ bool SD_Init(void)
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if(ErrorState == SD_OK)
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if(ErrorState == SD_OK)
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{
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{
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// Enable wide operation
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// Enable wide operation
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#ifdef USE_SDIO_1BIT
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if (sdioConfig()->use4BitWidth) {
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ErrorState = SD_WideBusOperationConfig(SD_BUS_WIDE_1B);
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#else
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ErrorState = SD_WideBusOperationConfig(SD_BUS_WIDE_4B);
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ErrorState = SD_WideBusOperationConfig(SD_BUS_WIDE_4B);
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#endif
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} else {
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ErrorState = SD_WideBusOperationConfig(SD_BUS_WIDE_1B);
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}
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if (ErrorState == SD_OK && sdioConfig()->clockBypass) {
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if (ErrorState == SD_OK && sdioConfig()->clockBypass) {
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if (SD_HighSpeed()) {
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if (SD_HighSpeed()) {
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SDIO->CLKCR |= SDIO_CLKCR_BYPASS;
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SDIO->CLKCR |= SDIO_CLKCR_BYPASS;
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@ -336,8 +336,11 @@ static SD_Error_t SD_CmdResponse(uint8_t SD_CMD, int8_t ResponseType)
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uint32_t TimeOut;
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uint32_t TimeOut;
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uint32_t Flag;
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uint32_t Flag;
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if(ResponseType == -1) Flag = SDMMC_STA_CMDSENT;
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if(ResponseType == -1) {
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else Flag = SDMMC_STA_CCRCFAIL | SDMMC_STA_CMDREND | SDMMC_STA_CTIMEOUT;
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Flag = SDMMC_STA_CMDSENT;
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} else {
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Flag = SDMMC_STA_CCRCFAIL | SDMMC_STA_CMDREND | SDMMC_STA_CTIMEOUT;
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}
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TimeOut = SD_SOFTWARE_COMMAND_TIMEOUT;
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TimeOut = SD_SOFTWARE_COMMAND_TIMEOUT;
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do
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do
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@ -349,20 +352,34 @@ static SD_Error_t SD_CmdResponse(uint8_t SD_CMD, int8_t ResponseType)
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if(ResponseType <= 0)
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if(ResponseType <= 0)
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{
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{
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if(TimeOut == 0) return SD_CMD_RSP_TIMEOUT;
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if(TimeOut == 0){
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else return SD_OK;
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return SD_CMD_RSP_TIMEOUT;
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} else {
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return SD_OK;
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}
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}
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}
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if((SDMMC1->STA & SDMMC_STA_CTIMEOUT) != 0) return SD_CMD_RSP_TIMEOUT;
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if((SDMMC1->STA & SDMMC_STA_CTIMEOUT) != 0) {
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return SD_CMD_RSP_TIMEOUT;
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}
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if(ResponseType == 3)
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if(ResponseType == 3)
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{
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{
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if(TimeOut == 0) return SD_CMD_RSP_TIMEOUT; // Card is not V2.0 compliant or card does not support the set voltage range
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if(TimeOut == 0) {
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else return SD_OK; // Card is SD V2.0 compliant
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return SD_CMD_RSP_TIMEOUT; // Card is not V2.0 compliant or card does not support the set voltage range
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} else {
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return SD_OK; // Card is SD V2.0 compliant
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}
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}
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}
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if((SDMMC1->STA & SDMMC_STA_CCRCFAIL) != 0) return SD_CMD_CRC_FAIL;
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if((SDMMC1->STA & SDMMC_STA_CCRCFAIL) != 0) {
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if(ResponseType == 2) return SD_OK;
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return SD_CMD_CRC_FAIL;
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if((uint8_t)SDMMC1->RESPCMD != SD_CMD) return SD_ILLEGAL_CMD; // Check if response is of desired command
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}
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if(ResponseType == 2) {
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return SD_OK;
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}
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if((uint8_t)SDMMC1->RESPCMD != SD_CMD) {
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return SD_ILLEGAL_CMD; // Check if response is of desired command
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}
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Response_R1 = SDMMC1->RESP1; // We have received response, retrieve it for analysis
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Response_R1 = SDMMC1->RESP1; // We have received response, retrieve it for analysis
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@ -376,9 +393,15 @@ static SD_Error_t SD_CmdResponse(uint8_t SD_CMD, int8_t ResponseType)
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{
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{
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SD_CardRCA = Response_R1;
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SD_CardRCA = Response_R1;
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}
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}
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if((Response_R1 & SD_R6_GENERAL_UNKNOWN_ERROR) == SD_R6_GENERAL_UNKNOWN_ERROR) return SD_GENERAL_UNKNOWN_ERROR;
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if((Response_R1 & SD_R6_GENERAL_UNKNOWN_ERROR) == SD_R6_GENERAL_UNKNOWN_ERROR) {
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if((Response_R1 & SD_R6_ILLEGAL_CMD) == SD_R6_ILLEGAL_CMD) return SD_ILLEGAL_CMD;
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return SD_GENERAL_UNKNOWN_ERROR;
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if((Response_R1 & SD_R6_COM_CRC_FAILED) == SD_R6_COM_CRC_FAILED) return SD_COM_CRC_FAILED;
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}
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if((Response_R1 & SD_R6_ILLEGAL_CMD) == SD_R6_ILLEGAL_CMD) {
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return SD_ILLEGAL_CMD;
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}
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if((Response_R1 & SD_R6_COM_CRC_FAILED) == SD_R6_COM_CRC_FAILED) {
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return SD_COM_CRC_FAILED;
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}
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}
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}
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return SD_OK;
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return SD_OK;
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@ -1571,21 +1594,21 @@ void SD_Initialize_LL(DMA_Stream_TypeDef *dma)
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//Configure Pins
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//Configure Pins
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RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN | RCC_AHB1ENR_GPIODEN;
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RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN | RCC_AHB1ENR_GPIODEN;
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uint8_t is4BitWidth = sdioConfig()->use4BitWidth;
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const IO_t d0 = IOGetByTag(IO_TAG(PC8));
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const IO_t d0 = IOGetByTag(IO_TAG(PC8));
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#ifndef USE_SDIO_1BIT
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const IO_t d1 = IOGetByTag(IO_TAG(PC9));
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const IO_t d1 = IOGetByTag(IO_TAG(PC9));
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const IO_t d2 = IOGetByTag(IO_TAG(PC10));
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const IO_t d2 = IOGetByTag(IO_TAG(PC10));
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const IO_t d3 = IOGetByTag(IO_TAG(PC11));
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const IO_t d3 = IOGetByTag(IO_TAG(PC11));
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#endif
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const IO_t clk = IOGetByTag(IO_TAG(PC12));
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const IO_t clk = IOGetByTag(IO_TAG(PC12));
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const IO_t cmd = IOGetByTag(IO_TAG(PD2));
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const IO_t cmd = IOGetByTag(IO_TAG(PD2));
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IOInit(d0, OWNER_SDCARD, 0);
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IOInit(d0, OWNER_SDCARD, 0);
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#ifndef USE_SDIO_1BIT
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if (is4BitWidth) {
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IOInit(d1, OWNER_SDCARD, 0);
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IOInit(d1, OWNER_SDCARD, 0);
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IOInit(d2, OWNER_SDCARD, 0);
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IOInit(d2, OWNER_SDCARD, 0);
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IOInit(d3, OWNER_SDCARD, 0);
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IOInit(d3, OWNER_SDCARD, 0);
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#endif
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}
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IOInit(clk, OWNER_SDCARD, 0);
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IOInit(clk, OWNER_SDCARD, 0);
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IOInit(cmd, OWNER_SDCARD, 0);
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IOInit(cmd, OWNER_SDCARD, 0);
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@ -1594,11 +1617,11 @@ void SD_Initialize_LL(DMA_Stream_TypeDef *dma)
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#define SDMMC_CLK IO_CONFIG(GPIO_MODE_AF_PP, GPIO_SPEED_FREQ_VERY_HIGH, GPIO_NOPULL)
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#define SDMMC_CLK IO_CONFIG(GPIO_MODE_AF_PP, GPIO_SPEED_FREQ_VERY_HIGH, GPIO_NOPULL)
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IOConfigGPIOAF(d0, SDMMC_DATA, GPIO_AF12_SDMMC1);
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IOConfigGPIOAF(d0, SDMMC_DATA, GPIO_AF12_SDMMC1);
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#ifndef USE_SDIO_1BIT
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if(is4BitWidth) {
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IOConfigGPIOAF(d1, SDMMC_DATA, GPIO_AF12_SDMMC1);
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IOConfigGPIOAF(d1, SDMMC_DATA, GPIO_AF12_SDMMC1);
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IOConfigGPIOAF(d2, SDMMC_DATA, GPIO_AF12_SDMMC1);
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IOConfigGPIOAF(d2, SDMMC_DATA, GPIO_AF12_SDMMC1);
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IOConfigGPIOAF(d3, SDMMC_DATA, GPIO_AF12_SDMMC1);
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IOConfigGPIOAF(d3, SDMMC_DATA, GPIO_AF12_SDMMC1);
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#endif
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}
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IOConfigGPIOAF(clk, SDMMC_CLK, GPIO_AF12_SDMMC1);
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IOConfigGPIOAF(clk, SDMMC_CLK, GPIO_AF12_SDMMC1);
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IOConfigGPIOAF(cmd, SDMMC_CMD, GPIO_AF12_SDMMC1);
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IOConfigGPIOAF(cmd, SDMMC_CMD, GPIO_AF12_SDMMC1);
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@ -1680,12 +1703,11 @@ bool SD_Init(void)
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if(ErrorState == SD_OK)
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if(ErrorState == SD_OK)
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{
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{
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// Enable wide operation
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// Enable wide operation
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#ifdef USE_SDIO_1BIT
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if (sdioConfig()->use4BitWidth) {
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ErrorState = SD_WideBusOperationConfig(SD_BUS_WIDE_1B);
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#else
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ErrorState = SD_WideBusOperationConfig(SD_BUS_WIDE_4B);
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ErrorState = SD_WideBusOperationConfig(SD_BUS_WIDE_4B);
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#endif
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} else {
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ErrorState = SD_WideBusOperationConfig(SD_BUS_WIDE_1B);
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}
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}
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}
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// Configure the SDCARD device
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// Configure the SDCARD device
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@ -990,6 +990,7 @@ const clivalue_t valueTable[] = {
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#ifdef USE_SDCARD_SDIO
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#ifdef USE_SDCARD_SDIO
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{ "sdio_clk_bypass", VAR_UINT8 | MASTER_VALUE | MODE_LOOKUP, .config.lookup = { TABLE_OFF_ON }, PG_SDIO_CONFIG, offsetof(sdioConfig_t, clockBypass) },
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{ "sdio_clk_bypass", VAR_UINT8 | MASTER_VALUE | MODE_LOOKUP, .config.lookup = { TABLE_OFF_ON }, PG_SDIO_CONFIG, offsetof(sdioConfig_t, clockBypass) },
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{ "sdio_use_cache", VAR_UINT8 | MASTER_VALUE | MODE_LOOKUP, .config.lookup = { TABLE_OFF_ON }, PG_SDIO_CONFIG, offsetof(sdioConfig_t, useCache) },
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{ "sdio_use_cache", VAR_UINT8 | MASTER_VALUE | MODE_LOOKUP, .config.lookup = { TABLE_OFF_ON }, PG_SDIO_CONFIG, offsetof(sdioConfig_t, useCache) },
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{ "sdio_use_4bit_width", VAR_UINT8 | MASTER_VALUE | MODE_LOOKUP, .config.lookup = { TABLE_OFF_ON }, PG_SDIO_CONFIG, offsetof(sdioConfig_t, use4BitWidth) },
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#endif
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#endif
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// PG_OSD_CONFIG
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// PG_OSD_CONFIG
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@ -30,6 +30,7 @@ PG_REGISTER_WITH_RESET_TEMPLATE(sdioConfig_t, sdioConfig, PG_SDIO_CONFIG, 0);
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PG_RESET_TEMPLATE(sdioConfig_t, sdioConfig,
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PG_RESET_TEMPLATE(sdioConfig_t, sdioConfig,
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||||||
.clockBypass = 0,
|
.clockBypass = 0,
|
||||||
.useCache = 0,
|
.useCache = 0,
|
||||||
|
.use4BitWidth = 1
|
||||||
);
|
);
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
|
@ -25,6 +25,7 @@
|
||||||
typedef struct sdioConfig_s {
|
typedef struct sdioConfig_s {
|
||||||
uint8_t clockBypass;
|
uint8_t clockBypass;
|
||||||
uint8_t useCache;
|
uint8_t useCache;
|
||||||
|
uint8_t use4BitWidth;
|
||||||
} sdioConfig_t;
|
} sdioConfig_t;
|
||||||
|
|
||||||
PG_DECLARE(sdioConfig_t, sdioConfig);
|
PG_DECLARE(sdioConfig_t, sdioConfig);
|
||||||
|
|
Loading…
Add table
Add a link
Reference in a new issue