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Add PG for 4Bit SDIO, fix whitespaces.

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This commit is contained in:
Chris 2018-11-12 11:50:33 +00:00
parent aa8d6b3676
commit cdb4c1ef44
5 changed files with 399 additions and 352 deletions
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70
src/main/drivers/sdio_f4xx.c
View file

@ -341,8 +341,11 @@ static SD_Error_t SD_CmdResponse(uint8_t SD_CMD, int8_t ResponseType)
uint32_t TimeOut;
uint32_t Flag;
if(ResponseType == -1) Flag = SDIO_STA_CMDSENT;
else Flag = SDIO_STA_CCRCFAIL | SDIO_STA_CMDREND | SDIO_STA_CTIMEOUT;
if(ResponseType == -1) {
Flag = SDIO_STA_CMDSENT;
} else {
Flag = SDIO_STA_CCRCFAIL | SDIO_STA_CMDREND | SDIO_STA_CTIMEOUT;
}
TimeOut = SD_SOFTWARE_COMMAND_TIMEOUT;
do
@ -354,20 +357,34 @@ static SD_Error_t SD_CmdResponse(uint8_t SD_CMD, int8_t ResponseType)
if(ResponseType <= 0)
{
if(TimeOut == 0) return SD_CMD_RSP_TIMEOUT;
else return SD_OK;
if(TimeOut == 0) {
return SD_CMD_RSP_TIMEOUT;
} else {
return SD_OK;
}
}
if((SDIO->STA & SDIO_STA_CTIMEOUT) != 0) return SD_CMD_RSP_TIMEOUT;
if((SDIO->STA & SDIO_STA_CTIMEOUT) != 0) {
return SD_CMD_RSP_TIMEOUT;
}
if(ResponseType == 3)
{
if(TimeOut == 0) return SD_CMD_RSP_TIMEOUT; // Card is not V2.0 compliant or card does not support the set voltage range
else return SD_OK; // Card is SD V2.0 compliant
if(TimeOut == 0) {
return SD_CMD_RSP_TIMEOUT; // Card is not V2.0 compliant or card does not support the set voltage range
} else {
return SD_OK; // Card is SD V2.0 compliant
}
}
if((SDIO->STA & SDIO_STA_CCRCFAIL) != 0) return SD_CMD_CRC_FAIL;
if(ResponseType == 2) return SD_OK;
if((uint8_t)SDIO->RESPCMD != SD_CMD) return SD_ILLEGAL_CMD; // Check if response is of desired command
if((SDIO->STA & SDIO_STA_CCRCFAIL) != 0) {
return SD_CMD_CRC_FAIL;
}
if(ResponseType == 2) {
return SD_OK;
}
if((uint8_t)SDIO->RESPCMD != SD_CMD) {
return SD_ILLEGAL_CMD; // Check if response is of desired command
}
Response_R1 = SDIO->RESP1; // We have received response, retrieve it for analysis
@ -381,9 +398,15 @@ static SD_Error_t SD_CmdResponse(uint8_t SD_CMD, int8_t ResponseType)
{
SD_CardRCA = Response_R1;
}
if((Response_R1 & SD_R6_GENERAL_UNKNOWN_ERROR) == SD_R6_GENERAL_UNKNOWN_ERROR) return SD_GENERAL_UNKNOWN_ERROR;
if((Response_R1 & SD_R6_ILLEGAL_CMD) == SD_R6_ILLEGAL_CMD) return SD_ILLEGAL_CMD;
if((Response_R1 & SD_R6_COM_CRC_FAILED) == SD_R6_COM_CRC_FAILED) return SD_COM_CRC_FAILED;
if((Response_R1 & SD_R6_GENERAL_UNKNOWN_ERROR) == SD_R6_GENERAL_UNKNOWN_ERROR) {
return SD_GENERAL_UNKNOWN_ERROR;
}
if((Response_R1 & SD_R6_ILLEGAL_CMD) == SD_R6_ILLEGAL_CMD) {
return SD_ILLEGAL_CMD;
}
if((Response_R1 & SD_R6_COM_CRC_FAILED) == SD_R6_COM_CRC_FAILED) {
return SD_COM_CRC_FAILED;
}
}
return SD_OK;
@ -1573,21 +1596,21 @@ void SD_Initialize_LL(DMA_Stream_TypeDef *dma)
//Configure Pins
RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN | RCC_AHB1ENR_GPIODEN;
uint8_t is4BitWidth = sdioConfig()->use4BitWidth;
const IO_t d0 = IOGetByTag(IO_TAG(PC8));
#ifndef USE_SDIO_1BIT
const IO_t d1 = IOGetByTag(IO_TAG(PC9));
const IO_t d2 = IOGetByTag(IO_TAG(PC10));
const IO_t d3 = IOGetByTag(IO_TAG(PC11));
#endif
const IO_t clk = IOGetByTag(IO_TAG(PC12));
const IO_t cmd = IOGetByTag(IO_TAG(PD2));
IOInit(d0, OWNER_SDCARD, 0);
#ifndef USE_SDIO_1BIT
if (is4BitWidth) {
IOInit(d1, OWNER_SDCARD, 0);
IOInit(d2, OWNER_SDCARD, 0);
IOInit(d3, OWNER_SDCARD, 0);
#endif
}
IOInit(clk, OWNER_SDCARD, 0);
IOInit(cmd, OWNER_SDCARD, 0);
@ -1596,11 +1619,11 @@ void SD_Initialize_LL(DMA_Stream_TypeDef *dma)
#define SDIO_CLK IO_CONFIG(GPIO_Mode_AF, GPIO_Speed_100MHz, GPIO_OType_PP, GPIO_PuPd_NOPULL)
IOConfigGPIOAF(d0, SDIO_DATA, GPIO_AF_SDIO);
#ifndef USE_SDIO_1BIT
if (is4BitWidth) {
IOConfigGPIOAF(d1, SDIO_DATA, GPIO_AF_SDIO);
IOConfigGPIOAF(d2, SDIO_DATA, GPIO_AF_SDIO);
IOConfigGPIOAF(d3, SDIO_DATA, GPIO_AF_SDIO);
#endif
}
IOConfigGPIOAF(clk, SDIO_CLK, GPIO_AF_SDIO);
IOConfigGPIOAF(cmd, SDIO_CMD, GPIO_AF_SDIO);
@ -1684,12 +1707,11 @@ bool SD_Init(void)
if(ErrorState == SD_OK)
{
// Enable wide operation
#ifdef USE_SDIO_1BIT
ErrorState = SD_WideBusOperationConfig(SD_BUS_WIDE_1B);
#else
if (sdioConfig()->use4BitWidth) {
ErrorState = SD_WideBusOperationConfig(SD_BUS_WIDE_4B);
#endif
} else {
ErrorState = SD_WideBusOperationConfig(SD_BUS_WIDE_1B);
}
if (ErrorState == SD_OK && sdioConfig()->clockBypass) {
if (SD_HighSpeed()) {
SDIO->CLKCR |= SDIO_CLKCR_BYPASS;

70
src/main/drivers/sdio_f7xx.c
View file

@ -336,8 +336,11 @@ static SD_Error_t SD_CmdResponse(uint8_t SD_CMD, int8_t ResponseType)
uint32_t TimeOut;
uint32_t Flag;
if(ResponseType == -1) Flag = SDMMC_STA_CMDSENT;
else Flag = SDMMC_STA_CCRCFAIL | SDMMC_STA_CMDREND | SDMMC_STA_CTIMEOUT;
if(ResponseType == -1) {
Flag = SDMMC_STA_CMDSENT;
} else {
Flag = SDMMC_STA_CCRCFAIL | SDMMC_STA_CMDREND | SDMMC_STA_CTIMEOUT;
}
TimeOut = SD_SOFTWARE_COMMAND_TIMEOUT;
do
@ -349,20 +352,34 @@ static SD_Error_t SD_CmdResponse(uint8_t SD_CMD, int8_t ResponseType)
if(ResponseType <= 0)
{
if(TimeOut == 0) return SD_CMD_RSP_TIMEOUT;
else return SD_OK;
if(TimeOut == 0){
return SD_CMD_RSP_TIMEOUT;
} else {
return SD_OK;
}
}
if((SDMMC1->STA & SDMMC_STA_CTIMEOUT) != 0) return SD_CMD_RSP_TIMEOUT;
if((SDMMC1->STA & SDMMC_STA_CTIMEOUT) != 0) {
return SD_CMD_RSP_TIMEOUT;
}
if(ResponseType == 3)
{
if(TimeOut == 0) return SD_CMD_RSP_TIMEOUT; // Card is not V2.0 compliant or card does not support the set voltage range
else return SD_OK; // Card is SD V2.0 compliant
if(TimeOut == 0) {
return SD_CMD_RSP_TIMEOUT; // Card is not V2.0 compliant or card does not support the set voltage range
} else {
return SD_OK; // Card is SD V2.0 compliant
}
}
if((SDMMC1->STA & SDMMC_STA_CCRCFAIL) != 0) return SD_CMD_CRC_FAIL;
if(ResponseType == 2) return SD_OK;
if((uint8_t)SDMMC1->RESPCMD != SD_CMD) return SD_ILLEGAL_CMD; // Check if response is of desired command
if((SDMMC1->STA & SDMMC_STA_CCRCFAIL) != 0) {
return SD_CMD_CRC_FAIL;
}
if(ResponseType == 2) {
return SD_OK;
}
if((uint8_t)SDMMC1->RESPCMD != SD_CMD) {
return SD_ILLEGAL_CMD; // Check if response is of desired command
}
Response_R1 = SDMMC1->RESP1; // We have received response, retrieve it for analysis
@ -376,9 +393,15 @@ static SD_Error_t SD_CmdResponse(uint8_t SD_CMD, int8_t ResponseType)
{
SD_CardRCA = Response_R1;
}
if((Response_R1 & SD_R6_GENERAL_UNKNOWN_ERROR) == SD_R6_GENERAL_UNKNOWN_ERROR) return SD_GENERAL_UNKNOWN_ERROR;
if((Response_R1 & SD_R6_ILLEGAL_CMD) == SD_R6_ILLEGAL_CMD) return SD_ILLEGAL_CMD;
if((Response_R1 & SD_R6_COM_CRC_FAILED) == SD_R6_COM_CRC_FAILED) return SD_COM_CRC_FAILED;
if((Response_R1 & SD_R6_GENERAL_UNKNOWN_ERROR) == SD_R6_GENERAL_UNKNOWN_ERROR) {
return SD_GENERAL_UNKNOWN_ERROR;
}
if((Response_R1 & SD_R6_ILLEGAL_CMD) == SD_R6_ILLEGAL_CMD) {
return SD_ILLEGAL_CMD;
}
if((Response_R1 & SD_R6_COM_CRC_FAILED) == SD_R6_COM_CRC_FAILED) {
return SD_COM_CRC_FAILED;
}
}
return SD_OK;
@ -1571,21 +1594,21 @@ void SD_Initialize_LL(DMA_Stream_TypeDef *dma)
//Configure Pins
RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN | RCC_AHB1ENR_GPIODEN;
uint8_t is4BitWidth = sdioConfig()->use4BitWidth;
const IO_t d0 = IOGetByTag(IO_TAG(PC8));
#ifndef USE_SDIO_1BIT
const IO_t d1 = IOGetByTag(IO_TAG(PC9));
const IO_t d2 = IOGetByTag(IO_TAG(PC10));
const IO_t d3 = IOGetByTag(IO_TAG(PC11));
#endif
const IO_t clk = IOGetByTag(IO_TAG(PC12));
const IO_t cmd = IOGetByTag(IO_TAG(PD2));
IOInit(d0, OWNER_SDCARD, 0);
#ifndef USE_SDIO_1BIT
if (is4BitWidth) {
IOInit(d1, OWNER_SDCARD, 0);
IOInit(d2, OWNER_SDCARD, 0);
IOInit(d3, OWNER_SDCARD, 0);
#endif
}
IOInit(clk, OWNER_SDCARD, 0);
IOInit(cmd, OWNER_SDCARD, 0);
@ -1594,11 +1617,11 @@ void SD_Initialize_LL(DMA_Stream_TypeDef *dma)
#define SDMMC_CLK IO_CONFIG(GPIO_MODE_AF_PP, GPIO_SPEED_FREQ_VERY_HIGH, GPIO_NOPULL)
IOConfigGPIOAF(d0, SDMMC_DATA, GPIO_AF12_SDMMC1);
#ifndef USE_SDIO_1BIT
if(is4BitWidth) {
IOConfigGPIOAF(d1, SDMMC_DATA, GPIO_AF12_SDMMC1);
IOConfigGPIOAF(d2, SDMMC_DATA, GPIO_AF12_SDMMC1);
IOConfigGPIOAF(d3, SDMMC_DATA, GPIO_AF12_SDMMC1);
#endif
}
IOConfigGPIOAF(clk, SDMMC_CLK, GPIO_AF12_SDMMC1);
IOConfigGPIOAF(cmd, SDMMC_CMD, GPIO_AF12_SDMMC1);
@ -1680,12 +1703,11 @@ bool SD_Init(void)
if(ErrorState == SD_OK)
{
// Enable wide operation
#ifdef USE_SDIO_1BIT
ErrorState = SD_WideBusOperationConfig(SD_BUS_WIDE_1B);
#else
if (sdioConfig()->use4BitWidth) {
ErrorState = SD_WideBusOperationConfig(SD_BUS_WIDE_4B);
#endif
} else {
ErrorState = SD_WideBusOperationConfig(SD_BUS_WIDE_1B);
}
}
// Configure the SDCARD device

1
src/main/interface/settings.c
View file

@ -990,6 +990,7 @@ const clivalue_t valueTable[] = {
#ifdef USE_SDCARD_SDIO
{ "sdio_clk_bypass", VAR_UINT8 | MASTER_VALUE | MODE_LOOKUP, .config.lookup = { TABLE_OFF_ON }, PG_SDIO_CONFIG, offsetof(sdioConfig_t, clockBypass) },
{ "sdio_use_cache", VAR_UINT8 | MASTER_VALUE | MODE_LOOKUP, .config.lookup = { TABLE_OFF_ON }, PG_SDIO_CONFIG, offsetof(sdioConfig_t, useCache) },
{ "sdio_use_4bit_width", VAR_UINT8 | MASTER_VALUE | MODE_LOOKUP, .config.lookup = { TABLE_OFF_ON }, PG_SDIO_CONFIG, offsetof(sdioConfig_t, use4BitWidth) },
#endif
// PG_OSD_CONFIG

1
src/main/pg/sdio.c
View file

@ -30,6 +30,7 @@ PG_REGISTER_WITH_RESET_TEMPLATE(sdioConfig_t, sdioConfig, PG_SDIO_CONFIG, 0);
PG_RESET_TEMPLATE(sdioConfig_t, sdioConfig,
.clockBypass = 0,
.useCache = 0,
.use4BitWidth = 1
);
#endif

1
src/main/pg/sdio.h
View file

@ -25,6 +25,7 @@
typedef struct sdioConfig_s {
uint8_t clockBypass;
uint8_t useCache;
uint8_t use4BitWidth;
} sdioConfig_t;
PG_DECLARE(sdioConfig_t, sdioConfig);