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Remove hardcoded numbers from i2cUnstick()
This commit is contained in:
parent
e282e4b3de
commit
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2 changed files with 46 additions and 20 deletions
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@ -37,6 +37,17 @@
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#define CLOCKSPEED 800000 // i2c clockspeed 400kHz default (conform specs), 800kHz and 1200kHz (Betaflight default)
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#define CLOCKSPEED 800000 // i2c clockspeed 400kHz default (conform specs), 800kHz and 1200kHz (Betaflight default)
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// Number of bits in I2C protocol phase
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#define LEN_ADDR 7
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#define LEN_RW 1
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#define LEN_ACK 1
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// Clock period in us during unstick transfer
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#define UNSTICK_CLK_US 10
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// Allow 500us for clock strech to complete during unstick
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#define UNSTICK_CLK_STRETCH (500/UNSTICK_CLK_US)
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static void i2cUnstick(IO_t scl, IO_t sda);
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static void i2cUnstick(IO_t scl, IO_t sda);
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#define IOCFG_I2C_PU IO_CONFIG(GPIO_MODE_AF_OD, GPIO_SPEED_FREQ_VERY_HIGH, GPIO_PULLUP)
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#define IOCFG_I2C_PU IO_CONFIG(GPIO_MODE_AF_OD, GPIO_SPEED_FREQ_VERY_HIGH, GPIO_PULLUP)
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@ -292,31 +303,33 @@ static void i2cUnstick(IO_t scl, IO_t sda)
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IOConfigGPIO(scl, IOCFG_OUT_OD);
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IOConfigGPIO(scl, IOCFG_OUT_OD);
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IOConfigGPIO(sda, IOCFG_OUT_OD);
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IOConfigGPIO(sda, IOCFG_OUT_OD);
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// Analog Devices AN-686
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// Clock out, with SDA high:
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// We need 9 clock pulses + STOP condition
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// 7 data bits
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for (i = 0; i < 9; i++) {
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// 1 READ bit
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// 1 cycle for the ACK
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for (i = 0; i < (LEN_ADDR + LEN_RW + LEN_ACK); i++) {
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// Wait for any clock stretching to finish
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// Wait for any clock stretching to finish
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int timeout = 100;
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int timeout = UNSTICK_CLK_STRETCH;
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while (!IORead(scl) && timeout) {
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while (!IORead(scl) && timeout) {
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delayMicroseconds(5);
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delayMicroseconds(UNSTICK_CLK_US);
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timeout--;
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timeout--;
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}
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}
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// Pull low
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// Pull low
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IOLo(scl); // Set bus low
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IOLo(scl); // Set bus low
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delayMicroseconds(5);
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delayMicroseconds(UNSTICK_CLK_US/2);
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IOHi(scl); // Set bus high
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IOHi(scl); // Set bus high
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delayMicroseconds(5);
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delayMicroseconds(UNSTICK_CLK_US/2);
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}
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}
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// Generate a stop condition in case there was none
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// Generate a stop condition in case there was none
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IOLo(scl);
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IOLo(scl);
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delayMicroseconds(5);
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delayMicroseconds(UNSTICK_CLK_US/2);
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IOLo(sda);
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IOLo(sda);
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delayMicroseconds(5);
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delayMicroseconds(UNSTICK_CLK_US/2);
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IOHi(scl); // Set bus scl high
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IOHi(scl); // Set bus scl high
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delayMicroseconds(5);
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delayMicroseconds(UNSTICK_CLK_US/2);
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IOHi(sda); // Set bus sda high
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IOHi(sda); // Set bus sda high
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}
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}
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@ -37,6 +37,17 @@
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#define CLOCKSPEED 800000 // i2c clockspeed 400kHz default (conform specs), 800kHz and 1200kHz (Betaflight default)
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#define CLOCKSPEED 800000 // i2c clockspeed 400kHz default (conform specs), 800kHz and 1200kHz (Betaflight default)
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// Number of bits in I2C protocol phase
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#define LEN_ADDR 7
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#define LEN_RW 1
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#define LEN_ACK 1
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// Clock period in us during unstick transfer
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#define UNSTICK_CLK_US 10
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// Allow 500us for clock strech to complete during unstick
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#define UNSTICK_CLK_STRETCH (500/UNSTICK_CLK_US)
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static void i2c_er_handler(I2CDevice device);
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static void i2c_er_handler(I2CDevice device);
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static void i2c_ev_handler(I2CDevice device);
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static void i2c_ev_handler(I2CDevice device);
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static void i2cUnstick(IO_t scl, IO_t sda);
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static void i2cUnstick(IO_t scl, IO_t sda);
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@ -480,31 +491,33 @@ static void i2cUnstick(IO_t scl, IO_t sda)
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IOConfigGPIO(scl, IOCFG_OUT_OD);
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IOConfigGPIO(scl, IOCFG_OUT_OD);
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IOConfigGPIO(sda, IOCFG_OUT_OD);
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IOConfigGPIO(sda, IOCFG_OUT_OD);
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// Analog Devices AN-686
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// Clock out, with SDA high:
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// We need 9 clock pulses + STOP condition
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// 7 data bits
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for (i = 0; i < 9; i++) {
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// 1 READ bit
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// 1 cycle for the ACK
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for (i = 0; i < (LEN_ADDR + LEN_RW + LEN_ACK); i++) {
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// Wait for any clock stretching to finish
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// Wait for any clock stretching to finish
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int timeout = 100;
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int timeout = UNSTICK_CLK_STRETCH;
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while (!IORead(scl) && timeout) {
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while (!IORead(scl) && timeout) {
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delayMicroseconds(5);
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delayMicroseconds(UNSTICK_CLK_US);
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timeout--;
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timeout--;
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}
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}
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// Pull low
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// Pull low
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IOLo(scl); // Set bus low
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IOLo(scl); // Set bus low
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delayMicroseconds(5);
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delayMicroseconds(UNSTICK_CLK_US/2);
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IOHi(scl); // Set bus high
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IOHi(scl); // Set bus high
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delayMicroseconds(5);
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delayMicroseconds(UNSTICK_CLK_US/2);
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}
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}
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// Generate a stop condition in case there was none
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// Generate a stop condition in case there was none
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IOLo(scl);
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IOLo(scl);
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delayMicroseconds(5);
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delayMicroseconds(UNSTICK_CLK_US/2);
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IOLo(sda);
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IOLo(sda);
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delayMicroseconds(5);
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delayMicroseconds(UNSTICK_CLK_US/2);
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IOHi(scl); // Set bus scl high
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IOHi(scl); // Set bus scl high
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delayMicroseconds(5);
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delayMicroseconds(UNSTICK_CLK_US/2);
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IOHi(sda); // Set bus sda high
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IOHi(sda); // Set bus sda high
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}
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}
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