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DSHOT - Use cycle counting instead of recording timestamp in dshot motor_DMA_IRQHandler.

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It turns out that two calls to micros() and the calculation of
directionChangeDurationUs took 581 cycles, vs 396 cycles without the
calls to micros() and deferred calculation of the duration which is only
needed in the CLI.

This brings the time down from around 7 microseconds to 5.5 microseconds
on an F3 at 72Mhz.

This makes the difference between 100% invalid telemetry and 4% invalid
telemetry on the first motor on the F3.

Squashed commits:
* Remove the forward declaration for `pwmDshotSetDirectionInput` and make
it static.
* Remove unneeded forward declaration of `motor_DMA_IRQHandler`.
* Remove duplication in DMA IRQ Handler.
  Doesn't affect resulting code but improves readability.
* Use an inline function to read DWT->CYCCNT.
* Remove unneeded forward declarations from cli.c now that the correct
header is included.
* Update DWT unlock method.
This commit is contained in:
Dominic Clifton 2019-08-28 11:21:06 +02:00
parent 6f4c2bb48c
commit d016aa2fc4
8 changed files with 76 additions and 33 deletions
Download patch file Download diff file Expand all files Collapse all files

41
src/main/drivers/system.c
View file

@ -32,6 +32,15 @@
#include "system.h"
#if defined(STM32F3) || defined(STM32F4) || defined(STM32F7) || defined(STM32H7)
// See "RM CoreSight Architecture Specification"
// B2.3.10 "LSR and LAR, Software Lock Status Register and Software Lock Access Register"
// "E1.2.11 LAR, Lock Access Register"
#define DWT_LAR_UNLOCK_VALUE 0xC5ACCE55
#endif
// cycles per microsecond
static uint32_t usTicks = 0;
// current uptime for 1kHz systick timer. will rollover after 49 days. hopefully we won't care.
@ -39,16 +48,34 @@ static volatile uint32_t sysTickUptime = 0;
static volatile uint32_t sysTickValStamp = 0;
// cached value of RCC->CSR
uint32_t cachedRccCsrValue;
static uint32_t cpuClockFrequency = 0;
void cycleCounterInit(void)
{
#if defined(USE_HAL_DRIVER)
usTicks = HAL_RCC_GetSysClockFreq() / 1000000;
cpuClockFrequency = HAL_RCC_GetSysClockFreq();
#else
RCC_ClocksTypeDef clocks;
RCC_GetClocksFreq(&clocks);
usTicks = clocks.SYSCLK_Frequency / 1000000;
cpuClockFrequency = clocks.SYSCLK_Frequency;
#endif
usTicks = cpuClockFrequency / 1000000;
CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
#if defined(DWT_LAR_UNLOCK_VALUE)
#if defined(STM32F7) || defined(STM32H7)
DWT->LAR = DWT_LAR_UNLOCK_VALUE;
#elif defined(STM32F3) || defined(STM32F4)
// Note: DWT_Type does not contain LAR member.
#define DWT_LAR
__O uint32_t *DWTLAR = (uint32_t *)(DWT_BASE + 0x0FB0);
*(DWTLAR) = DWT_LAR_UNLOCK_VALUE;
#endif
#endif
DWT->CYCCNT = 0;
DWT->CTRL |= DWT_CTRL_CYCCNTENA_Msk;
}
// SysTick
@ -116,6 +143,16 @@ uint32_t micros(void)
return (ms * 1000) + (usTicks * 1000 - cycle_cnt) / usTicks;
}
inline uint32_t getCycleCounter(void)
{
return DWT->CYCCNT;
}
uint32_t clockCyclesToMicros(uint32_t clockCycles)
{
return clockCycles / usTicks;
}
// Return system uptime in milliseconds (rollover in 49 days)
uint32_t millis(void)
{