mirror of
https://github.com/betaflight/betaflight.git
synced 2025-07-15 20:35:33 +03:00
Add Lux target
This commit is contained in:
cmenard
borisbstyle
parent
e973bb149f
commit
d174314692
14 changed files with 672 additions and 19 deletions
1
.travis.yml
Executable file → Normal file
1
.travis.yml
Executable file → Normal file
|
|
@ -7,6 +7,7 @@ env:
|
||||||
- TARGET=CC3D_BP6
|
- TARGET=CC3D_BP6
|
||||||
- TARGET=CC3D_OPBL_BP6
|
- TARGET=CC3D_OPBL_BP6
|
||||||
- TARGET=COLIBRI_RACE
|
- TARGET=COLIBRI_RACE
|
||||||
|
- TARGET=LUX_RACE
|
||||||
- TARGET=CHEBUZZF3
|
- TARGET=CHEBUZZF3
|
||||||
- TARGET=CJMCU
|
- TARGET=CJMCU
|
||||||
- TARGET=EUSTM32F103RC
|
- TARGET=EUSTM32F103RC
|
||||||
|
|
|
||||||
21
Makefile
Executable file → Normal file
21
Makefile
Executable file → Normal file
|
|
@ -42,7 +42,7 @@ FORKNAME = betaflight
|
||||||
|
|
||||||
CC3D_TARGETS = CC3D CC3D_OPBL
|
CC3D_TARGETS = CC3D CC3D_OPBL
|
||||||
|
|
||||||
VALID_TARGETS = NAZE NAZE32PRO OLIMEXINO STM32F3DISCOVERY CHEBUZZF3 $(CC3D_TARGETS) CJMCU EUSTM32F103RC SPRACINGF3 PORT103R SPARKY ALIENWIIF1 ALIENWIIF3 COLIBRI_RACE MOTOLAB RMDO IRCFUSIONF3 AFROMINI
|
VALID_TARGETS = NAZE NAZE32PRO OLIMEXINO STM32F3DISCOVERY CHEBUZZF3 $(CC3D_TARGETS) CJMCU EUSTM32F103RC SPRACINGF3 PORT103R SPARKY ALIENWIIF1 ALIENWIIF3 COLIBRI_RACE LUX_RACE MOTOLAB RMDO IRCFUSIONF3 AFROMINI
|
||||||
|
|
||||||
# Valid targets for OP VCP support
|
# Valid targets for OP VCP support
|
||||||
VCP_VALID_TARGETS = $(CC3D_TARGETS)
|
VCP_VALID_TARGETS = $(CC3D_TARGETS)
|
||||||
|
|
@ -52,9 +52,9 @@ OPBL_VALID_TARGETS = CC3D_OPBL
|
||||||
|
|
||||||
64K_TARGETS = CJMCU
|
64K_TARGETS = CJMCU
|
||||||
128K_TARGETS = ALIENWIIF1 $(CC3D_TARGETS) NAZE OLIMEXINO RMDO AFROMINI
|
128K_TARGETS = ALIENWIIF1 $(CC3D_TARGETS) NAZE OLIMEXINO RMDO AFROMINI
|
||||||
256K_TARGETS = EUSTM32F103RC PORT103R STM32F3DISCOVERY CHEBUZZF3 NAZE32PRO SPRACINGF3 IRCFUSIONF3 SPARKY ALIENWIIF3 COLIBRI_RACE MOTOLAB
|
256K_TARGETS = EUSTM32F103RC PORT103R STM32F3DISCOVERY CHEBUZZF3 NAZE32PRO SPRACINGF3 IRCFUSIONF3 SPARKY ALIENWIIF3 COLIBRI_RACE LUX_RACE MOTOLAB
|
||||||
|
|
||||||
F3_TARGETS = STM32F3DISCOVERY CHEBUZZF3 NAZE32PRO SPRACINGF3 IRCFUSIONF3 SPARKY ALIENWIIF3 COLIBRI_RACE MOTOLAB RMDO
|
F3_TARGETS = STM32F3DISCOVERY CHEBUZZF3 NAZE32PRO SPRACINGF3 IRCFUSIONF3 SPARKY ALIENWIIF3 COLIBRI_RACE LUX_RACE MOTOLAB RMDO
|
||||||
|
|
||||||
|
|
||||||
# Configure default flash sizes for the targets
|
# Configure default flash sizes for the targets
|
||||||
|
|
@ -584,6 +584,21 @@ COLIBRI_RACE_SRC = \
|
||||||
$(COMMON_SRC) \
|
$(COMMON_SRC) \
|
||||||
$(VCP_SRC)
|
$(VCP_SRC)
|
||||||
|
|
||||||
|
LUX_RACE_SRC = \
|
||||||
|
$(STM32F30x_COMMON_SRC) \
|
||||||
|
drivers/display_ug2864hsweg01.c \
|
||||||
|
drivers/accgyro_mpu.c \
|
||||||
|
drivers/accgyro_mpu6500.c \
|
||||||
|
drivers/accgyro_spi_mpu6500.c \
|
||||||
|
drivers/accgyro_mpu6500.c \
|
||||||
|
drivers/barometer_ms5611.c \
|
||||||
|
drivers/compass_ak8975.c \
|
||||||
|
drivers/compass_hmc5883l.c \
|
||||||
|
drivers/serial_usb_vcp.c \
|
||||||
|
$(HIGHEND_SRC) \
|
||||||
|
$(COMMON_SRC) \
|
||||||
|
$(VCP_SRC)
|
||||||
|
|
||||||
SPARKY_SRC = \
|
SPARKY_SRC = \
|
||||||
$(STM32F30x_COMMON_SRC) \
|
$(STM32F30x_COMMON_SRC) \
|
||||||
drivers/display_ug2864hsweg01.c \
|
drivers/display_ug2864hsweg01.c \
|
||||||
|
|
|
||||||
2
fake_travis_build.sh
Executable file → Normal file
2
fake_travis_build.sh
Executable file → Normal file
|
|
@ -5,8 +5,8 @@ targets=("PUBLISHMETA=True" \
|
||||||
"TARGET=CC3D" \
|
"TARGET=CC3D" \
|
||||||
"TARGET=CC3D_OPBL" \
|
"TARGET=CC3D_OPBL" \
|
||||||
"TARGET=CHEBUZZF3" \
|
"TARGET=CHEBUZZF3" \
|
||||||
# "TARGET=CJMCU" \
|
|
||||||
"TARGET=COLIBRI_RACE" \
|
"TARGET=COLIBRI_RACE" \
|
||||||
|
"TARGET=LUX_RACE" \
|
||||||
"TARGET=EUSTM32F103RC" \
|
"TARGET=EUSTM32F103RC" \
|
||||||
"TARGET=SPRACINGF3" \
|
"TARGET=SPRACINGF3" \
|
||||||
"TARGET=NAZE" \
|
"TARGET=NAZE" \
|
||||||
|
|
|
||||||
|
|
@ -384,7 +384,7 @@ static void resetConf(void)
|
||||||
masterConfig.version = EEPROM_CONF_VERSION;
|
masterConfig.version = EEPROM_CONF_VERSION;
|
||||||
masterConfig.mixerMode = MIXER_QUADX;
|
masterConfig.mixerMode = MIXER_QUADX;
|
||||||
featureClearAll();
|
featureClearAll();
|
||||||
#if defined(CJMCU) || defined(SPARKY) || defined(COLIBRI_RACE) || defined(MOTOLAB)
|
#if defined(CJMCU) || defined(SPARKY) || defined(COLIBRI_RACE) || defined(MOTOLAB) || defined(LUX_RACE)
|
||||||
featureSet(FEATURE_RX_PPM);
|
featureSet(FEATURE_RX_PPM);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
@ -888,7 +888,7 @@ void validateAndFixConfig(void)
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if defined(COLIBRI_RACE)
|
#if defined(COLIBRI_RACE) || defined(LUX_RACE)
|
||||||
masterConfig.serialConfig.portConfigs[0].functionMask = FUNCTION_MSP;
|
masterConfig.serialConfig.portConfigs[0].functionMask = FUNCTION_MSP;
|
||||||
if(featureConfigured(FEATURE_RX_PARALLEL_PWM) || featureConfigured(FEATURE_RX_MSP)) {
|
if(featureConfigured(FEATURE_RX_PARALLEL_PWM) || featureConfigured(FEATURE_RX_MSP)) {
|
||||||
featureClear(FEATURE_RX_PARALLEL_PWM);
|
featureClear(FEATURE_RX_PARALLEL_PWM);
|
||||||
|
|
|
||||||
|
|
@ -47,7 +47,7 @@ void gyroUpdateSampleRate(uint8_t lpf) {
|
||||||
if (!lpf) {
|
if (!lpf) {
|
||||||
gyroSamplePeriod = 125;
|
gyroSamplePeriod = 125;
|
||||||
#ifdef STM32F303xC
|
#ifdef STM32F303xC
|
||||||
#ifdef COLIBRI_RACE
|
#ifdef COLIBRI_RACE // Leave out LUX target for now. Need to test 2.6Khz
|
||||||
gyroSyncDenominator = 3; // Sample every 3d gyro measurement 2,6khz
|
gyroSyncDenominator = 3; // Sample every 3d gyro measurement 2,6khz
|
||||||
#else
|
#else
|
||||||
gyroSyncDenominator = 4; // Sample every 4th gyro measurement 2khz
|
gyroSyncDenominator = 4; // Sample every 4th gyro measurement 2khz
|
||||||
|
|
|
||||||
|
|
@ -302,7 +302,7 @@ static const uint16_t airPWM[] = {
|
||||||
};
|
};
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#ifdef COLIBRI_RACE
|
#if defined(COLIBRI_RACE) || defined(LUX_RACE)
|
||||||
static const uint16_t multiPPM[] = {
|
static const uint16_t multiPPM[] = {
|
||||||
PWM1 | (MAP_TO_PPM_INPUT << 8), // PPM input
|
PWM1 | (MAP_TO_PPM_INPUT << 8), // PPM input
|
||||||
PWM2 | (MAP_TO_MOTOR_OUTPUT << 8),
|
PWM2 | (MAP_TO_MOTOR_OUTPUT << 8),
|
||||||
|
|
@ -658,7 +658,7 @@ if (init->useBuzzerP6) {
|
||||||
type = MAP_TO_SERVO_OUTPUT;
|
type = MAP_TO_SERVO_OUTPUT;
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if defined(COLIBRI_RACE)
|
#if defined(COLIBRI_RACE) || defined(LUX_RACE)
|
||||||
// remap PWM1+2 as servos
|
// remap PWM1+2 as servos
|
||||||
if ((timerIndex == PWM6 || timerIndex == PWM7 || timerIndex == PWM8 || timerIndex == PWM9) && timerHardwarePtr->tim == TIM2)
|
if ((timerIndex == PWM6 || timerIndex == PWM7 || timerIndex == PWM8 || timerIndex == PWM9) && timerHardwarePtr->tim == TIM2)
|
||||||
type = MAP_TO_SERVO_OUTPUT;
|
type = MAP_TO_SERVO_OUTPUT;
|
||||||
|
|
|
||||||
|
|
@ -90,7 +90,7 @@ void EXTI3_IRQHandler(void)
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if defined (COLIBRI_RACE)
|
#if defined(COLIBRI_RACE) || defined(LUX_RACE)
|
||||||
void EXTI9_5_IRQHandler(void)
|
void EXTI9_5_IRQHandler(void)
|
||||||
{
|
{
|
||||||
extiHandler(EXTI9_5_IRQn);
|
extiHandler(EXTI9_5_IRQn);
|
||||||
|
|
|
||||||
|
|
@ -115,7 +115,7 @@ const timerHardware_t timerHardware[USABLE_TIMER_CHANNEL_COUNT] = {
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#ifdef COLIBRI_RACE
|
#if defined(COLIBRI_RACE) || defined(LUX_RACE)
|
||||||
const timerHardware_t timerHardware[USABLE_TIMER_CHANNEL_COUNT] = {
|
const timerHardware_t timerHardware[USABLE_TIMER_CHANNEL_COUNT] = {
|
||||||
{ TIM1, GPIOA, Pin_8, TIM_Channel_1, TIM1_CC_IRQn, 0, Mode_AF_PP_PD, GPIO_PinSource8, GPIO_AF_6}, // PWM1 - PA8
|
{ TIM1, GPIOA, Pin_8, TIM_Channel_1, TIM1_CC_IRQn, 0, Mode_AF_PP_PD, GPIO_PinSource8, GPIO_AF_6}, // PWM1 - PA8
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -237,7 +237,7 @@ void gpsInit(serialConfig_t *initialSerialConfig, gpsConfig_t *initialGpsConfig)
|
||||||
|
|
||||||
portMode_t mode = MODE_RXTX;
|
portMode_t mode = MODE_RXTX;
|
||||||
// only RX is needed for NMEA-style GPS
|
// only RX is needed for NMEA-style GPS
|
||||||
#ifndef COLIBRI_RACE
|
#if !defined(COLIBRI_RACE) || !defined(LUX_RACE)
|
||||||
if (gpsConfig->provider == GPS_NMEA)
|
if (gpsConfig->provider == GPS_NMEA)
|
||||||
mode &= ~MODE_TX;
|
mode &= ~MODE_TX;
|
||||||
#endif
|
#endif
|
||||||
|
|
@ -255,12 +255,12 @@ void gpsInit(serialConfig_t *initialSerialConfig, gpsConfig_t *initialGpsConfig)
|
||||||
|
|
||||||
void gpsInitNmea(void)
|
void gpsInitNmea(void)
|
||||||
{
|
{
|
||||||
#ifdef COLIBRI_RACE
|
#if defined(COLIBRI_RACE) || defined(LUX_RACE)
|
||||||
uint32_t now;
|
uint32_t now;
|
||||||
#endif
|
#endif
|
||||||
switch(gpsData.state) {
|
switch(gpsData.state) {
|
||||||
case GPS_INITIALIZING:
|
case GPS_INITIALIZING:
|
||||||
#ifdef COLIBRI_RACE
|
#if defined(COLIBRI_RACE) || defined(LUX_RACE)
|
||||||
now = millis();
|
now = millis();
|
||||||
if (now - gpsData.state_ts < 1000)
|
if (now - gpsData.state_ts < 1000)
|
||||||
return;
|
return;
|
||||||
|
|
@ -279,7 +279,7 @@ void gpsInitNmea(void)
|
||||||
break;
|
break;
|
||||||
#endif
|
#endif
|
||||||
case GPS_CHANGE_BAUD:
|
case GPS_CHANGE_BAUD:
|
||||||
#ifdef COLIBRI_RACE
|
#if defined(COLIBRI_RACE) || defined(LUX_RACE)
|
||||||
now = millis();
|
now = millis();
|
||||||
if (now - gpsData.state_ts < 1000)
|
if (now - gpsData.state_ts < 1000)
|
||||||
return;
|
return;
|
||||||
|
|
@ -295,7 +295,7 @@ void gpsInitNmea(void)
|
||||||
serialSetBaudRate(gpsPort, baudRates[gpsInitData[gpsData.baudrateIndex].baudrateIndex]);
|
serialSetBaudRate(gpsPort, baudRates[gpsInitData[gpsData.baudrateIndex].baudrateIndex]);
|
||||||
#endif
|
#endif
|
||||||
gpsSetState(GPS_RECEIVING_DATA);
|
gpsSetState(GPS_RECEIVING_DATA);
|
||||||
#ifdef COLIBRI_RACE
|
#if defined(COLIBRI_RACE) || defined(LUX_RACE)
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
break;
|
break;
|
||||||
|
|
|
||||||
|
|
@ -142,8 +142,8 @@ const extiConfig_t *selectMPUIntExtiConfig(void)
|
||||||
return &cc3dMPUIntExtiConfig;
|
return &cc3dMPUIntExtiConfig;
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if defined(COLIBRI_RACE)
|
#if defined(COLIBRI_RACE) || defined(LUX_RACE)
|
||||||
static const extiConfig_t colibriRaceMPUIntExtiConfig = {
|
static const extiConfig_t RaceMPUIntExtiConfig = {
|
||||||
.gpioAHBPeripherals = RCC_AHBPeriph_GPIOA,
|
.gpioAHBPeripherals = RCC_AHBPeriph_GPIOA,
|
||||||
.gpioPort = GPIOA,
|
.gpioPort = GPIOA,
|
||||||
.gpioPin = Pin_5,
|
.gpioPin = Pin_5,
|
||||||
|
|
@ -152,7 +152,7 @@ const extiConfig_t *selectMPUIntExtiConfig(void)
|
||||||
.exti_line = EXTI_Line5,
|
.exti_line = EXTI_Line5,
|
||||||
.exti_irqn = EXTI9_5_IRQn
|
.exti_irqn = EXTI9_5_IRQn
|
||||||
};
|
};
|
||||||
return &colibriRaceMPUIntExtiConfig;
|
return &RaceMPUIntExtiConfig;
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if defined(MOTOLAB) || defined(SPARKY)
|
#if defined(MOTOLAB) || defined(SPARKY)
|
||||||
|
|
|
||||||
372
src/main/target/LUX_RACE/system_stm32f30x.c
Normal file
372
src/main/target/LUX_RACE/system_stm32f30x.c
Normal file
|
|
@ -0,0 +1,372 @@
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file system_stm32f30x.c
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @version V1.1.1
|
||||||
|
* @date 28-March-2014
|
||||||
|
* @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File.
|
||||||
|
* This file contains the system clock configuration for STM32F30x devices,
|
||||||
|
* and is generated by the clock configuration tool
|
||||||
|
* stm32f30x_Clock_Configuration_V1.0.0.xls
|
||||||
|
*
|
||||||
|
* 1. This file provides two functions and one global variable to be called from
|
||||||
|
* user application:
|
||||||
|
* - SystemInit(): Setups the system clock (System clock source, PLL Multiplier
|
||||||
|
* and Divider factors, AHB/APBx prescalers and Flash settings),
|
||||||
|
* depending on the configuration made in the clock xls tool.
|
||||||
|
* This function is called at startup just after reset and
|
||||||
|
* before branch to main program. This call is made inside
|
||||||
|
* the "startup_stm32f30x.s" file.
|
||||||
|
*
|
||||||
|
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
|
||||||
|
* by the user application to setup the SysTick
|
||||||
|
* timer or configure other parameters.
|
||||||
|
*
|
||||||
|
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
|
||||||
|
* be called whenever the core clock is changed
|
||||||
|
* during program execution.
|
||||||
|
*
|
||||||
|
* 2. After each device reset the HSI (8 MHz) is used as system clock source.
|
||||||
|
* Then SystemInit() function is called, in "startup_stm32f30x.s" file, to
|
||||||
|
* configure the system clock before to branch to main program.
|
||||||
|
*
|
||||||
|
* 3. If the system clock source selected by user fails to startup, the SystemInit()
|
||||||
|
* function will do nothing and HSI still used as system clock source. User can
|
||||||
|
* add some code to deal with this issue inside the SetSysClock() function.
|
||||||
|
*
|
||||||
|
* 4. The default value of HSE crystal is set to 8MHz, refer to "HSE_VALUE" define
|
||||||
|
* in "stm32f30x.h" file. When HSE is used as system clock source, directly or
|
||||||
|
* through PLL, and you are using different crystal you have to adapt the HSE
|
||||||
|
* value to your own configuration.
|
||||||
|
*
|
||||||
|
* 5. This file configures the system clock as follows:
|
||||||
|
*=============================================================================
|
||||||
|
* Supported STM32F30x device
|
||||||
|
*-----------------------------------------------------------------------------
|
||||||
|
* System Clock source | PLL (HSE)
|
||||||
|
*-----------------------------------------------------------------------------
|
||||||
|
* SYSCLK(Hz) | 72000000
|
||||||
|
*-----------------------------------------------------------------------------
|
||||||
|
* HCLK(Hz) | 72000000
|
||||||
|
*-----------------------------------------------------------------------------
|
||||||
|
* AHB Prescaler | 1
|
||||||
|
*-----------------------------------------------------------------------------
|
||||||
|
* APB2 Prescaler | 2
|
||||||
|
*-----------------------------------------------------------------------------
|
||||||
|
* APB1 Prescaler | 2
|
||||||
|
*-----------------------------------------------------------------------------
|
||||||
|
* HSE Frequency(Hz) | 8000000
|
||||||
|
*----------------------------------------------------------------------------
|
||||||
|
* PLLMUL | 9
|
||||||
|
*-----------------------------------------------------------------------------
|
||||||
|
* PREDIV | 1
|
||||||
|
*-----------------------------------------------------------------------------
|
||||||
|
* USB Clock | ENABLE
|
||||||
|
*-----------------------------------------------------------------------------
|
||||||
|
* Flash Latency(WS) | 2
|
||||||
|
*-----------------------------------------------------------------------------
|
||||||
|
* Prefetch Buffer | ON
|
||||||
|
*-----------------------------------------------------------------------------
|
||||||
|
*=============================================================================
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2>
|
||||||
|
*
|
||||||
|
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||||
|
* You may not use this file except in compliance with the License.
|
||||||
|
* You may obtain a copy of the License at:
|
||||||
|
*
|
||||||
|
* http://www.st.com/software_license_agreement_liberty_v2
|
||||||
|
*
|
||||||
|
* Unless required by applicable law or agreed to in writing, software
|
||||||
|
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||||
|
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||||
|
* See the License for the specific language governing permissions and
|
||||||
|
* limitations under the License.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
/** @addtogroup CMSIS
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup stm32f30x_system
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32F30x_System_Private_Includes
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "stm32f30x.h"
|
||||||
|
|
||||||
|
uint32_t hse_value = HSE_VALUE;
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Private typedef -----------------------------------------------------------*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32F30x_System_Private_Defines
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
/*!< Uncomment the following line if you need to relocate your vector Table in
|
||||||
|
Internal SRAM. */
|
||||||
|
/* #define VECT_TAB_SRAM */
|
||||||
|
#define VECT_TAB_OFFSET 0x0 /*!< Vector Table base offset field.
|
||||||
|
This value must be a multiple of 0x200. */
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Private macro -------------------------------------------------------------*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32F30x_System_Private_Variables
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
uint32_t SystemCoreClock = 72000000;
|
||||||
|
|
||||||
|
__I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32F30x_System_Private_FunctionPrototypes
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
void SetSysClock(void);
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32F30x_System_Private_Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Setup the microcontroller system
|
||||||
|
* Initialize the Embedded Flash Interface, the PLL and update the
|
||||||
|
* SystemFrequency variable.
|
||||||
|
* @param None
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void SystemInit(void)
|
||||||
|
{
|
||||||
|
/* FPU settings ------------------------------------------------------------*/
|
||||||
|
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
|
||||||
|
SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Reset the RCC clock configuration to the default reset state ------------*/
|
||||||
|
/* Set HSION bit */
|
||||||
|
RCC->CR |= (uint32_t)0x00000001;
|
||||||
|
|
||||||
|
/* Reset CFGR register */
|
||||||
|
RCC->CFGR &= 0xF87FC00C;
|
||||||
|
|
||||||
|
/* Reset HSEON, CSSON and PLLON bits */
|
||||||
|
RCC->CR &= (uint32_t)0xFEF6FFFF;
|
||||||
|
|
||||||
|
/* Reset HSEBYP bit */
|
||||||
|
RCC->CR &= (uint32_t)0xFFFBFFFF;
|
||||||
|
|
||||||
|
/* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE bits */
|
||||||
|
RCC->CFGR &= (uint32_t)0xFF80FFFF;
|
||||||
|
|
||||||
|
/* Reset PREDIV1[3:0] bits */
|
||||||
|
RCC->CFGR2 &= (uint32_t)0xFFFFFFF0;
|
||||||
|
|
||||||
|
/* Reset USARTSW[1:0], I2CSW and TIMs bits */
|
||||||
|
RCC->CFGR3 &= (uint32_t)0xFF00FCCC;
|
||||||
|
|
||||||
|
/* Disable all interrupts */
|
||||||
|
RCC->CIR = 0x00000000;
|
||||||
|
|
||||||
|
/* Configure the System clock source, PLL Multiplier and Divider factors,
|
||||||
|
AHB/APBx prescalers and Flash settings ----------------------------------*/
|
||||||
|
//SetSysClock(); // called from main()
|
||||||
|
|
||||||
|
#ifdef VECT_TAB_SRAM
|
||||||
|
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
|
||||||
|
#else
|
||||||
|
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Update SystemCoreClock variable according to Clock Register Values.
|
||||||
|
* The SystemCoreClock variable contains the core clock (HCLK), it can
|
||||||
|
* be used by the user application to setup the SysTick timer or configure
|
||||||
|
* other parameters.
|
||||||
|
*
|
||||||
|
* @note Each time the core clock (HCLK) changes, this function must be called
|
||||||
|
* to update SystemCoreClock variable value. Otherwise, any configuration
|
||||||
|
* based on this variable will be incorrect.
|
||||||
|
*
|
||||||
|
* @note - The system frequency computed by this function is not the real
|
||||||
|
* frequency in the chip. It is calculated based on the predefined
|
||||||
|
* constant and the selected clock source:
|
||||||
|
*
|
||||||
|
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
|
||||||
|
*
|
||||||
|
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
|
||||||
|
*
|
||||||
|
* - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
|
||||||
|
* or HSI_VALUE(*) multiplied/divided by the PLL factors.
|
||||||
|
*
|
||||||
|
* (*) HSI_VALUE is a constant defined in stm32f30x.h file (default value
|
||||||
|
* 8 MHz) but the real value may vary depending on the variations
|
||||||
|
* in voltage and temperature.
|
||||||
|
*
|
||||||
|
* (**) HSE_VALUE is a constant defined in stm32f30x.h file (default value
|
||||||
|
* 8 MHz), user has to ensure that HSE_VALUE is same as the real
|
||||||
|
* frequency of the crystal used. Otherwise, this function may
|
||||||
|
* have wrong result.
|
||||||
|
*
|
||||||
|
* - The result of this function could be not correct when using fractional
|
||||||
|
* value for HSE crystal.
|
||||||
|
*
|
||||||
|
* @param None
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void SystemCoreClockUpdate (void)
|
||||||
|
{
|
||||||
|
uint32_t tmp = 0, pllmull = 0, pllsource = 0, prediv1factor = 0;
|
||||||
|
|
||||||
|
/* Get SYSCLK source -------------------------------------------------------*/
|
||||||
|
tmp = RCC->CFGR & RCC_CFGR_SWS;
|
||||||
|
|
||||||
|
switch (tmp)
|
||||||
|
{
|
||||||
|
case 0x00: /* HSI used as system clock */
|
||||||
|
SystemCoreClock = HSI_VALUE;
|
||||||
|
break;
|
||||||
|
case 0x04: /* HSE used as system clock */
|
||||||
|
SystemCoreClock = HSE_VALUE;
|
||||||
|
break;
|
||||||
|
case 0x08: /* PLL used as system clock */
|
||||||
|
/* Get PLL clock source and multiplication factor ----------------------*/
|
||||||
|
pllmull = RCC->CFGR & RCC_CFGR_PLLMULL;
|
||||||
|
pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
|
||||||
|
pllmull = ( pllmull >> 18) + 2;
|
||||||
|
|
||||||
|
if (pllsource == 0x00)
|
||||||
|
{
|
||||||
|
/* HSI oscillator clock divided by 2 selected as PLL clock entry */
|
||||||
|
SystemCoreClock = (HSI_VALUE >> 1) * pllmull;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1;
|
||||||
|
/* HSE oscillator clock selected as PREDIV1 clock entry */
|
||||||
|
SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
default: /* HSI used as system clock */
|
||||||
|
SystemCoreClock = HSI_VALUE;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
/* Compute HCLK clock frequency ----------------*/
|
||||||
|
/* Get HCLK prescaler */
|
||||||
|
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
|
||||||
|
/* HCLK clock frequency */
|
||||||
|
SystemCoreClock >>= tmp;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Configures the System clock source, PLL Multiplier and Divider factors,
|
||||||
|
* AHB/APBx prescalers and Flash settings
|
||||||
|
* @note This function should be called only once the RCC clock configuration
|
||||||
|
* is reset to the default reset state (done in SystemInit() function).
|
||||||
|
* @param None
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void SetSysClock(void)
|
||||||
|
{
|
||||||
|
__IO uint32_t StartUpCounter = 0, HSEStatus = 0;
|
||||||
|
|
||||||
|
/******************************************************************************/
|
||||||
|
/* PLL (clocked by HSE) used as System clock source */
|
||||||
|
/******************************************************************************/
|
||||||
|
|
||||||
|
/* SYSCLK, HCLK, PCLK2 and PCLK1 configuration -----------*/
|
||||||
|
/* Enable HSE */
|
||||||
|
RCC->CR |= ((uint32_t)RCC_CR_HSEON);
|
||||||
|
|
||||||
|
/* Wait till HSE is ready and if Time out is reached exit */
|
||||||
|
do
|
||||||
|
{
|
||||||
|
HSEStatus = RCC->CR & RCC_CR_HSERDY;
|
||||||
|
StartUpCounter++;
|
||||||
|
} while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
|
||||||
|
|
||||||
|
if ((RCC->CR & RCC_CR_HSERDY) != RESET)
|
||||||
|
{
|
||||||
|
HSEStatus = (uint32_t)0x01;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
HSEStatus = (uint32_t)0x00;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (HSEStatus == (uint32_t)0x01)
|
||||||
|
{
|
||||||
|
/* Enable Prefetch Buffer and set Flash Latency */
|
||||||
|
FLASH->ACR = FLASH_ACR_PRFTBE | (uint32_t)FLASH_ACR_LATENCY_1;
|
||||||
|
|
||||||
|
/* HCLK = SYSCLK / 1 */
|
||||||
|
RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1;
|
||||||
|
|
||||||
|
/* PCLK2 = HCLK / 1 */
|
||||||
|
RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1;
|
||||||
|
|
||||||
|
/* PCLK1 = HCLK / 2 */
|
||||||
|
RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2;
|
||||||
|
|
||||||
|
/* PLL configuration */
|
||||||
|
RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL));
|
||||||
|
RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_PREDIV1 | RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLMULL9);
|
||||||
|
|
||||||
|
/* Enable PLL */
|
||||||
|
RCC->CR |= RCC_CR_PLLON;
|
||||||
|
|
||||||
|
/* Wait till PLL is ready */
|
||||||
|
while((RCC->CR & RCC_CR_PLLRDY) == 0)
|
||||||
|
{
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Select PLL as system clock source */
|
||||||
|
RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));
|
||||||
|
RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL;
|
||||||
|
|
||||||
|
/* Wait till PLL is used as system clock source */
|
||||||
|
while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)RCC_CFGR_SWS_PLL)
|
||||||
|
{
|
||||||
|
}
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{ /* If HSE fails to start-up, the application will have wrong clock
|
||||||
|
configuration. User can add here some code to deal with this error */
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||||
|
|
||||||
76
src/main/target/LUX_RACE/system_stm32f30x.h
Normal file
76
src/main/target/LUX_RACE/system_stm32f30x.h
Normal file
|
|
@ -0,0 +1,76 @@
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file system_stm32f30x.h
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @version V1.1.1
|
||||||
|
* @date 28-March-2014
|
||||||
|
* @brief CMSIS Cortex-M4 Device System Source File for STM32F30x devices.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2>
|
||||||
|
*
|
||||||
|
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||||
|
* You may not use this file except in compliance with the License.
|
||||||
|
* You may obtain a copy of the License at:
|
||||||
|
*
|
||||||
|
* http://www.st.com/software_license_agreement_liberty_v2
|
||||||
|
*
|
||||||
|
* Unless required by applicable law or agreed to in writing, software
|
||||||
|
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||||
|
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||||
|
* See the License for the specific language governing permissions and
|
||||||
|
* limitations under the License.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup CMSIS
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup stm32f30x_system
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Define to prevent recursive inclusion
|
||||||
|
*/
|
||||||
|
#ifndef __SYSTEM_STM32F30X_H
|
||||||
|
#define __SYSTEM_STM32F30X_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Exported types ------------------------------------------------------------*/
|
||||||
|
extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
|
||||||
|
/* Exported constants --------------------------------------------------------*/
|
||||||
|
/* Exported macro ------------------------------------------------------------*/
|
||||||
|
/* Exported functions ------------------------------------------------------- */
|
||||||
|
|
||||||
|
/** @addtogroup STM32F30x_System_Exported_Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
extern void SystemInit(void);
|
||||||
|
extern void SystemCoreClockUpdate(void);
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /*__SYSTEM_STM32F30X_H */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||||
187
src/main/target/LUX_RACE/target.h
Normal file
187
src/main/target/LUX_RACE/target.h
Normal file
|
|
@ -0,0 +1,187 @@
|
||||||
|
/*
|
||||||
|
* This file is part of Cleanflight.
|
||||||
|
*
|
||||||
|
* Cleanflight is free software: you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
* the Free Software Foundation, either version 3 of the License, or
|
||||||
|
* (at your option) any later version.
|
||||||
|
*
|
||||||
|
* Cleanflight is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with Cleanflight. If not, see <http://www.gnu.org/licenses/>.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#pragma once
|
||||||
|
|
||||||
|
#define TARGET_BOARD_IDENTIFIER "LUX"
|
||||||
|
|
||||||
|
#define LED0_GPIO GPIOC
|
||||||
|
#define LED0_PIN Pin_15
|
||||||
|
#define LED0_PERIPHERAL RCC_AHBPeriph_GPIOC
|
||||||
|
|
||||||
|
#define LED1_GPIO GPIOC
|
||||||
|
#define LED1_PIN Pin_14
|
||||||
|
#define LED1_PERIPHERAL RCC_AHBPeriph_GPIOC
|
||||||
|
|
||||||
|
#define LED2_GPIO GPIOC
|
||||||
|
#define LED2_PIN Pin_13
|
||||||
|
#define LED2_PERIPHERAL RCC_AHBPeriph_GPIOC
|
||||||
|
|
||||||
|
#define BEEP_GPIO GPIOB
|
||||||
|
#define BEEP_PIN Pin_13
|
||||||
|
#define BEEP_PERIPHERAL RCC_AHBPeriph_GPIOB
|
||||||
|
#define BEEPER_INVERTED
|
||||||
|
|
||||||
|
#define MPU6500_CS_GPIO_CLK_PERIPHERAL RCC_AHBPeriph_GPIOA
|
||||||
|
#define MPU6500_CS_GPIO GPIOA
|
||||||
|
#define MPU6500_CS_PIN GPIO_Pin_4
|
||||||
|
#define MPU6500_SPI_INSTANCE SPI1
|
||||||
|
|
||||||
|
#define USE_SPI
|
||||||
|
#define USE_SPI_DEVICE_1
|
||||||
|
|
||||||
|
#define SPI1_GPIO GPIOB
|
||||||
|
#define SPI1_GPIO_PERIPHERAL RCC_AHBPeriph_GPIOB
|
||||||
|
#define SPI1_SCK_PIN GPIO_Pin_3
|
||||||
|
#define SPI1_SCK_PIN_SOURCE GPIO_PinSource3
|
||||||
|
#define SPI1_MISO_PIN GPIO_Pin_4
|
||||||
|
#define SPI1_MISO_PIN_SOURCE GPIO_PinSource4
|
||||||
|
#define SPI1_MOSI_PIN GPIO_Pin_5
|
||||||
|
#define SPI1_MOSI_PIN_SOURCE GPIO_PinSource5
|
||||||
|
|
||||||
|
#define USABLE_TIMER_CHANNEL_COUNT 11
|
||||||
|
|
||||||
|
#define GYRO
|
||||||
|
#define USE_GYRO_MPU6500
|
||||||
|
#define USE_GYRO_SPI_MPU6500
|
||||||
|
#define GYRO_MPU6500_ALIGN CW270_DEG
|
||||||
|
|
||||||
|
#define ACC
|
||||||
|
#define USE_ACC_MPU6500
|
||||||
|
#define USE_ACC_SPI_MPU6500
|
||||||
|
#define ACC_MPU6500_ALIGN CW270_DEG
|
||||||
|
|
||||||
|
// MPU6500 interrupt
|
||||||
|
//#define DEBUG_MPU_DATA_READY_INTERRUPT
|
||||||
|
#define USE_MPU_DATA_READY_SIGNAL
|
||||||
|
#define ENSURE_MPU_DATA_READY_IS_LOW
|
||||||
|
|
||||||
|
// External I2C BARO
|
||||||
|
//#define BARO
|
||||||
|
//#define USE_BARO_MS5611
|
||||||
|
|
||||||
|
// External I2C MAG
|
||||||
|
//#define MAG
|
||||||
|
//#define USE_MAG_HMC5883
|
||||||
|
//#define USE_MAG_AK8975
|
||||||
|
//#define MAG_AK8975_ALIGN CW0_DEG_FLIP
|
||||||
|
|
||||||
|
#define BEEPER
|
||||||
|
#define LED0
|
||||||
|
#define LED1
|
||||||
|
#define LED2
|
||||||
|
|
||||||
|
#define USE_VCP
|
||||||
|
#define USE_USART1
|
||||||
|
#define USE_USART2
|
||||||
|
#define USE_USART3
|
||||||
|
#define SERIAL_PORT_COUNT 4
|
||||||
|
|
||||||
|
#define UART1_TX_PIN GPIO_Pin_4
|
||||||
|
#define UART1_RX_PIN GPIO_Pin_5
|
||||||
|
#define UART1_GPIO GPIOC
|
||||||
|
#define UART1_GPIO_AF GPIO_AF_7
|
||||||
|
#define UART1_TX_PINSOURCE GPIO_PinSource4
|
||||||
|
#define UART1_RX_PINSOURCE GPIO_PinSource5
|
||||||
|
|
||||||
|
#define UART2_TX_PIN GPIO_Pin_14 //PA14
|
||||||
|
#define UART2_RX_PIN GPIO_Pin_15 //PA15
|
||||||
|
#define UART2_GPIO GPIOA
|
||||||
|
#define UART2_GPIO_AF GPIO_AF_7
|
||||||
|
#define UART2_TX_PINSOURCE GPIO_PinSource14
|
||||||
|
#define UART2_RX_PINSOURCE GPIO_PinSource15
|
||||||
|
|
||||||
|
#define UART3_TX_PIN GPIO_Pin_10
|
||||||
|
#define UART3_RX_PIN GPIO_Pin_11
|
||||||
|
#define UART3_GPIO GPIOB
|
||||||
|
#define UART3_GPIO_AF GPIO_AF_7
|
||||||
|
#define UART3_TX_PINSOURCE GPIO_PinSource10
|
||||||
|
#define UART3_RX_PINSOURCE GPIO_PinSource11
|
||||||
|
|
||||||
|
#define USE_ESCSERIAL
|
||||||
|
#define ESCSERIAL_TIMER_TX_HARDWARE 0 // PWM 1
|
||||||
|
|
||||||
|
#define USE_I2C
|
||||||
|
#define I2C_DEVICE (I2CDEV_2)
|
||||||
|
|
||||||
|
#define I2C2_SCL_GPIO GPIOA
|
||||||
|
#define I2C2_SCL_GPIO_AF GPIO_AF_4
|
||||||
|
#define I2C2_SCL_PIN GPIO_Pin_9
|
||||||
|
#define I2C2_SCL_PIN_SOURCE GPIO_PinSource9
|
||||||
|
#define I2C2_SCL_CLK_SOURCE RCC_AHBPeriph_GPIOA
|
||||||
|
#define I2C2_SDA_GPIO GPIOA
|
||||||
|
#define I2C2_SDA_GPIO_AF GPIO_AF_4
|
||||||
|
#define I2C2_SDA_PIN GPIO_Pin_10
|
||||||
|
#define I2C2_SDA_PIN_SOURCE GPIO_PinSource10
|
||||||
|
#define I2C2_SDA_CLK_SOURCE RCC_AHBPeriph_GPIOA
|
||||||
|
|
||||||
|
#define USE_ADC
|
||||||
|
|
||||||
|
#define ADC_INSTANCE ADC1
|
||||||
|
#define ADC_AHB_PERIPHERAL RCC_AHBPeriph_DMA1
|
||||||
|
#define ADC_DMA_CHANNEL DMA1_Channel1
|
||||||
|
|
||||||
|
#define VBAT_ADC_GPIO GPIOC
|
||||||
|
#define VBAT_ADC_GPIO_PIN GPIO_Pin_0
|
||||||
|
#define VBAT_ADC_CHANNEL ADC_Channel_6
|
||||||
|
|
||||||
|
#define CURRENT_METER_ADC_GPIO GPIOC
|
||||||
|
#define CURRENT_METER_ADC_GPIO_PIN GPIO_Pin_1
|
||||||
|
#define CURRENT_METER_ADC_CHANNEL ADC_Channel_7
|
||||||
|
|
||||||
|
#define RSSI_ADC_GPIO GPIOC
|
||||||
|
#define RSSI_ADC_GPIO_PIN GPIO_Pin_2
|
||||||
|
#define RSSI_ADC_CHANNEL ADC_Channel_8
|
||||||
|
|
||||||
|
#define EXTERNAL1_ADC_GPIO GPIOC
|
||||||
|
#define EXTERNAL1_ADC_GPIO_PIN GPIO_Pin_3
|
||||||
|
#define EXTERNAL1_ADC_CHANNEL ADC_Channel_9
|
||||||
|
|
||||||
|
#define BLACKBOX
|
||||||
|
#define GPS
|
||||||
|
#define GTUNE
|
||||||
|
#define LED_STRIP
|
||||||
|
|
||||||
|
#define LED_STRIP_TIMER TIM16
|
||||||
|
|
||||||
|
#define USE_LED_STRIP_ON_DMA1_CHANNEL3
|
||||||
|
#define WS2811_GPIO GPIOA
|
||||||
|
#define WS2811_GPIO_AHB_PERIPHERAL RCC_AHBPeriph_GPIOA
|
||||||
|
#define WS2811_GPIO_AF GPIO_AF_1
|
||||||
|
#define WS2811_PIN GPIO_Pin_6 // TIM16_CH1
|
||||||
|
#define WS2811_PIN_SOURCE GPIO_PinSource6
|
||||||
|
#define WS2811_TIMER TIM16
|
||||||
|
#define WS2811_TIMER_APB2_PERIPHERAL RCC_APB2Periph_TIM16
|
||||||
|
#define WS2811_DMA_CHANNEL DMA1_Channel3
|
||||||
|
#define WS2811_IRQ DMA1_Channel3_IRQn
|
||||||
|
|
||||||
|
#define TELEMETRY
|
||||||
|
#define SERIAL_RX
|
||||||
|
#define USE_SERVOS
|
||||||
|
#define USE_CLI
|
||||||
|
|
||||||
|
#define SPEKTRUM_BIND
|
||||||
|
// USART2, PA15
|
||||||
|
#define BIND_PORT GPIOA
|
||||||
|
#define BIND_PIN Pin_15
|
||||||
|
|
||||||
|
#define USE_SERIAL_1WIRE
|
||||||
|
// Untested
|
||||||
|
#define S1W_TX_GPIO GPIOC
|
||||||
|
#define S1W_TX_PIN GPIO_Pin_4
|
||||||
|
#define S1W_RX_GPIO GPIOC
|
||||||
|
#define S1W_RX_PIN GPIO_Pin_5
|
||||||
|
|
@ -13,6 +13,7 @@ ALL_TARGETS += sparky
|
||||||
ALL_TARGETS += alienwiif1
|
ALL_TARGETS += alienwiif1
|
||||||
ALL_TARGETS += alienwiif3
|
ALL_TARGETS += alienwiif3
|
||||||
ALL_TARGETS += colibri_race
|
ALL_TARGETS += colibri_race
|
||||||
|
ALL_TARGETS += lux_race
|
||||||
ALL_TARGETS += motolab
|
ALL_TARGETS += motolab
|
||||||
ALL_TARGETS += rmdo
|
ALL_TARGETS += rmdo
|
||||||
ALL_TARGETS += ircfusionf3
|
ALL_TARGETS += ircfusionf3
|
||||||
|
|
@ -34,6 +35,7 @@ clean_sparky sparky : opts := TARGET=SPARKY
|
||||||
clean_alienwiif1 alienwiif1 : opts := TARGET=ALIENWIIF1
|
clean_alienwiif1 alienwiif1 : opts := TARGET=ALIENWIIF1
|
||||||
clean_alienwiif3 alienwiif3 : opts := TARGET=ALIENWIIF3
|
clean_alienwiif3 alienwiif3 : opts := TARGET=ALIENWIIF3
|
||||||
clean_colibri_race colibri_race : opts := TARGET=COLIBRI_RACE
|
clean_colibri_race colibri_race : opts := TARGET=COLIBRI_RACE
|
||||||
|
clean_lux_race lux_race : opts := TARGET=LUX_RACE
|
||||||
clean_motolab motolab : opts := TARGET=MOTOLAB
|
clean_motolab motolab : opts := TARGET=MOTOLAB
|
||||||
clean_rmdo rmdo : opts := TARGET=RMDO
|
clean_rmdo rmdo : opts := TARGET=RMDO
|
||||||
clean_ircfusionf3 ircfusionf3 : opts := TARGET=IRCFUSIONF3
|
clean_ircfusionf3 ircfusionf3 : opts := TARGET=IRCFUSIONF3
|
||||||
|
|
|
||||||
Loading…
Add table
Add a link
Reference in a new issue