mirror of
https://github.com/betaflight/betaflight.git
synced 2025-07-26 01:35:41 +03:00
Normalize all the line endings
This commit is contained in:
Dominic Clifton
parent
4237370b60
commit
d60183d91d
396 changed files with 158300 additions and 158300 deletions
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@ -1,296 +1,296 @@
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/*
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* This file is part of Cleanflight.
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*
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* Cleanflight is free software: you can redistribute it and/or modify
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||||
* it under the terms of the GNU General Public License as published by
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||||
* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* Cleanflight is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with Cleanflight. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <stdbool.h>
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#include <stdint.h>
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#include <platform.h>
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#include "gpio.h"
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#include "bus_spi.h"
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static volatile uint16_t spi1ErrorCount = 0;
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static volatile uint16_t spi2ErrorCount = 0;
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#ifdef STM32F303xC
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static volatile uint16_t spi3ErrorCount = 0;
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#endif
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void initSpi1(void)
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{
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// Specific to the STM32F103
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// SPI1 Driver
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// PA7 17 SPI1_MOSI
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// PA6 16 SPI1_MISO
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// PA5 15 SPI1_SCK
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// PA4 14 SPI1_NSS
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gpio_config_t gpio;
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SPI_InitTypeDef spi;
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// Enable SPI1 clock
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_SPI1, ENABLE);
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RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, ENABLE);
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// MOSI + SCK as output
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gpio.mode = Mode_AF_PP;
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gpio.pin = Pin_7 | Pin_5;
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gpio.speed = Speed_50MHz;
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gpioInit(GPIOA, &gpio);
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// MISO as input
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gpio.pin = Pin_6;
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gpio.mode = Mode_IN_FLOATING;
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gpioInit(GPIOA, &gpio);
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// NSS as gpio slave select
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gpio.pin = Pin_4;
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gpio.mode = Mode_Out_PP;
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gpioInit(GPIOA, &gpio);
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// Init SPI2 hardware
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SPI_I2S_DeInit(SPI1);
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spi.SPI_Mode = SPI_Mode_Master;
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spi.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
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spi.SPI_DataSize = SPI_DataSize_8b;
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spi.SPI_NSS = SPI_NSS_Soft;
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spi.SPI_FirstBit = SPI_FirstBit_MSB;
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spi.SPI_CRCPolynomial = 7;
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spi.SPI_CPOL = SPI_CPOL_High;
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spi.SPI_CPHA = SPI_CPHA_2Edge;
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spi.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_8;
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SPI_Init(SPI1, &spi);
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SPI_Cmd(SPI1, ENABLE);
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}
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void initSpi2(void)
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{
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// Specific to the STM32F103
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// SPI2 Driver
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// PB15 28 SPI2_MOSI
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// PB14 27 SPI2_MISO
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// PB13 26 SPI2_SCK
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// PB12 25 SPI2_NSS
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gpio_config_t gpio;
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SPI_InitTypeDef spi;
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// Enable SPI2 clock
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RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI2, ENABLE);
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RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, ENABLE);
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// MOSI + SCK as output
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gpio.mode = Mode_AF_PP;
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gpio.pin = Pin_13 | Pin_15;
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gpio.speed = Speed_50MHz;
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gpioInit(GPIOB, &gpio);
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// MISO as input
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gpio.pin = Pin_14;
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gpio.mode = Mode_IN_FLOATING;
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gpioInit(GPIOB, &gpio);
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// NSS as gpio slave select
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gpio.pin = Pin_12;
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gpio.mode = Mode_Out_PP;
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gpioInit(GPIOB, &gpio);
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// Init SPI2 hardware
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SPI_I2S_DeInit(SPI2);
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spi.SPI_Mode = SPI_Mode_Master;
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spi.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
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spi.SPI_DataSize = SPI_DataSize_8b;
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spi.SPI_NSS = SPI_NSS_Soft;
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spi.SPI_FirstBit = SPI_FirstBit_MSB;
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spi.SPI_CRCPolynomial = 7;
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spi.SPI_CPOL = SPI_CPOL_High;
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spi.SPI_CPHA = SPI_CPHA_2Edge;
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spi.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_8;
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SPI_Init(SPI2, &spi);
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SPI_Cmd(SPI2, ENABLE);
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}
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bool spiInit(SPI_TypeDef *instance)
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{
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if (instance == SPI1) {
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initSpi1();
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} else if (instance == SPI2) {
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initSpi2();
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} else {
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return false;
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}
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return true;
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}
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uint32_t spiTimeoutUserCallback(SPI_TypeDef *instance)
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{
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if (instance == SPI1) {
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spi1ErrorCount++;
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} else if (instance == SPI2) {
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spi2ErrorCount++;
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}
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#ifdef STM32F303xC
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else {
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spi3ErrorCount++;
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return spi3ErrorCount;
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}
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#endif
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return -1;
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}
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// return uint8_t value or -1 when failure
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uint8_t spiTransferByte(SPI_TypeDef *instance, uint8_t data)
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{
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uint16_t spiTimeout = 1000;
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while (SPI_I2S_GetFlagStatus(instance, SPI_I2S_FLAG_TXE) == RESET)
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if ((spiTimeout--) == 0)
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return spiTimeoutUserCallback(instance);
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#ifdef STM32F303xC
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SPI_SendData8(instance, data);
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#endif
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#ifdef STM32F10X
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SPI_I2S_SendData(instance, data);
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#endif
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spiTimeout = 1000;
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while (SPI_I2S_GetFlagStatus(instance, SPI_I2S_FLAG_RXNE) == RESET)
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if ((spiTimeout--) == 0)
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return spiTimeoutUserCallback(instance);
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#ifdef STM32F303xC
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return ((uint8_t)SPI_ReceiveData8(instance));
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#endif
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#ifdef STM32F10X
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return ((uint8_t)SPI_I2S_ReceiveData(instance));
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#endif
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}
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bool spiTransfer(SPI_TypeDef *instance, uint8_t *out, uint8_t *in, int len)
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{
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uint16_t spiTimeout = 1000;
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uint8_t b;
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instance->DR;
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while (len--) {
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b = in ? *(in++) : 0xFF;
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while (SPI_I2S_GetFlagStatus(instance, SPI_I2S_FLAG_TXE) == RESET) {
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if ((spiTimeout--) == 0)
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return spiTimeoutUserCallback(instance);
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}
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#ifdef STM32F303
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SPI_I2S_SendData16(instance, b);
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#endif
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#ifdef STM32F10X
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SPI_I2S_SendData(instance, b);
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#endif
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while (SPI_I2S_GetFlagStatus(instance, SPI_I2S_FLAG_RXNE) == RESET) {
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if ((spiTimeout--) == 0)
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return spiTimeoutUserCallback(instance);
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}
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#ifdef STM32F303
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b = SPI_I2S_ReceiveData16(instance);
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#endif
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#ifdef STM32F10X
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b = SPI_I2S_ReceiveData(instance);
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#endif
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if (out)
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*(out++) = b;
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}
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return true;
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}
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void spiSetDivisor(SPI_TypeDef *instance, uint16_t divisor)
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{
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#define BR_CLEAR_MASK 0xFFC7
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uint16_t tempRegister;
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SPI_Cmd(instance, DISABLE);
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tempRegister = instance->CR1;
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switch (divisor) {
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case 2:
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tempRegister &= BR_CLEAR_MASK;
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tempRegister |= SPI_BaudRatePrescaler_2;
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break;
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case 4:
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tempRegister &= BR_CLEAR_MASK;
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tempRegister |= SPI_BaudRatePrescaler_4;
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break;
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case 8:
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tempRegister &= BR_CLEAR_MASK;
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tempRegister |= SPI_BaudRatePrescaler_8;
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break;
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case 16:
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tempRegister &= BR_CLEAR_MASK;
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tempRegister |= SPI_BaudRatePrescaler_16;
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break;
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case 32:
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tempRegister &= BR_CLEAR_MASK;
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tempRegister |= SPI_BaudRatePrescaler_32;
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break;
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case 64:
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tempRegister &= BR_CLEAR_MASK;
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tempRegister |= SPI_BaudRatePrescaler_64;
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break;
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case 128:
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tempRegister &= BR_CLEAR_MASK;
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tempRegister |= SPI_BaudRatePrescaler_128;
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break;
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case 256:
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tempRegister &= BR_CLEAR_MASK;
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tempRegister |= SPI_BaudRatePrescaler_256;
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break;
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}
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instance->CR1 = tempRegister;
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SPI_Cmd(instance, ENABLE);
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}
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uint16_t spiGetErrorCounter(SPI_TypeDef *instance)
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{
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if (instance == SPI1) {
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return spi1ErrorCount;
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} else if (instance == SPI2) {
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return spi2ErrorCount;
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}
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return 0;
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}
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void spiResetErrorCounter(SPI_TypeDef *instance)
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{
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if (instance == SPI1) {
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spi1ErrorCount = 0;
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} else if (instance == SPI2) {
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spi2ErrorCount = 0;
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}
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}
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/*
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* This file is part of Cleanflight.
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*
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* Cleanflight is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* Cleanflight is distributed in the hope that it will be useful,
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||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
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*
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* You should have received a copy of the GNU General Public License
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||||
* along with Cleanflight. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <stdbool.h>
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#include <stdint.h>
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#include <platform.h>
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#include "gpio.h"
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#include "bus_spi.h"
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static volatile uint16_t spi1ErrorCount = 0;
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static volatile uint16_t spi2ErrorCount = 0;
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#ifdef STM32F303xC
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static volatile uint16_t spi3ErrorCount = 0;
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#endif
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void initSpi1(void)
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{
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// Specific to the STM32F103
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// SPI1 Driver
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// PA7 17 SPI1_MOSI
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// PA6 16 SPI1_MISO
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// PA5 15 SPI1_SCK
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// PA4 14 SPI1_NSS
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gpio_config_t gpio;
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SPI_InitTypeDef spi;
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// Enable SPI1 clock
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_SPI1, ENABLE);
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RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, ENABLE);
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// MOSI + SCK as output
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gpio.mode = Mode_AF_PP;
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gpio.pin = Pin_7 | Pin_5;
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gpio.speed = Speed_50MHz;
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gpioInit(GPIOA, &gpio);
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// MISO as input
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gpio.pin = Pin_6;
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gpio.mode = Mode_IN_FLOATING;
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gpioInit(GPIOA, &gpio);
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// NSS as gpio slave select
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gpio.pin = Pin_4;
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gpio.mode = Mode_Out_PP;
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gpioInit(GPIOA, &gpio);
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// Init SPI2 hardware
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SPI_I2S_DeInit(SPI1);
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spi.SPI_Mode = SPI_Mode_Master;
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spi.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
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spi.SPI_DataSize = SPI_DataSize_8b;
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spi.SPI_NSS = SPI_NSS_Soft;
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spi.SPI_FirstBit = SPI_FirstBit_MSB;
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spi.SPI_CRCPolynomial = 7;
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spi.SPI_CPOL = SPI_CPOL_High;
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spi.SPI_CPHA = SPI_CPHA_2Edge;
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spi.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_8;
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SPI_Init(SPI1, &spi);
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SPI_Cmd(SPI1, ENABLE);
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}
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void initSpi2(void)
|
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{
|
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|
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// Specific to the STM32F103
|
||||
// SPI2 Driver
|
||||
// PB15 28 SPI2_MOSI
|
||||
// PB14 27 SPI2_MISO
|
||||
// PB13 26 SPI2_SCK
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||||
// PB12 25 SPI2_NSS
|
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|
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gpio_config_t gpio;
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SPI_InitTypeDef spi;
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|
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// Enable SPI2 clock
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RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI2, ENABLE);
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RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, ENABLE);
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// MOSI + SCK as output
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gpio.mode = Mode_AF_PP;
|
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gpio.pin = Pin_13 | Pin_15;
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gpio.speed = Speed_50MHz;
|
||||
gpioInit(GPIOB, &gpio);
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// MISO as input
|
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gpio.pin = Pin_14;
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gpio.mode = Mode_IN_FLOATING;
|
||||
gpioInit(GPIOB, &gpio);
|
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// NSS as gpio slave select
|
||||
gpio.pin = Pin_12;
|
||||
gpio.mode = Mode_Out_PP;
|
||||
gpioInit(GPIOB, &gpio);
|
||||
|
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// Init SPI2 hardware
|
||||
SPI_I2S_DeInit(SPI2);
|
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|
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spi.SPI_Mode = SPI_Mode_Master;
|
||||
spi.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
|
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spi.SPI_DataSize = SPI_DataSize_8b;
|
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spi.SPI_NSS = SPI_NSS_Soft;
|
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spi.SPI_FirstBit = SPI_FirstBit_MSB;
|
||||
spi.SPI_CRCPolynomial = 7;
|
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spi.SPI_CPOL = SPI_CPOL_High;
|
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spi.SPI_CPHA = SPI_CPHA_2Edge;
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spi.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_8;
|
||||
|
||||
SPI_Init(SPI2, &spi);
|
||||
SPI_Cmd(SPI2, ENABLE);
|
||||
}
|
||||
|
||||
bool spiInit(SPI_TypeDef *instance)
|
||||
{
|
||||
if (instance == SPI1) {
|
||||
initSpi1();
|
||||
} else if (instance == SPI2) {
|
||||
initSpi2();
|
||||
} else {
|
||||
return false;
|
||||
}
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
uint32_t spiTimeoutUserCallback(SPI_TypeDef *instance)
|
||||
{
|
||||
if (instance == SPI1) {
|
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spi1ErrorCount++;
|
||||
} else if (instance == SPI2) {
|
||||
spi2ErrorCount++;
|
||||
}
|
||||
#ifdef STM32F303xC
|
||||
else {
|
||||
spi3ErrorCount++;
|
||||
return spi3ErrorCount;
|
||||
}
|
||||
#endif
|
||||
return -1;
|
||||
}
|
||||
|
||||
// return uint8_t value or -1 when failure
|
||||
uint8_t spiTransferByte(SPI_TypeDef *instance, uint8_t data)
|
||||
{
|
||||
uint16_t spiTimeout = 1000;
|
||||
|
||||
while (SPI_I2S_GetFlagStatus(instance, SPI_I2S_FLAG_TXE) == RESET)
|
||||
if ((spiTimeout--) == 0)
|
||||
return spiTimeoutUserCallback(instance);
|
||||
|
||||
#ifdef STM32F303xC
|
||||
SPI_SendData8(instance, data);
|
||||
#endif
|
||||
#ifdef STM32F10X
|
||||
SPI_I2S_SendData(instance, data);
|
||||
#endif
|
||||
spiTimeout = 1000;
|
||||
while (SPI_I2S_GetFlagStatus(instance, SPI_I2S_FLAG_RXNE) == RESET)
|
||||
if ((spiTimeout--) == 0)
|
||||
return spiTimeoutUserCallback(instance);
|
||||
|
||||
#ifdef STM32F303xC
|
||||
return ((uint8_t)SPI_ReceiveData8(instance));
|
||||
#endif
|
||||
#ifdef STM32F10X
|
||||
return ((uint8_t)SPI_I2S_ReceiveData(instance));
|
||||
#endif
|
||||
}
|
||||
|
||||
bool spiTransfer(SPI_TypeDef *instance, uint8_t *out, uint8_t *in, int len)
|
||||
{
|
||||
uint16_t spiTimeout = 1000;
|
||||
|
||||
uint8_t b;
|
||||
instance->DR;
|
||||
while (len--) {
|
||||
b = in ? *(in++) : 0xFF;
|
||||
while (SPI_I2S_GetFlagStatus(instance, SPI_I2S_FLAG_TXE) == RESET) {
|
||||
if ((spiTimeout--) == 0)
|
||||
return spiTimeoutUserCallback(instance);
|
||||
}
|
||||
#ifdef STM32F303
|
||||
SPI_I2S_SendData16(instance, b);
|
||||
#endif
|
||||
#ifdef STM32F10X
|
||||
SPI_I2S_SendData(instance, b);
|
||||
#endif
|
||||
while (SPI_I2S_GetFlagStatus(instance, SPI_I2S_FLAG_RXNE) == RESET) {
|
||||
if ((spiTimeout--) == 0)
|
||||
return spiTimeoutUserCallback(instance);
|
||||
}
|
||||
#ifdef STM32F303
|
||||
b = SPI_I2S_ReceiveData16(instance);
|
||||
#endif
|
||||
#ifdef STM32F10X
|
||||
b = SPI_I2S_ReceiveData(instance);
|
||||
#endif
|
||||
if (out)
|
||||
*(out++) = b;
|
||||
}
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
|
||||
void spiSetDivisor(SPI_TypeDef *instance, uint16_t divisor)
|
||||
{
|
||||
#define BR_CLEAR_MASK 0xFFC7
|
||||
|
||||
uint16_t tempRegister;
|
||||
|
||||
SPI_Cmd(instance, DISABLE);
|
||||
|
||||
tempRegister = instance->CR1;
|
||||
|
||||
switch (divisor) {
|
||||
case 2:
|
||||
tempRegister &= BR_CLEAR_MASK;
|
||||
tempRegister |= SPI_BaudRatePrescaler_2;
|
||||
break;
|
||||
|
||||
case 4:
|
||||
tempRegister &= BR_CLEAR_MASK;
|
||||
tempRegister |= SPI_BaudRatePrescaler_4;
|
||||
break;
|
||||
|
||||
case 8:
|
||||
tempRegister &= BR_CLEAR_MASK;
|
||||
tempRegister |= SPI_BaudRatePrescaler_8;
|
||||
break;
|
||||
|
||||
case 16:
|
||||
tempRegister &= BR_CLEAR_MASK;
|
||||
tempRegister |= SPI_BaudRatePrescaler_16;
|
||||
break;
|
||||
|
||||
case 32:
|
||||
tempRegister &= BR_CLEAR_MASK;
|
||||
tempRegister |= SPI_BaudRatePrescaler_32;
|
||||
break;
|
||||
|
||||
case 64:
|
||||
tempRegister &= BR_CLEAR_MASK;
|
||||
tempRegister |= SPI_BaudRatePrescaler_64;
|
||||
break;
|
||||
|
||||
case 128:
|
||||
tempRegister &= BR_CLEAR_MASK;
|
||||
tempRegister |= SPI_BaudRatePrescaler_128;
|
||||
break;
|
||||
|
||||
case 256:
|
||||
tempRegister &= BR_CLEAR_MASK;
|
||||
tempRegister |= SPI_BaudRatePrescaler_256;
|
||||
break;
|
||||
}
|
||||
|
||||
instance->CR1 = tempRegister;
|
||||
|
||||
SPI_Cmd(instance, ENABLE);
|
||||
}
|
||||
|
||||
uint16_t spiGetErrorCounter(SPI_TypeDef *instance)
|
||||
{
|
||||
if (instance == SPI1) {
|
||||
return spi1ErrorCount;
|
||||
} else if (instance == SPI2) {
|
||||
return spi2ErrorCount;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
void spiResetErrorCounter(SPI_TypeDef *instance)
|
||||
{
|
||||
if (instance == SPI1) {
|
||||
spi1ErrorCount = 0;
|
||||
} else if (instance == SPI2) {
|
||||
spi2ErrorCount = 0;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue