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Update RCC_ClockCmd related macros to accomodate G4 register naming convention
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jflyper
parent
5c4b206868
commit
db33c6ce58
2 changed files with 83 additions and 44 deletions
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@ -28,67 +28,87 @@ void RCC_ClockCmd(rccPeriphTag_t periphTag, FunctionalState NewState)
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#if defined(USE_HAL_DRIVER)
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#define __HAL_RCC_CLK_ENABLE(bus, enbit) do { \
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__IO uint32_t tmpreg; \
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SET_BIT(RCC->bus ## ENR, enbit); \
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/* Delay after an RCC peripheral clock enabling */ \
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tmpreg = READ_BIT(RCC->bus ## ENR, enbit); \
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UNUSED(tmpreg); \
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// Note on "suffix" macro parameter:
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// ENR and RSTR naming conventions for buses with multiple registers per bus differs among MCU types.
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// ST decided to use AxBn{L,H}ENR convention for H7 which can be handled with simple "ENR" (or "RSTR") contatenation,
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// while use AxBnENR{1,2} convention for G4 which requires extra "suffix" to be concatenated.
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// Here, we use "suffix" for all MCU types and leave it as empty where not applicable.
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#define NOSUFFIX // Empty
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#define __HAL_RCC_CLK_ENABLE(bus, suffix, enbit) do { \
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__IO uint32_t tmpreg; \
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SET_BIT(RCC->bus ## ENR ## suffix, enbit); \
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/* Delay after an RCC peripheral clock enabling */ \
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tmpreg = READ_BIT(RCC->bus ## ENR ## suffix, enbit); \
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UNUSED(tmpreg); \
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} while(0)
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#define __HAL_RCC_CLK_DISABLE(bus, enbit) (RCC->bus ## ENR &= ~(enbit))
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#define __HAL_RCC_CLK_DISABLE(bus, suffix, enbit) (RCC->bus ## ENR ## suffix &= ~(enbit))
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#define __HAL_RCC_CLK(bus, enbit, newState) \
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if (newState == ENABLE) { \
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__HAL_RCC_CLK_ENABLE(bus, enbit); \
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} else { \
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__HAL_RCC_CLK_DISABLE(bus, enbit); \
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#define __HAL_RCC_CLK(bus, suffix, enbit, newState) \
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if (newState == ENABLE) { \
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__HAL_RCC_CLK_ENABLE(bus, suffix, enbit); \
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} else { \
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__HAL_RCC_CLK_DISABLE(bus, suffix, enbit); \
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}
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switch (tag) {
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case RCC_AHB1:
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__HAL_RCC_CLK(AHB1, mask, NewState);
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__HAL_RCC_CLK(AHB1, NOSUFFIX, mask, NewState);
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break;
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case RCC_AHB2:
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__HAL_RCC_CLK(AHB2, mask, NewState);
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__HAL_RCC_CLK(AHB2, NOSUFFIX, mask, NewState);
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break;
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#ifndef STM32H7
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#if !(defined(STM32H7) || defined(STM32G4))
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case RCC_APB1:
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__HAL_RCC_CLK(APB1, mask, NewState);
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__HAL_RCC_CLK(APB1, NOSUFFIX, mask, NewState);
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break;
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#endif
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case RCC_APB2:
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__HAL_RCC_CLK(APB2, mask, NewState);
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__HAL_RCC_CLK(APB2, NOSUFFIX, mask, NewState);
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break;
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#ifdef STM32H7
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case RCC_AHB3:
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__HAL_RCC_CLK(AHB3, mask, NewState);
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__HAL_RCC_CLK(AHB3, NOSUFFIX, mask, NewState);
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break;
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case RCC_AHB4:
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__HAL_RCC_CLK(AHB4, mask, NewState);
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__HAL_RCC_CLK(AHB4, NOSUFFIX, mask, NewState);
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break;
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case RCC_APB1L:
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__HAL_RCC_CLK(APB1L, mask, NewState);
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__HAL_RCC_CLK(APB1L, NOSUFFIX, mask, NewState);
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break;
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case RCC_APB1H:
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__HAL_RCC_CLK(APB1H, mask, NewState);
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__HAL_RCC_CLK(APB1H, NOSUFFIX, mask, NewState);
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break;
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case RCC_APB3:
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__HAL_RCC_CLK(APB3, mask, NewState);
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__HAL_RCC_CLK(APB3, NOSUFFIX, mask, NewState);
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break;
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case RCC_APB4:
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__HAL_RCC_CLK(APB4, mask, NewState);
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__HAL_RCC_CLK(APB4, NOSUFFIX, mask, NewState);
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break;
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#endif
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#ifdef STM32G4
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case RCC_APB11:
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__HAL_RCC_CLK(APB1, 1, mask, NewState);
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break;
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case RCC_APB12:
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__HAL_RCC_CLK(APB1, 2, mask, NewState);
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break;
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#endif
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}
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#else
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@ -119,61 +139,74 @@ void RCC_ResetCmd(rccPeriphTag_t periphTag, FunctionalState NewState)
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uint32_t mask = 1 << (periphTag & 0x1f);
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// Peripheral reset control relies on RSTR bits are identical to ENR bits where applicable
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#define __HAL_RCC_FORCE_RESET(bus, enbit) (RCC->bus ## RSTR |= (enbit))
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#define __HAL_RCC_RELEASE_RESET(bus, enbit) (RCC->bus ## RSTR &= ~(enbit))
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#define __HAL_RCC_RESET(bus, enbit, NewState) \
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if (NewState == ENABLE) { \
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__HAL_RCC_RELEASE_RESET(bus, enbit); \
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} else { \
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__HAL_RCC_FORCE_RESET(bus, enbit); \
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#define __HAL_RCC_FORCE_RESET(bus, suffix, enbit) (RCC->bus ## RSTR ## suffix |= (enbit))
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#define __HAL_RCC_RELEASE_RESET(bus, suffix, enbit) (RCC->bus ## RSTR ## suffix &= ~(enbit))
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#define __HAL_RCC_RESET(bus, suffix, enbit, NewState) \
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if (NewState == ENABLE) { \
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__HAL_RCC_RELEASE_RESET(bus, suffix, enbit); \
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} else { \
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__HAL_RCC_FORCE_RESET(bus, suffix, enbit); \
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}
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#if defined(USE_HAL_DRIVER)
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switch (tag) {
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case RCC_AHB1:
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__HAL_RCC_RESET(AHB1, mask, NewState);
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__HAL_RCC_RESET(AHB1, NOSUFFIX, mask, NewState);
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break;
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case RCC_AHB2:
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__HAL_RCC_RESET(AHB2, mask, NewState);
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__HAL_RCC_RESET(AHB2, NOSUFFIX, mask, NewState);
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break;
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#ifndef STM32H7
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#if !(defined(STM32H7) || defined(STM32G4))
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case RCC_APB1:
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__HAL_RCC_RESET(APB1, mask, NewState);
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__HAL_RCC_RESET(APB1, NOSUFFIX, mask, NewState);
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break;
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#endif
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case RCC_APB2:
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__HAL_RCC_RESET(APB2, mask, NewState);
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__HAL_RCC_RESET(APB2, NOSUFFIX, mask, NewState);
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break;
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#ifdef STM32H7
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case RCC_AHB3:
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__HAL_RCC_RESET(AHB3, mask, NewState);
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__HAL_RCC_RESET(AHB3, NOSUFFIX, mask, NewState);
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break;
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case RCC_AHB4:
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__HAL_RCC_RESET(AHB4, mask, NewState);
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__HAL_RCC_RESET(AHB4, NOSUFFIX, mask, NewState);
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break;
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case RCC_APB1L:
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__HAL_RCC_RESET(APB1L, mask, NewState);
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__HAL_RCC_RESET(APB1L, NOSUFFIX, mask, NewState);
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break;
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case RCC_APB1H:
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__HAL_RCC_RESET(APB1H, mask, NewState);
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__HAL_RCC_RESET(APB1H, NOSUFFIX, mask, NewState);
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break;
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case RCC_APB3:
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__HAL_RCC_RESET(APB3, mask, NewState);
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__HAL_RCC_RESET(APB3, NOSUFFIX, mask, NewState);
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break;
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case RCC_APB4:
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__HAL_RCC_RESET(APB4, mask, NewState);
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__HAL_RCC_RESET(APB4, NOSUFFIX, mask, NewState);
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break;
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#endif
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#ifdef STM32G4
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case RCC_APB11:
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__HAL_RCC_CLK(APB1, 1, mask, NewState);
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break;
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case RCC_APB12:
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__HAL_RCC_CLK(APB1, 2, mask, NewState);
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break;
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#endif
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}
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@ -35,11 +35,17 @@ enum rcc_reg {
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RCC_APB3,
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RCC_AHB4,
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RCC_APB4,
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#elif defined(STM32G4) || defined(STM32F7)
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#elif defined(STM32F7)
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RCC_AHB2,
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RCC_APB2,
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RCC_APB1,
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RCC_AHB1,
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#elif defined(STM32G4)
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RCC_AHB2,
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RCC_APB2,
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RCC_APB11,
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RCC_APB12,
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RCC_AHB1,
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#else
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RCC_AHB,
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RCC_APB2,
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@ -67,8 +73,8 @@ enum rcc_reg {
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#ifdef STM32G4
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#undef RCC_APB1
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#define RCC_APB11(periph) RCC_ENCODE(RCC_APB1, RCC_APB1ENR1_ ## periph ## EN)
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#define RCC_APB12(periph) RCC_ENCODE(RCC_APB1, RCC_APB1ENR2_ ## periph ## EN)
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#define RCC_APB11(periph) RCC_ENCODE(RCC_APB11, RCC_APB1ENR1_ ## periph ## EN)
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#define RCC_APB12(periph) RCC_ENCODE(RCC_APB12, RCC_APB1ENR2_ ## periph ## EN)
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#define RCC_AHB1(periph) RCC_ENCODE(RCC_AHB1, RCC_AHB1ENR_ ## periph ## EN)
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#define RCC_AHB2(periph) RCC_ENCODE(RCC_AHB2, RCC_AHB2ENR_ ## periph ## EN)
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#endif
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