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Update flash drivers to support QuadSPI
- Update flash w25n01g driver to support QuadSPI. - flash_m25p16 update for QuadSPI support - w25m driver update for QuadSPI support - Use 100Mhz (ULTRAFAST) clock for QuadSPI w25n01 - Conditionalize QUADSPI code in w25n01g driver - Use handle instead of handle_u
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c0ee056d68
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7 changed files with 385 additions and 148 deletions
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@ -33,6 +33,7 @@
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#include "flash_w25n01g.h"
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#include "flash_w25m.h"
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#include "drivers/bus_spi.h"
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#include "drivers/bus_quadspi.h"
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#include "drivers/io.h"
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#include "drivers/time.h"
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@ -41,15 +42,49 @@ static busDevice_t *busdev;
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static flashDevice_t flashDevice;
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#define FLASH_INSTRUCTION_RDID 0x9F
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#ifdef USE_QUADSPI
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static bool flashQuadSpiInit(const flashConfig_t *flashConfig)
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{
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QUADSPI_TypeDef *quadSpiInstance = quadSpiInstanceByDevice(QUADSPI_CFG_TO_DEV(flashConfig->quadSpiDevice));
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quadSpiSetDivisor(quadSpiInstance, QUADSPI_CLOCK_INITIALISATION);
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uint8_t readIdResponse[4];
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bool status = quadSpiReceive1LINE(quadSpiInstance, FLASH_INSTRUCTION_RDID, 8, readIdResponse, sizeof(readIdResponse));
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if (!status) {
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return false;
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}
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flashDevice.io.mode = FLASHIO_QUADSPI;
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flashDevice.io.handle.quadSpi = quadSpiInstance;
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// Manufacturer, memory type, and capacity
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uint32_t chipID = (readIdResponse[0] << 16) | (readIdResponse[1] << 8) | (readIdResponse[2]);
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#ifdef USE_FLASH_W25N01G
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quadSpiSetDivisor(quadSpiInstance, QUADSPI_CLOCK_ULTRAFAST);
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if (w25n01g_detect(&flashDevice, chipID)) {
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return true;
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}
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#endif
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return false;
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}
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#endif // USE_QUADSPI
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#ifdef USE_SPI
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void flashPreInit(const flashConfig_t *flashConfig)
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{
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spiPreinitRegister(flashConfig->csTag, IOCFG_IPU, 1);
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}
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// Read chip identification and send it to device detect
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bool flashInit(const flashConfig_t *flashConfig)
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static bool flashSpiInit(const flashConfig_t *flashConfig)
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{
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// Read chip identification and send it to device detect
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busdev = &busInstance;
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if (flashConfig->csTag) {
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@ -85,11 +120,10 @@ bool flashInit(const flashConfig_t *flashConfig)
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#endif
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#endif
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flashDevice.busdev = busdev;
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flashDevice.io.mode = FLASHIO_SPI;
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flashDevice.io.handle.busdev = busdev;
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#define SPIFLASH_INSTRUCTION_RDID 0x9F
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const uint8_t out[] = { SPIFLASH_INSTRUCTION_RDID, 0, 0, 0, 0 };
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const uint8_t out[] = { FLASH_INSTRUCTION_RDID, 0, 0, 0, 0 };
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delay(50); // short delay required after initialisation of SPI device instance.
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@ -97,18 +131,18 @@ bool flashInit(const flashConfig_t *flashConfig)
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* Some newer chips require one dummy byte to be read; we can read
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* 4 bytes for these chips while retaining backward compatibility.
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*/
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uint8_t in[5];
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in[1] = in[2] = 0;
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uint8_t readIdResponse[5];
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readIdResponse[1] = readIdResponse[2] = 0;
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// Clearing the CS bit terminates the command early so we don't have to read the chip UID:
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#ifdef USE_SPI_TRANSACTION
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spiBusTransactionTransfer(busdev, out, in, sizeof(out));
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spiBusTransactionTransfer(busdev, out, readIdResponse, sizeof(out));
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#else
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spiBusTransfer(busdev, out, in, sizeof(out));
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spiBusTransfer(busdev, out, readIdResponse, sizeof(out));
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#endif
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// Manufacturer, memory type, and capacity
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uint32_t chipID = (in[1] << 16) | (in[2] << 8) | (in[3]);
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uint32_t chipID = (readIdResponse[1] << 16) | (readIdResponse[2] << 8) | (readIdResponse[3]);
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#ifdef USE_FLASH_M25P16
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if (m25p16_detect(&flashDevice, chipID)) {
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@ -123,7 +157,7 @@ bool flashInit(const flashConfig_t *flashConfig)
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#endif
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// Newer chips
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chipID = (in[2] << 16) | (in[3] << 8) | (in[4]);
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chipID = (readIdResponse[2] << 16) | (readIdResponse[3] << 8) | (readIdResponse[4]);
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#ifdef USE_FLASH_W25N01G
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if (w25n01g_detect(&flashDevice, chipID)) {
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@ -141,6 +175,27 @@ bool flashInit(const flashConfig_t *flashConfig)
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return false;
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}
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#endif // USE_SPI
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bool flashInit(const flashConfig_t *flashConfig)
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{
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#ifdef USE_SPI
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bool useSpi = (SPI_CFG_TO_DEV(flashConfig->spiDevice) != SPIINVALID);
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if (useSpi) {
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return flashSpiInit(flashConfig);
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}
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#endif
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#ifdef USE_QUADSPI
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bool useQuadSpi = (QUADSPI_CFG_TO_DEV(flashConfig->quadSpiDevice) != QUADSPIINVALID);
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if (useQuadSpi) {
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return flashQuadSpiInit(flashConfig);
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}
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#endif
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return false;
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}
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bool flashIsReady(void)
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{
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