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https://github.com/betaflight/betaflight.git
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PICO bus_spi_pico changes - work in progress...
Testing w/o DMA Fix SPI_SPEED_20MHZ Add GPIO pin ranges Initial implementation of spiInternalInitStream and spiSequenceStart (mode, speed set up, based on STM32/bus_spi_ll.c) spiCalculateDivider records numbers as calculated in pico-sdk spi_set_baudrate, for use later in spiCalculateClock.
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1 changed files with 220 additions and 15 deletions
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@ -19,6 +19,13 @@
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* If not, see <http://www.gnu.org/licenses/>.
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*/
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/*
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* Clock divider code based on pico-sdk/src/rp2_common/hardware_spi.c
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* Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <stdbool.h>
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#include <stdint.h>
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#include <string.h>
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@ -26,6 +33,7 @@
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#include "platform.h"
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#ifdef USE_SPI
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#define TESTING_NO_DMA 1
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#include "common/maths.h"
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#include "drivers/bus.h"
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@ -43,29 +51,43 @@
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#include "pg/bus_spi.h"
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#define SPI_SPEED_20MHZ 2000000
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#define SPI_SPEED_20MHZ 20000000
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#define SPI_DATAWIDTH 8
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#define SPI_DMA_THRESHOLD 8
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const spiHardware_t spiHardware[] = {
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#ifdef RP2350B
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{
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.device = SPIDEV_0,
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.reg = SPI0,
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.sckPins = {
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{ DEFIO_TAG_E(P2) },
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{ DEFIO_TAG_E(P6) },
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{ DEFIO_TAG_E(P18) },
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{ DEFIO_TAG_E(P22) },
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#ifdef RP2350B
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{ DEFIO_TAG_E(P34) },
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{ DEFIO_TAG_E(P38) },
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#endif
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},
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.misoPins = {
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{ DEFIO_TAG_E(P0) },
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{ DEFIO_TAG_E(P4) },
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{ DEFIO_TAG_E(P16) },
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{ DEFIO_TAG_E(P20) },
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#ifdef RP2350B
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{ DEFIO_TAG_E(P32) },
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{ DEFIO_TAG_E(P36) },
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#endif
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},
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.mosiPins = {
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{ DEFIO_TAG_E(P3) },
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{ DEFIO_TAG_E(P7) },
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{ DEFIO_TAG_E(P19) },
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{ DEFIO_TAG_E(P23) },
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#ifdef RP2350B
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{ DEFIO_TAG_E(P35) },
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{ DEFIO_TAG_E(P39) },
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#endif
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},
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},
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{
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@ -74,17 +96,34 @@ const spiHardware_t spiHardware[] = {
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.sckPins = {
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{ DEFIO_TAG_E(P10) },
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{ DEFIO_TAG_E(P14) },
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{ DEFIO_TAG_E(P26) },
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#ifdef RP2350B
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{ DEFIO_TAG_E(P30) },
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{ DEFIO_TAG_E(P42) },
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{ DEFIO_TAG_E(P46) },
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#endif
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},
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.misoPins = {
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{ DEFIO_TAG_E(P8) },
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{ DEFIO_TAG_E(P12) },
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{ DEFIO_TAG_E(P24) },
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{ DEFIO_TAG_E(P28) },
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#ifdef RP2350B
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{ DEFIO_TAG_E(P40) },
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{ DEFIO_TAG_E(P44) },
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#endif
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},
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.mosiPins = {
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{ DEFIO_TAG_E(P11) },
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{ DEFIO_TAG_E(P15) },
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{ DEFIO_TAG_E(P27) },
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#ifdef RP2350B
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{ DEFIO_TAG_E(P31) },
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{ DEFIO_TAG_E(P43) },
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{ DEFIO_TAG_E(P47) },
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#endif
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},
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},
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#endif
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};
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void spiPinConfigure(const struct spiPinConfig_s *pConfig)
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@ -118,7 +157,8 @@ void spiPinConfigure(const struct spiPinConfig_s *pConfig)
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}
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}
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static spi_inst_t *getSpiInstanceByDevice(SPI0_Type *spi)
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/*
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static spi_inst_t *getSpiInstanceByDevice(SPI_TypeDef *spi)
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{
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if (spi == SPI0) {
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return spi0;
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@ -127,28 +167,97 @@ static spi_inst_t *getSpiInstanceByDevice(SPI0_Type *spi)
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}
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return NULL;
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}
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*/
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static void spiSetClockFromSpeed(spi_inst_t *spi, uint16_t speed)
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{
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uint32_t freq = spiCalculateClock(speed);
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spi_set_baudrate(spi, freq);
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}
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/*
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enum spi_cpha_t { SPI_CPHA_0 = 0, SPI_CPHA_1 = 1 }
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Enumeration of SPI CPHA (clock phase) values.
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enum spi_cpol_t { SPI_CPOL_0 = 0, SPI_CPOL_1 = 1 }
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Enumeration of SPI CPOL (clock polarity) values.
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enum spi_order_t { SPI_LSB_FIRST = 0, SPI_MSB_FIRST = 1 }
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Enumeration of SPI bit-order values.
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static void spi_set_format (spi_inst_t * spi, uint data_bits, spi_cpol_t cpol, spi_cpha_t cpha, __unused spi_order_t order) [inline], [static]
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Configure SPI.
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Configure how the SPI serialises and deserialises data on the wire
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Parameters
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spi
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SPI instance specifier, either spi0 or spi1
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data_bits
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Number of data bits per transfer. Valid values 4..16.
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cpol
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SSPCLKOUT polarity, applicable to Motorola SPI frame format only.
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cpha
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SSPCLKOUT phase, applicable to Motorola SPI frame format only
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order
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Must be SPI_MSB_FIRST, no other values supported on the PL022
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*/
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void spiInitDevice(SPIDevice device)
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{
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// maybe here set getSpiInstanceByDevice(spi->dev) SPI device with
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// settings like
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// STM does
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//SetRXFIFOThreshold ...QF (1/4 full presumably)
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// Init -> full duplex, master, 8biut, baudrate, MSBfirst, no CRC,
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// Clock = PolarityHigh, Phase_2Edge
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const spiDevice_t *spi = &spiDevice[device];
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if (!spi->dev) {
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return;
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}
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spi_init(getSpiInstanceByDevice(spi->dev), SPI_SPEED_20MHZ);
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spi_init(SPI_INST(spi->dev), SPI_SPEED_20MHZ);
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gpio_set_function(IO_PINBYTAG(spi->miso), GPIO_FUNC_SPI);
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gpio_set_function(IO_PINBYTAG(spi->mosi), GPIO_FUNC_SPI);
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gpio_set_function(IO_PINBYTAG(spi->sck), GPIO_FUNC_SPI);
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}
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void spiInitBusDMA(void)
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{
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//TODO: implement
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// if required to set up mappings of peripherals to DMA instances?
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// can just start off with dma_claim_unused_channel in spiInternalInitStream?
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}
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void spiInternalResetStream(dmaChannelDescriptor_t *descriptor)
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{
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//TODO: implement
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UNUSED(descriptor);
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}
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bool spiInternalReadWriteBufPolled(SPI_TypeDef *instance, const uint8_t *txData, uint8_t *rxData, int len)
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{
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// TODO optimise with 16-bit transfers as per stm bus_spi_ll code
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int bytesProcessed = spi_write_read_blocking(SPI_INST(instance), txData, rxData, len);
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return bytesProcessed == len;
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}
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// Initialise DMA before first segment transfer
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void spiInternalInitStream(const extDevice_t *dev, bool preInit)
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{
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UNUSED(preInit);
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@ -159,7 +268,7 @@ void spiInternalInitStream(const extDevice_t *dev, bool preInit)
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dev->bus->dmaTx->channel = dma_tx;
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dev->bus->dmaRx->channel = dma_rx;
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dev->bus->dmaTx->irqHandlerCallback = NULL;
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dev->bus->dmaRx->irqHandlerCallback = spiInternalResetStream;
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dev->bus->dmaRx->irqHandlerCallback = spiInternalResetStream; // TODO: implement - correct callback
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const spiDevice_t *spi = &spiDevice[spiDeviceByInstance(dev->bus->busType_u.spi.instance)];
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dma_channel_config config = dma_channel_get_default_config(dma_tx);
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dma_channel_configure(dma_rx, &config, dev->rxBuf, &spi_get_hw(SPI_INST(spi->dev))->dr, 0, false);
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}
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// Start DMA transfer for the current segment
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void spiInternalStartDMA(const extDevice_t *dev)
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{
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dma_channel_set_trans_count(dev->bus->dmaTx->channel, dev->bus->curSegment->len + 1, false);
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dma_channel_set_trans_count(dev->bus->dmaRx->channel, dev->bus->curSegment->len + 1, false);
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// TODO check correct, was len + 1 now len
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dma_channel_set_trans_count(dev->bus->dmaTx->channel, dev->bus->curSegment->len, false);
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dma_channel_set_trans_count(dev->bus->dmaRx->channel, dev->bus->curSegment->len, false);
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dma_channel_start(dev->bus->dmaTx->channel);
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dma_channel_start(dev->bus->dmaRx->channel);
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void spiSequenceStart(const extDevice_t *dev)
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{
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//TODO: implementation for PICO
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UNUSED(dev);
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// base on STM32/bus_spi_ll.c
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busDevice_t *bus = dev->bus;
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SPI_TypeDef *instance = bus->busType_u.spi.instance;
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spiDevice_t *spi = &spiDevice[spiDeviceByInstance(instance)];
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bool dmaSafe = dev->useDMA;
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#if TESTING_NO_DMA
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dmaSafe = false;
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#endif
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uint32_t xferLen = 0;
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uint32_t segmentCount = 0;
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//
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bus->initSegment = true;
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// Switch bus speed
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if (dev->busType_u.spi.speed != bus->busType_u.spi.speed) {
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spiSetClockFromSpeed(SPI_INST(instance), dev->busType_u.spi.speed);
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bus->busType_u.spi.speed = dev->busType_u.spi.speed;
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}
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// Switch SPI clock polarity/phase if necessary
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if (dev->busType_u.spi.leadingEdge != bus->busType_u.spi.leadingEdge) {
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uint8_t sckPin = IO_PINBYTAG(spi->sck);
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gpio_set_slew_rate(sckPin, GPIO_SLEW_RATE_FAST);
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// Betaflight busDevice / SPI supports modes 0 (leadingEdge True), 3 (leadingEdge False)
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// 0: (CPOL 0, CPHA 0)
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// 3: (CPOL 1, CPHA 1)
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if (dev->busType_u.spi.leadingEdge) {
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spi_set_format(SPI_INST(instance), SPI_DATAWIDTH, SPI_CPOL_0, SPI_CPHA_0, SPI_MSB_FIRST);
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}
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else {
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spi_set_format(SPI_INST(instance), SPI_DATAWIDTH, SPI_CPOL_1, SPI_CPHA_1, SPI_MSB_FIRST);
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}
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bus->busType_u.spi.leadingEdge = dev->busType_u.spi.leadingEdge;
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}
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// NB for RP2350 targets, heap and stack will be in SRAM (single-cycle),
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// so there are no cache issues with DMA.
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for (busSegment_t *checkSegment = (busSegment_t *)bus->curSegment; checkSegment->len; checkSegment++) {
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segmentCount++;
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xferLen += checkSegment->len;
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}
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// Use DMA if possible
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// If there are more than one segments, or a single segment with negateCS negated in the list terminator then force DMA irrespective of length
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if (bus->useDMA && dmaSafe && ((segmentCount > 1) ||
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(xferLen >= SPI_DMA_THRESHOLD) ||
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!bus->curSegment[segmentCount].negateCS)) {
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spiProcessSegmentsDMA(dev);
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} else {
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spiProcessSegmentsPolled(dev);
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}
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}
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uint16_t spiCalculateDivider(uint32_t freq)
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{
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/*
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Divider is probably not needed for the PICO as the baud rate on the
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SPI bus can be set directly.
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SPI clock is set in Betaflight code by calling spiSetClkDivisor, which records a uint16_t value into a .speed field.
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In order to maintain this code (for simplicity), record the prescale and postdiv numbers as calculated in
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pico-sdk/src/rp2_common/hardware_spi.c: spi_set_baudrate()
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In anycase max SPI clock is half the system clock frequency.
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Therefore the minimum divider is 2.
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prescale and postdiv are in range 1..255 and are packed into the return value.
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*/
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return MAX(2, (((clock_get_hz(clk_sys) + (freq / 2)) / freq) + 1) & ~1);
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uint32_t spiClock = clock_get_hz(clk_peri);
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uint32_t prescale, postdiv;
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// Find smallest prescale value which puts output frequency in range of
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// post-divide. Prescale is an even number from 2 to 254 inclusive.
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for (prescale = 2; prescale <= 254; prescale += 2) {
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if (spiClock < prescale * 256 * (uint64_t) freq)
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break;
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}
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if (prescale > 254) {
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prescale = 254;
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}
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// Find largest post-divide which makes output <= freq. Post-divide is
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// an integer in the range 1 to 256 inclusive.
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for (postdiv = 256; postdiv > 1; --postdiv) {
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if (spiClock / (prescale * (postdiv - 1)) > freq)
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break;
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}
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// Store prescale, (postdiv - 1), both in range 0 to 255.
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return (uint16_t)((prescale << 8) + (postdiv - 1));
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}
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uint32_t spiCalculateClock(uint16_t speed)
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{
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/*
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speed contains packed values of prescale and postdiv.
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Retrieve a frequency which will recreate the same prescale and postdiv on a call to spi_set_baudrate().
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*/
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uint32_t spiClock = clock_get_hz(clk_peri);
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uint32_t prescale = speed >> 8;
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uint32_t postdivMinusOne = speed & 0xFF;
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// Set freq to reverse the calculation, so that we would end up with the same prescale and postdiv,
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// hence the same frequency as if we had requested directly from spiCalculateDivider().
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uint32_t freq = 1 + (spiClock/prescale)/(postdivMinusOne + 1);
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return freq;
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}
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#endif
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