From f47b438918d81b675e8f8077ad2aa5fd90ce67f6 Mon Sep 17 00:00:00 2001
From: Faduf <francois.dufourniaud@gadz.org>
Date: Wed, 5 Jul 2017 16:43:10 +0200
Subject: [PATCH] define PLL setting for overclock

---
 src/main/fc/fc_init.c              | 4 ++--
 src/main/target/system_stm32f4xx.c | 6 +++---
 src/main/target/system_stm32f4xx.h | 5 +++++
 3 files changed, 10 insertions(+), 5 deletions(-)

diff --git a/src/main/fc/fc_init.c b/src/main/fc/fc_init.c
index c425a703d7..c56da96854 100644
--- a/src/main/fc/fc_init.c
+++ b/src/main/fc/fc_init.c
@@ -268,11 +268,11 @@ void init(void)
 
 #if defined(STM32F4) && !defined(DISABLE_OVERCLOCK)
     // If F4 Overclocking is set and System core clock is not correct a reset is forced
-    if (systemConfig()->cpu_overclock && SystemCoreClock != 240000000) {
+    if (systemConfig()->cpu_overclock && SystemCoreClock != OC_FREQUENCY_HZ) {
         *((uint32_t *)0x2001FFF8) = 0xBABEFACE; // 128KB SRAM STM32F4XX
         __disable_irq();
         NVIC_SystemReset();
-    } else if (!systemConfig()->cpu_overclock && SystemCoreClock == 240000000) {
+    } else if (!systemConfig()->cpu_overclock && SystemCoreClock == OC_FREQUENCY_HZ) {
         *((uint32_t *)0x2001FFF8) = 0x0;        // 128KB SRAM STM32F4XX
         __disable_irq();
         NVIC_SystemReset();
diff --git a/src/main/target/system_stm32f4xx.c b/src/main/target/system_stm32f4xx.c
index 52c4447bc2..20b31ebd8e 100644
--- a/src/main/target/system_stm32f4xx.c
+++ b/src/main/target/system_stm32f4xx.c
@@ -505,9 +505,9 @@ void SystemInit(void)
 void SystemInitOC(void)
 {
     /* PLL setting for overclocking */
-    pll_n = 480;
-    pll_p = 2;
-    pll_q = 10;
+    pll_n = PLL_N_OC;
+    pll_p = PLL_P_OC;
+    pll_q = PLL_Q_OC;
 
     SystemInit();
 }
diff --git a/src/main/target/system_stm32f4xx.h b/src/main/target/system_stm32f4xx.h
index 5fcc8374e2..f168ebb5ab 100644
--- a/src/main/target/system_stm32f4xx.h
+++ b/src/main/target/system_stm32f4xx.h
@@ -32,6 +32,11 @@
  extern "C" {
 #endif
 
+#define PLL_N_OC         480
+#define PLL_P_OC         2
+#define PLL_Q_OC         10
+#define OC_FREQUENCY_HZ  PLL_N_OC/PLL_P_OC*1000000
+
 extern uint32_t SystemCoreClock;          /*!< System Clock Frequency (Core Clock) */
 extern void SystemInit(void);
 extern void SystemInitOC(void);