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Initialise rtc6705 CS to high.

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Currently the pin initialisation sets it low, this allows any
initialisation glitches on the DATA and CLK lines to possibly be
detected.

This PR changes the order and forces the CS high before any changes to
the DATA and CLK lines.

I know there is information out there that the rtc6705 ignores the CS
but as we are using it lets do it properly.
This commit is contained in:
atomiclama 2017-09-12 13:33:46 +01:00 • committed by atomiclama
parent b1f47c8a87
commit f598145b48
1 changed files with 4 additions and 3 deletions
Download patch file Download diff file Expand all files Collapse all files

7
src/main/drivers/vtx_rtc6705_soft_spi.c
View file

@ -65,11 +65,12 @@ void rtc6705IOInit(void)
rtc6705LePin = IOGetByTag(IO_TAG(RTC6705_SPILE_PIN)); rtc6705LePin = IOGetByTag(IO_TAG(RTC6705_SPILE_PIN));
rtc6705ClkPin = IOGetByTag(IO_TAG(RTC6705_SPICLK_PIN)); rtc6705ClkPin = IOGetByTag(IO_TAG(RTC6705_SPICLK_PIN));
IOInit(rtc6705DataPin, OWNER_SPI_MOSI, RESOURCE_SOFT_OFFSET);
IOConfigGPIO(rtc6705DataPin, IOCFG_OUT_PP);
IOInit(rtc6705LePin, OWNER_SPI_CS, RESOURCE_SOFT_OFFSET); IOInit(rtc6705LePin, OWNER_SPI_CS, RESOURCE_SOFT_OFFSET);
IOConfigGPIO(rtc6705LePin, IOCFG_OUT_PP); IOConfigGPIO(rtc6705LePin, IOCFG_OUT_PP);
RTC6705_SPILE_ON;
IOInit(rtc6705DataPin, OWNER_SPI_MOSI, RESOURCE_SOFT_OFFSET);
IOConfigGPIO(rtc6705DataPin, IOCFG_OUT_PP);
IOInit(rtc6705ClkPin, OWNER_SPI_SCK, RESOURCE_SOFT_OFFSET); IOInit(rtc6705ClkPin, OWNER_SPI_SCK, RESOURCE_SOFT_OFFSET);
IOConfigGPIO(rtc6705ClkPin, IOCFG_OUT_PP); IOConfigGPIO(rtc6705ClkPin, IOCFG_OUT_PP);