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First NERO build
Using sample 722 support based on available documentation (pending update from STM)
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20 changed files with 10088 additions and 470 deletions
9262
lib/main/CMSIS/CM7/Device/ST/STM32F7xx/Include/stm32f722xx.h
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9262
lib/main/CMSIS/CM7/Device/ST/STM32F7xx/Include/stm32f722xx.h
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@ -65,7 +65,7 @@
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* @{
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*/
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/*--------------- STM32F74xxx/STM32F75xxx/STM32F76xxx/STM32F77xxx -------------*/
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#if defined (STM32F745xx) || defined (STM32F746xx) || defined (STM32F756xx) || defined (STM32F765xx) || defined (STM32F767xx) ||\
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#if defined (STM32F722xx) || defined (STM32F745xx) || defined (STM32F746xx) || defined (STM32F756xx) || defined (STM32F765xx) || defined (STM32F767xx) ||\
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defined (STM32F769xx) || defined (STM32F777xx) || defined (STM32F779xx)
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/**
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* @brief AF 0 selection
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@ -295,7 +295,7 @@
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/** @defgroup GPIOEx_Get_Port_Index GPIO Get Port Index
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* @{
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*/
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#if defined (STM32F745xx) || defined (STM32F746xx) || defined (STM32F756xx) || defined (STM32F765xx) ||\
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#if defined (STM32F722xx) || defined (STM32F745xx) || defined (STM32F746xx) || defined (STM32F756xx) || defined (STM32F765xx) ||\
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defined (STM32F767xx) || defined (STM32F769xx) || defined (STM32F777xx) || defined (STM32F779xx)
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#define GPIO_GET_INDEX(__GPIOx__) (uint8_t)(((__GPIOx__) == (GPIOA))? 0U :\
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((__GPIOx__) == (GPIOB))? 1U :\
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@ -359,7 +359,7 @@
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((AF) == GPIO_AF12_OTG_HS_FS) || ((AF) == GPIO_AF12_SDMMC1) || \
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((AF) == GPIO_AF12_FMC) || ((AF) == GPIO_AF15_EVENTOUT) || \
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((AF) == GPIO_AF13_DCMI) || ((AF) == GPIO_AF14_LTDC))
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#elif defined(STM32F745xx)
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#elif defined (STM32F722xx) || defined(STM32F745xx)
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#define IS_GPIO_AF(AF) (((AF) == GPIO_AF0_RTC_50Hz) || ((AF) == GPIO_AF1_TIM1) || \
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((AF) == GPIO_AF0_SWJ) || ((AF) == GPIO_AF0_TRACE) || \
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((AF) == GPIO_AF0_MCO) || ((AF) == GPIO_AF1_TIM2) || \
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@ -105,7 +105,7 @@ typedef struct
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This parameter must be a number between Min_Data = 2 and Max_Data = 15.
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This parameter will be used only when PLLI2S is selected as Clock Source SAI */
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#if defined (STM32F745xx) || defined (STM32F746xx) || defined (STM32F756xx) || defined (STM32F765xx) || defined (STM32F767xx) || \
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#if defined (STM32F722xx) || defined (STM32F745xx) || defined (STM32F746xx) || defined (STM32F756xx) || defined (STM32F765xx) || defined (STM32F767xx) || \
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defined (STM32F769xx) || defined (STM32F777xx) || defined (STM32F779xx)
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uint32_t PLLI2SP; /*!< Specifies the division factor for SPDIF-RX clock.
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This parameter must be a value of @ref RCCEx_PLLI2SP_Clock_Divider.
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@ -126,7 +126,7 @@ typedef struct
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This parameter must be a number between Min_Data = 2 and Max_Data = 15.
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This parameter will be used only when PLLSAI is selected as Clock Source SAI or LTDC */
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#if defined (STM32F745xx) || defined (STM32F746xx) || defined (STM32F756xx) || defined (STM32F765xx) || defined (STM32F767xx) || \
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#if defined (STM32F722xx) || defined (STM32F745xx) || defined (STM32F746xx) || defined (STM32F756xx) || defined (STM32F765xx) || defined (STM32F767xx) || \
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defined (STM32F769xx) || defined (STM32F777xx) || defined (STM32F779xx)
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uint32_t PLLSAIR; /*!< specifies the division factor for LTDC clock
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This parameter must be a number between Min_Data = 2 and Max_Data = 7.
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@ -285,7 +285,7 @@ typedef struct
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* @}
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*/
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#if defined (STM32F745xx) || defined (STM32F746xx) || defined (STM32F756xx) || defined (STM32F765xx) || defined (STM32F767xx) || \
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#if defined (STM32F722xx) || defined (STM32F745xx) || defined (STM32F746xx) || defined (STM32F756xx) || defined (STM32F765xx) || defined (STM32F767xx) || \
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defined (STM32F769xx) || defined (STM32F777xx) || defined (STM32F779xx)
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/** @defgroup RCCEx_PLLI2SP_Clock_Divider RCCEx PLLI2SP Clock Divider
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* @{
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@ -3181,7 +3181,7 @@ uint32_t HAL_RCCEx_GetPeriphCLKFreq(uint32_t PeriphClk);
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(((VALUE) == RCC_TIMPRES_DESACTIVATED) || \
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((VALUE) == RCC_TIMPRES_ACTIVATED))
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#if defined (STM32F745xx) || defined (STM32F746xx) || defined (STM32F756xx)
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#if defined (STM32F722xx) || defined (STM32F745xx) || defined (STM32F746xx) || defined (STM32F756xx)
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#define IS_RCC_SAI1CLKSOURCE(SOURCE) (((SOURCE) == RCC_SAI1CLKSOURCE_PLLSAI) || \
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((SOURCE) == RCC_SAI1CLKSOURCE_PLLI2S) || \
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((SOURCE) == RCC_SAI1CLKSOURCE_PIN))
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@ -1258,7 +1258,7 @@ static HAL_StatusTypeDef PCD_WriteEmptyTxFifo(PCD_HandleTypeDef *hpcd, uint32_t
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ep = &hpcd->IN_ep[epnum];
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len = ep->xfer_len - ep->xfer_count;
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if (len > ep->maxpacket)
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if (len > (int32_t)ep->maxpacket)
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{
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len = ep->maxpacket;
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}
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@ -1273,7 +1273,7 @@ static HAL_StatusTypeDef PCD_WriteEmptyTxFifo(PCD_HandleTypeDef *hpcd, uint32_t
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/* Write the FIFO */
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len = ep->xfer_len - ep->xfer_count;
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if (len > ep->maxpacket)
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if (len > (int32_t)ep->maxpacket)
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{
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len = ep->maxpacket;
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}
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@ -109,7 +109,7 @@
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@endverbatim
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* @{
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*/
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#if defined (STM32F745xx) || defined (STM32F746xx) || defined (STM32F756xx) || defined (STM32F765xx) || \
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#if defined (STM32F722xx) || defined (STM32F745xx) || defined (STM32F746xx) || defined (STM32F756xx) || defined (STM32F765xx) || \
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defined (STM32F767xx) || defined (STM32F769xx) || defined (STM32F777xx) || defined (STM32F779xx)
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/**
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* @brief Initializes the RCC extended peripherals clocks according to the specified
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