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Code Issues Wiki Activity

Added DMA mapping (readonly for now), and enabled timer management for all F4 boards.

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Converting the universal target as well.

Simplified timer management some.

Added F722 support for good measuer.

Fixed SITL, tests.

Cleanup after rebase.

Added support for all timer consumers and F7.

Fixed 'USE_DMA_SPEC' for F3, some cleanups.
This commit is contained in:
mikeller 2019-02-18 02:09:06 +13:00
parent 9f8ad1aa44
commit f8103b8c86
37 changed files with 904 additions and 484 deletions
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103
src/main/drivers/timer_stm32f4xx.c
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@ -22,10 +22,15 @@
#include "common/utils.h"
#include "drivers/dma.h"
#include "drivers/io.h"
#include "drivers/timer_def.h"
#include "stm32f4xx.h"
#include "rcc.h"
#include "timer.h"
const timerDef_t timerDefinitions[HARDWARE_TIMER_DEFINITION_COUNT] = {
{ .TIMx = TIM1, .rcc = RCC_APB2(TIM1), .inputIrq = TIM1_CC_IRQn},
{ .TIMx = TIM2, .rcc = RCC_APB1(TIM2), .inputIrq = TIM2_IRQn},
@ -47,6 +52,104 @@ const timerDef_t timerDefinitions[HARDWARE_TIMER_DEFINITION_COUNT] = {
#endif
};
#if defined(USE_TIMER_MGMT)
#if defined(STM32F40_41xxx)
const timerHardware_t fullTimerHardware[FULL_TIMER_CHANNEL_COUNT] = {
// Auto-generated from 'timer_def.h'
//PORTA
DEF_TIM(TIM2, CH1, PA0, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM2, CH2, PA1, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM2, CH3, PA2, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM2, CH4, PA3, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM2, CH1, PA5, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM1, CH1N, PA7, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM1, CH1, PA8, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM1, CH2, PA9, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM1, CH3, PA10, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM1, CH1N, PA11, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM2, CH1, PA15, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM5, CH1, PA0, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM5, CH2, PA1, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM5, CH3, PA2, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM5, CH4, PA3, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM3, CH1, PA6, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM3, CH2, PA7, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM9, CH1, PA2, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM9, CH2, PA3, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM8, CH1N, PA5, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM8, CH1N, PA7, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM13, CH1, PA6, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM14, CH1, PA7, TIM_USE_ANY, 0, 0),
//PORTB
DEF_TIM(TIM1, CH2N, PB0, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM1, CH3N, PB1, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM2, CH2, PB3, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM2, CH3, PB10, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM2, CH4, PB11, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM1, CH1N, PB13, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM1, CH2N, PB14, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM1, CH3N, PB15, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM3, CH3, PB0, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM3, CH4, PB1, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM3, CH1, PB4, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM3, CH2, PB5, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM4, CH1, PB6, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM4, CH2, PB7, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM4, CH3, PB8, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM4, CH4, PB9, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM8, CH2N, PB0, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM8, CH3N, PB1, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM10, CH1, PB8, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM11, CH1, PB9, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM8, CH2N, PB14, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM8, CH3N, PB15, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM12, CH1, PB14, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM12, CH2, PB15, TIM_USE_ANY, 0, 0),
//PORTC
DEF_TIM(TIM3, CH1, PC6, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM3, CH2, PC7, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM3, CH3, PC8, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM3, CH4, PC9, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM8, CH1, PC6, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM8, CH2, PC7, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM8, CH3, PC8, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM8, CH4, PC9, TIM_USE_ANY, 0, 0),
//PORTD
DEF_TIM(TIM4, CH1, PD12, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM4, CH2, PD13, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM4, CH3, PD14, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM4, CH4, PD15, TIM_USE_ANY, 0, 0),
//PORTE
DEF_TIM(TIM1, CH1N, PE8, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM1, CH1, PE9, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM1, CH2N, PE10, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM1, CH2, PE11, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM1, CH3N, PE12, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM1, CH3, PE13, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM1, CH4, PE14, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM9, CH1, PE5, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM9, CH2, PE6, TIM_USE_ANY, 0, 0),
//PORTF
DEF_TIM(TIM10, CH1, PF6, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM11, CH1, PF7, TIM_USE_ANY, 0, 0),
};
#endif
#endif // USE_TIMER_MGMT
/*
need a mapping from dma and timers to pins, and the values should all be set here to the dmaMotors array.
this mapping could be used for both these motors and for led strip.