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https://github.com/betaflight/betaflight.git
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Configurable UART
This commit is contained in:
jflyper
parent
4ee7a330d6
commit
fdfe9e8af3
15 changed files with 1617 additions and 1604 deletions
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@ -17,9 +17,11 @@
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/*
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* Authors:
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* jflyper - Refactoring, cleanup and made pin-configurable
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* Dominic Clifton - Serial port abstraction, Separation of common STM32 code for cleanflight, various cleanups.
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* Hamasaki/Timecop - Initial baseflight code
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*/
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#include <stdbool.h>
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#include <stdint.h>
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@ -29,207 +31,12 @@
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#include "common/utils.h"
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#include "drivers/gpio.h"
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#include "inverter.h"
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#include "drivers/inverter.h"
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#include "drivers/rcc.h"
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#include "serial.h"
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#include "serial_uart.h"
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#include "serial_uart_impl.h"
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static void usartConfigurePinInversion(uartPort_t *uartPort) {
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#if !defined(USE_INVERTER) && !defined(STM32F303xC)
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UNUSED(uartPort);
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#else
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bool inverted = uartPort->port.options & SERIAL_INVERTED;
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#ifdef USE_INVERTER
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if (inverted) {
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// Enable hardware inverter if available.
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enableInverter(uartPort->USARTx, true);
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}
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#endif
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#ifdef STM32F303xC
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uint32_t inversionPins = 0;
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if (uartPort->port.mode & MODE_TX) {
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inversionPins |= USART_InvPin_Tx;
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}
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if (uartPort->port.mode & MODE_RX) {
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inversionPins |= USART_InvPin_Rx;
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}
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USART_InvPinCmd(uartPort->USARTx, inversionPins, inverted ? ENABLE : DISABLE);
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#endif
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#endif
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}
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static void uartReconfigure(uartPort_t *uartPort)
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{
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USART_InitTypeDef USART_InitStructure;
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USART_Cmd(uartPort->USARTx, DISABLE);
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USART_InitStructure.USART_BaudRate = uartPort->port.baudRate;
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// according to the stm32 documentation wordlen has to be 9 for parity bits
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// this does not seem to matter for rx but will give bad data on tx!
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if (uartPort->port.options & SERIAL_PARITY_EVEN) {
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USART_InitStructure.USART_WordLength = USART_WordLength_9b;
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} else {
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USART_InitStructure.USART_WordLength = USART_WordLength_8b;
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}
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USART_InitStructure.USART_StopBits = (uartPort->port.options & SERIAL_STOPBITS_2) ? USART_StopBits_2 : USART_StopBits_1;
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USART_InitStructure.USART_Parity = (uartPort->port.options & SERIAL_PARITY_EVEN) ? USART_Parity_Even : USART_Parity_No;
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USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
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USART_InitStructure.USART_Mode = 0;
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if (uartPort->port.mode & MODE_RX)
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USART_InitStructure.USART_Mode |= USART_Mode_Rx;
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if (uartPort->port.mode & MODE_TX)
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USART_InitStructure.USART_Mode |= USART_Mode_Tx;
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USART_Init(uartPort->USARTx, &USART_InitStructure);
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usartConfigurePinInversion(uartPort);
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if(uartPort->port.options & SERIAL_BIDIR)
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USART_HalfDuplexCmd(uartPort->USARTx, ENABLE);
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else
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USART_HalfDuplexCmd(uartPort->USARTx, DISABLE);
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USART_Cmd(uartPort->USARTx, ENABLE);
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}
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serialPort_t *uartOpen(UARTDevice device, serialReceiveCallbackPtr rxCallback, uint32_t baudRate, portMode_t mode, portOptions_t options)
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{
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uartPort_t *s = serialUART(device, baudRate, mode, options);
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if (!s)
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return (serialPort_t *)s;
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s->txDMAEmpty = true;
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// common serial initialisation code should move to serialPort::init()
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s->port.rxBufferHead = s->port.rxBufferTail = 0;
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s->port.txBufferHead = s->port.txBufferTail = 0;
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// callback works for IRQ-based RX ONLY
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s->port.rxCallback = rxCallback;
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s->port.mode = mode;
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s->port.baudRate = baudRate;
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s->port.options = options;
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uartReconfigure(s);
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// Receive DMA or IRQ
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DMA_InitTypeDef DMA_InitStructure;
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if (mode & MODE_RX) {
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#ifdef STM32F4
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if (s->rxDMAStream) {
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DMA_StructInit(&DMA_InitStructure);
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DMA_InitStructure.DMA_PeripheralBaseAddr = s->rxDMAPeripheralBaseAddr;
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DMA_InitStructure.DMA_Priority = DMA_Priority_Medium;
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DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
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DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
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DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
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DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
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DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable ;
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DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_1QuarterFull ;
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DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single ;
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DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
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#else
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if (s->rxDMAChannel) {
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DMA_StructInit(&DMA_InitStructure);
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DMA_InitStructure.DMA_PeripheralBaseAddr = s->rxDMAPeripheralBaseAddr;
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DMA_InitStructure.DMA_Priority = DMA_Priority_Medium;
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DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
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DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
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DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
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DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
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DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
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#endif
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DMA_InitStructure.DMA_BufferSize = s->port.rxBufferSize;
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#ifdef STM32F4
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DMA_InitStructure.DMA_Channel = s->rxDMAChannel;
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DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;
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DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
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DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)s->port.rxBuffer;
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DMA_DeInit(s->rxDMAStream);
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DMA_Init(s->rxDMAStream, &DMA_InitStructure);
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DMA_Cmd(s->rxDMAStream, ENABLE);
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USART_DMACmd(s->USARTx, USART_DMAReq_Rx, ENABLE);
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s->rxDMAPos = DMA_GetCurrDataCounter(s->rxDMAStream);
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#else
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DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC;
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DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
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DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)s->port.rxBuffer;
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DMA_DeInit(s->rxDMAChannel);
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DMA_Init(s->rxDMAChannel, &DMA_InitStructure);
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DMA_Cmd(s->rxDMAChannel, ENABLE);
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USART_DMACmd(s->USARTx, USART_DMAReq_Rx, ENABLE);
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s->rxDMAPos = DMA_GetCurrDataCounter(s->rxDMAChannel);
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#endif
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} else {
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USART_ClearITPendingBit(s->USARTx, USART_IT_RXNE);
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USART_ITConfig(s->USARTx, USART_IT_RXNE, ENABLE);
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}
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}
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// Transmit DMA or IRQ
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if (mode & MODE_TX) {
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#ifdef STM32F4
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if (s->txDMAStream) {
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DMA_StructInit(&DMA_InitStructure);
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DMA_InitStructure.DMA_PeripheralBaseAddr = s->txDMAPeripheralBaseAddr;
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DMA_InitStructure.DMA_Priority = DMA_Priority_Medium;
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DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
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DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
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DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
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DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
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DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable ;
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DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_1QuarterFull ;
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DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single ;
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DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
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#else
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if (s->txDMAChannel) {
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DMA_StructInit(&DMA_InitStructure);
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DMA_InitStructure.DMA_PeripheralBaseAddr = s->txDMAPeripheralBaseAddr;
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DMA_InitStructure.DMA_Priority = DMA_Priority_Medium;
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DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
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DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
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DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
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DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
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DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
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#endif
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DMA_InitStructure.DMA_BufferSize = s->port.txBufferSize;
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#ifdef STM32F4
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DMA_InitStructure.DMA_Channel = s->txDMAChannel;
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DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral;
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DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
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DMA_DeInit(s->txDMAStream);
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DMA_Init(s->txDMAStream, &DMA_InitStructure);
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DMA_ITConfig(s->txDMAStream, DMA_IT_TC | DMA_IT_FE | DMA_IT_TE | DMA_IT_DME, ENABLE);
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DMA_SetCurrDataCounter(s->txDMAStream, 0);
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#else
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DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
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DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
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DMA_DeInit(s->txDMAChannel);
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DMA_Init(s->txDMAChannel, &DMA_InitStructure);
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DMA_ITConfig(s->txDMAChannel, DMA_IT_TC, ENABLE);
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DMA_SetCurrDataCounter(s->txDMAChannel, 0);
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s->txDMAChannel->CNDTR = 0;
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#endif
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USART_DMACmd(s->USARTx, USART_DMAReq_Tx, ENABLE);
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} else {
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USART_ITConfig(s->USARTx, USART_IT_TXE, ENABLE);
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}
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}
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USART_Cmd(s->USARTx, ENABLE);
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return (serialPort_t *)s;
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}
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#include "drivers/serial.h"
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#include "drivers/serial_uart.h"
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#include "drivers/serial_uart_impl.h"
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void uartSetBaudRate(serialPort_t *instance, uint32_t baudRate)
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{
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@ -417,3 +224,75 @@ const struct serialPortVTable uartVTable[] = {
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.endWrite = NULL,
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}
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};
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#ifdef USE_UART1
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// USART1 Rx/Tx IRQ Handler
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void USART1_IRQHandler(void)
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{
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uartPort_t *s = &(uartDevmap[UARTDEV_1]->port);
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uartIrqHandler(s);
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}
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#endif
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#ifdef USE_UART2
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// USART2 Rx/Tx IRQ Handler
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void USART2_IRQHandler(void)
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{
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uartPort_t *s = &(uartDevmap[UARTDEV_2]->port);
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uartIrqHandler(s);
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}
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#endif
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#ifdef USE_UART3
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// USART3 Rx/Tx IRQ Handler
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void USART3_IRQHandler(void)
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{
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uartPort_t *s = &(uartDevmap[UARTDEV_3]->port);
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uartIrqHandler(s);
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}
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#endif
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#ifdef USE_UART4
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// UART4 Rx/Tx IRQ Handler
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void UART4_IRQHandler(void)
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{
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uartPort_t *s = &(uartDevmap[UARTDEV_4]->port);
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uartIrqHandler(s);
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}
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#endif
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#ifdef USE_UART5
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// UART5 Rx/Tx IRQ Handler
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void UART5_IRQHandler(void)
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{
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uartPort_t *s = &(uartDevmap[UARTDEV_5]->port);
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uartIrqHandler(s);
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}
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#endif
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#ifdef USE_UART6
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// USART6 Rx/Tx IRQ Handler
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void USART6_IRQHandler(void)
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{
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uartPort_t *s = &(uartDevmap[UARTDEV_6]->port);
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uartIrqHandler(s);
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}
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#endif
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#ifdef USE_UART7
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// UART7 Rx/Tx IRQ Handler
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void UART7_IRQHandler(void)
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{
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uartPort_t *s = &(uartDevmap[UARTDEV_7]->port);
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uartIrqHandler(s);
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}
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#endif
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#ifdef USE_UART8
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// UART8 Rx/Tx IRQ Handler
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void UART8_IRQHandler(void)
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{
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uartPort_t *s = &(uartDevmap[UARTDEV_8]->port);
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uartIrqHandler(s);
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}
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#endif
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