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Post-cleanup of F7 optimizations (#5729)
* Moved ART Prefetch enabling from library to main code * Fixed tabs to spaces * Added F7 LL EX header to simplify work with DMA and TIM * Refactored F7 DSHOT using LL EX * Got rid of overlooked duplicate lines
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a51bea1ebc
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ff4c2bc145
6 changed files with 136 additions and 73 deletions
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@ -69,10 +69,8 @@ FAST_CODE void pwmWriteDshotInt(uint8_t index, uint16_t value)
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{
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bufferSize = loadDmaBuffer(motor->dmaBuffer, 1, packet);
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motor->timer->timerDmaSources |= motor->timerDmaSource;
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// @todo LL_DMA_SetDataLength
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MODIFY_REG(motor->timerHardware->dmaRef->NDTR, DMA_SxNDT, bufferSize);
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// @todo LL_DMA_EnableStream
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SET_BIT(motor->timerHardware->dmaRef->CR, DMA_SxCR_EN);
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LL_EX_DMA_SetDataLength(motor->timerHardware->dmaRef, bufferSize);
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LL_EX_DMA_EnableStream(motor->timerHardware->dmaRef);
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}
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}
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@ -83,10 +81,8 @@ FAST_CODE void pwmCompleteDshotMotorUpdate(uint8_t motorCount)
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for (int i = 0; i < dmaMotorTimerCount; i++) {
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#ifdef USE_DSHOT_DMAR
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if (useBurstDshot) {
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// @todo LL_DMA_SetDataLength
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MODIFY_REG(dmaMotorTimers[i].dmaBurstRef->NDTR, DMA_SxNDT, dmaMotorTimers[i].dmaBurstLength);
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// @todo LL_DMA_EnableStream
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SET_BIT(dmaMotorTimers[i].dmaBurstRef->CR, DMA_SxCR_EN);
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LL_EX_DMA_SetDataLength(dmaMotorTimers[i].dmaBurstRef, dmaMotorTimers[i].dmaBurstLength);
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LL_EX_DMA_EnableStream(dmaMotorTimers[i].dmaBurstRef);
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/* configure the DMA Burst Mode */
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LL_TIM_ConfigDMABurst(dmaMotorTimers[i].timer, LL_TIM_DMABURST_BASEADDR_CCR1, LL_TIM_DMABURST_LENGTH_4TRANSFERS);
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@ -98,7 +94,7 @@ FAST_CODE void pwmCompleteDshotMotorUpdate(uint8_t motorCount)
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/* Reset timer counter */
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LL_TIM_SetCounter(dmaMotorTimers[i].timer, 0);
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/* Enable channel DMA requests */
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SET_BIT(dmaMotorTimers[i].timer->DIER, dmaMotorTimers[i].timerDmaSources);
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LL_EX_TIM_EnableIT(dmaMotorTimers[i].timer, dmaMotorTimers[i].timerDmaSources);
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dmaMotorTimers[i].timerDmaSources = 0;
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}
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}
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@ -111,15 +107,13 @@ static void motor_DMA_IRQHandler(dmaChannelDescriptor_t* descriptor)
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#ifdef USE_DSHOT_DMAR
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if (useBurstDshot) {
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// @todo LL_DMA_DisableStream
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CLEAR_BIT(motor->timerHardware->dmaTimUPRef->CR, DMA_SxCR_EN);
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LL_EX_DMA_DisableStream(motor->timerHardware->dmaTimUPRef);
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LL_TIM_DisableDMAReq_UPDATE(motor->timerHardware->tim);
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} else
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#endif
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{
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// @todo LL_DMA_DisableStream
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CLEAR_BIT(motor->timerHardware->dmaRef->CR, DMA_SxCR_EN);
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CLEAR_BIT(motor->timerHardware->tim->DIER, motor->timerDmaSource);
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LL_EX_DMA_DisableStream(motor->timerHardware->dmaRef);
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LL_EX_TIM_DisableIT(motor->timerHardware->tim, motor->timerDmaSource);
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}
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DMA_CLEAR_FLAG(descriptor, DMA_IT_TCIF);
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@ -155,7 +149,6 @@ void pwmDshotMotorHardwareConfig(const timerHardware_t *timerHardware, uint8_t m
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const uint8_t timerIndex = getTimerIndex(timer);
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const bool configureTimer = (timerIndex == dmaMotorTimerCount - 1);
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// @note original DSHOT for F7 has pulldown instead of pullup
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IOConfigGPIOAF(motorIO, IO_CONFIG(GPIO_MODE_AF_PP, GPIO_SPEED_FREQ_VERY_HIGH, GPIO_PULLDOWN), timerHardware->alternateFunction);
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if (configureTimer) {
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@ -195,12 +188,10 @@ void pwmDshotMotorHardwareConfig(const timerHardware_t *timerHardware, uint8_t m
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}
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LL_TIM_OC_Init(timer, channel, &oc_init);
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LL_TIM_OC_EnablePreload(timer, channel);
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// @note original DSHOT for F7
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LL_TIM_OC_DisableFast(timer, channel);
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if (output & TIMER_OUTPUT_N_CHANNEL) {
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// @todo quick hack to get TIM_CCER_CCxNE from TIM_CCER_CCxE
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LL_TIM_CC_EnableChannel(timer, 4 * channel);
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LL_EX_TIM_CC_EnableNChannel(timer, channel);
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} else {
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LL_TIM_CC_EnableChannel(timer, channel);
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}
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@ -208,7 +199,6 @@ void pwmDshotMotorHardwareConfig(const timerHardware_t *timerHardware, uint8_t m
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if (configureTimer) {
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LL_TIM_EnableAllOutputs(timer);
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LL_TIM_EnableARRPreload(timer);
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// @note original DSHOT for F7
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LL_TIM_EnableCounter(timer);
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}
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@ -229,28 +219,7 @@ void pwmDshotMotorHardwareConfig(const timerHardware_t *timerHardware, uint8_t m
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motor->timer->timerDmaSources &= ~motor->timerDmaSource;
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}
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DMA_TypeDef *dma;
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uint32_t stream;
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if (dmaRef == DMA1_Stream0) { dma = DMA1; stream = LL_DMA_STREAM_0; }
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else if (dmaRef == DMA1_Stream1) { dma = DMA1; stream = LL_DMA_STREAM_1; }
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else if (dmaRef == DMA1_Stream2) { dma = DMA1; stream = LL_DMA_STREAM_2; }
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else if (dmaRef == DMA1_Stream3) { dma = DMA1; stream = LL_DMA_STREAM_3; }
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else if (dmaRef == DMA1_Stream4) { dma = DMA1; stream = LL_DMA_STREAM_4; }
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else if (dmaRef == DMA1_Stream5) { dma = DMA1; stream = LL_DMA_STREAM_5; }
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else if (dmaRef == DMA1_Stream6) { dma = DMA1; stream = LL_DMA_STREAM_6; }
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else if (dmaRef == DMA1_Stream7) { dma = DMA1; stream = LL_DMA_STREAM_7; }
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else if (dmaRef == DMA2_Stream0) { dma = DMA2; stream = LL_DMA_STREAM_0; }
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else if (dmaRef == DMA2_Stream1) { dma = DMA2; stream = LL_DMA_STREAM_1; }
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else if (dmaRef == DMA2_Stream2) { dma = DMA2; stream = LL_DMA_STREAM_2; }
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else if (dmaRef == DMA2_Stream3) { dma = DMA2; stream = LL_DMA_STREAM_3; }
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else if (dmaRef == DMA2_Stream4) { dma = DMA2; stream = LL_DMA_STREAM_4; }
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else if (dmaRef == DMA2_Stream5) { dma = DMA2; stream = LL_DMA_STREAM_5; }
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else if (dmaRef == DMA2_Stream6) { dma = DMA2; stream = LL_DMA_STREAM_6; }
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else if (dmaRef == DMA2_Stream7) { dma = DMA2; stream = LL_DMA_STREAM_7; }
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LL_DMA_DisableStream(dma, stream);
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//CLEAR_BIT(dmaRef->CR, DMA_SxCR_EN);
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LL_DMA_DeInit(dma, stream);
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LL_EX_DMA_DeInit(dmaRef);
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LL_DMA_StructInit(&dma_init);
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#ifdef USE_DSHOT_DMAR
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@ -260,19 +229,8 @@ void pwmDshotMotorHardwareConfig(const timerHardware_t *timerHardware, uint8_t m
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dma_init.Channel = timerHardware->dmaTimUPChannel;
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dma_init.MemoryOrM2MDstAddress = (uint32_t)motor->timer->dmaBurstBuffer;
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dma_init.Direction = LL_DMA_DIRECTION_MEMORY_TO_PERIPH;
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dma_init.FIFOMode = LL_DMA_FIFOMODE_ENABLE;
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dma_init.FIFOThreshold = LL_DMA_FIFOTHRESHOLD_FULL;
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dma_init.MemBurst = LL_DMA_MBURST_SINGLE;
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dma_init.PeriphBurst = LL_DMA_PBURST_SINGLE;
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dma_init.PeriphOrM2MSrcAddress = (uint32_t)&timerHardware->tim->DMAR;
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dma_init.NbData = (pwmProtocolType == PWM_TYPE_PROSHOT1000) ? PROSHOT_DMA_BUFFER_SIZE : DSHOT_DMA_BUFFER_SIZE; // XXX
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dma_init.PeriphOrM2MSrcIncMode = LL_DMA_PERIPH_NOINCREMENT;
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dma_init.MemoryOrM2MDstIncMode = LL_DMA_MEMORY_INCREMENT;
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dma_init.PeriphOrM2MSrcDataSize = LL_DMA_PDATAALIGN_WORD;
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dma_init.MemoryOrM2MDstDataSize = LL_DMA_MDATAALIGN_WORD;
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dma_init.Mode = LL_DMA_MODE_NORMAL;
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dma_init.Priority = LL_DMA_PRIORITY_HIGH;
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} else
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#endif
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{
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@ -281,25 +239,24 @@ void pwmDshotMotorHardwareConfig(const timerHardware_t *timerHardware, uint8_t m
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dma_init.Channel = timerHardware->dmaChannel;
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dma_init.MemoryOrM2MDstAddress = (uint32_t)motor->dmaBuffer;
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dma_init.Direction = LL_DMA_DIRECTION_MEMORY_TO_PERIPH;
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// @note original DSHOT for F7 disabled FIFO for non-burst
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dma_init.FIFOMode = LL_DMA_FIFOMODE_ENABLE;
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dma_init.FIFOThreshold = LL_DMA_FIFOTHRESHOLD_1_4;
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dma_init.MemBurst = LL_DMA_MBURST_SINGLE;
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dma_init.PeriphBurst = LL_DMA_PBURST_SINGLE;
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dma_init.PeriphOrM2MSrcAddress = (uint32_t)timerChCCR(timerHardware);
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dma_init.NbData = pwmProtocolType == PWM_TYPE_PROSHOT1000 ? PROSHOT_DMA_BUFFER_SIZE : DSHOT_DMA_BUFFER_SIZE;
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dma_init.PeriphOrM2MSrcIncMode = LL_DMA_PERIPH_NOINCREMENT;
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dma_init.MemoryOrM2MDstIncMode = LL_DMA_MEMORY_INCREMENT;
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dma_init.PeriphOrM2MSrcDataSize = LL_DMA_PDATAALIGN_WORD;
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dma_init.MemoryOrM2MDstDataSize = LL_DMA_MDATAALIGN_WORD;
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dma_init.Mode = LL_DMA_MODE_NORMAL;
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dma_init.Priority = LL_DMA_PRIORITY_HIGH;
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}
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// XXX Consolidate common settings in the next refactor
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LL_DMA_Init(dma, stream, &dma_init);
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LL_DMA_EnableIT_TC(dma, stream);
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dma_init.Direction = LL_DMA_DIRECTION_MEMORY_TO_PERIPH;
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dma_init.FIFOMode = LL_DMA_FIFOMODE_ENABLE;
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dma_init.MemBurst = LL_DMA_MBURST_SINGLE;
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dma_init.PeriphBurst = LL_DMA_PBURST_SINGLE;
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dma_init.NbData = pwmProtocolType == PWM_TYPE_PROSHOT1000 ? PROSHOT_DMA_BUFFER_SIZE : DSHOT_DMA_BUFFER_SIZE;
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dma_init.PeriphOrM2MSrcIncMode = LL_DMA_PERIPH_NOINCREMENT;
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dma_init.MemoryOrM2MDstIncMode = LL_DMA_MEMORY_INCREMENT;
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dma_init.PeriphOrM2MSrcDataSize = LL_DMA_PDATAALIGN_WORD;
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dma_init.MemoryOrM2MDstDataSize = LL_DMA_MDATAALIGN_WORD;
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dma_init.Mode = LL_DMA_MODE_NORMAL;
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dma_init.Priority = LL_DMA_PRIORITY_HIGH;
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LL_EX_DMA_Init(dmaRef, &dma_init);
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LL_EX_DMA_EnableIT_TC(dmaRef);
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motor->configured = true;
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}
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