1
0
Fork 0
mirror of https://github.com/betaflight/betaflight.git synced 2025-07-19 14:25:20 +03:00

Post-cleanup of F7 optimizations (#5729)

* Moved ART Prefetch enabling from library to main code

* Fixed tabs to spaces

* Added F7 LL EX header to simplify work with DMA and TIM

* Refactored F7 DSHOT using LL EX

* Got rid of overlooked duplicate lines
This commit is contained in:
Andrey Mironov 2018-04-21 09:14:35 +03:00 committed by Michael Keller
parent a51bea1ebc
commit ff4c2bc145
6 changed files with 136 additions and 73 deletions

View file

@ -0,0 +1,104 @@
/*
* This file is part of Betaflight.
*
* Betaflight is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* Betaflight is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with Betaflight. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#ifdef __cplusplus
extern "C" {
#endif
#include "stm32f7xx.h"
#include "common/utils.h"
#define DMA_STREAM_MASK 0xFFU
__STATIC_INLINE DMA_TypeDef *LL_EX_DMA_Stream_to_DMA(DMA_Stream_TypeDef *DMAx_Streamy)
{
// clear stream address
return (DMA_TypeDef *) (((uint32_t) DMAx_Streamy) & ((uint32_t) ~DMA_STREAM_MASK));
}
__STATIC_INLINE uint32_t LL_EX_DMA_Stream_to_Stream(DMA_Stream_TypeDef *DMAx_Streamy)
{
const size_t firstStreamOffset = sizeof(DMA_TypeDef);
const size_t streamSize = sizeof(DMA_Stream_TypeDef);
STATIC_ASSERT(DMA1_Stream0_BASE - DMA1_BASE == firstStreamOffset, DMA_TypeDef_has_padding);
STATIC_ASSERT(DMA1_Stream1_BASE - DMA1_Stream0_BASE == streamSize, DMA_Stream_TypeDef_has_padding);
return (((uint32_t) DMAx_Streamy & DMA_STREAM_MASK) - firstStreamOffset) / streamSize;
}
#undef DMA_STREAM_MASK
__STATIC_INLINE uint32_t LL_EX_DMA_Init(DMA_Stream_TypeDef *DMAx_Streamy, LL_DMA_InitTypeDef *DMA_InitStruct) {
DMA_TypeDef *DMA = LL_EX_DMA_Stream_to_DMA(DMAx_Streamy);
const uint32_t Stream = LL_EX_DMA_Stream_to_Stream(DMAx_Streamy);
return LL_DMA_Init(DMA, Stream, DMA_InitStruct);
}
__STATIC_INLINE uint32_t LL_EX_DMA_DeInit(DMA_Stream_TypeDef *DMAx_Streamy) {
DMA_TypeDef *DMA = LL_EX_DMA_Stream_to_DMA(DMAx_Streamy);
const uint32_t Stream = LL_EX_DMA_Stream_to_Stream(DMAx_Streamy);
return LL_DMA_DeInit(DMA, Stream);
}
__STATIC_INLINE void LL_EX_DMA_SetChannelSelection(DMA_Stream_TypeDef *DMAx_Streamy, uint32_t Channel)
{
MODIFY_REG(DMAx_Streamy->CR, DMA_SxCR_CHSEL, Channel);
}
__STATIC_INLINE void LL_EX_DMA_EnableStream(DMA_Stream_TypeDef *DMAx_Streamy)
{
SET_BIT(DMAx_Streamy->CR, DMA_SxCR_EN);
}
__STATIC_INLINE void LL_EX_DMA_DisableStream(DMA_Stream_TypeDef *DMAx_Streamy)
{
CLEAR_BIT(DMAx_Streamy->CR, DMA_SxCR_EN);
}
__STATIC_INLINE void LL_EX_DMA_EnableIT_TC(DMA_Stream_TypeDef *DMAx_Streamy)
{
SET_BIT(DMAx_Streamy->CR, DMA_SxCR_TCIE);
}
__STATIC_INLINE void LL_EX_DMA_SetDataLength(DMA_Stream_TypeDef* DMAx_Streamy, uint32_t NbData)
{
MODIFY_REG(DMAx_Streamy->NDTR, DMA_SxNDT, NbData);
}
__STATIC_INLINE void LL_EX_TIM_EnableIT(TIM_TypeDef *TIMx, uint32_t Sources)
{
SET_BIT(TIMx->DIER, Sources);
}
__STATIC_INLINE void LL_EX_TIM_DisableIT(TIM_TypeDef *TIMx, uint32_t Sources)
{
CLEAR_BIT(TIMx->DIER, Sources);
}
__STATIC_INLINE void LL_EX_TIM_CC_EnableNChannel(TIM_TypeDef *TIMx, uint32_t Channel)
{
LL_TIM_CC_EnableChannel(TIMx, 4 * Channel);
}
#ifdef __cplusplus
}
#endif