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Post-cleanup of F7 optimizations (#5729)
* Moved ART Prefetch enabling from library to main code * Fixed tabs to spaces * Added F7 LL EX header to simplify work with DMA and TIM * Refactored F7 DSHOT using LL EX * Got rid of overlooked duplicate lines
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6 changed files with 136 additions and 73 deletions
104
src/main/drivers/stm32f7xx_ll_ex.h
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src/main/drivers/stm32f7xx_ll_ex.h
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/*
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* This file is part of Betaflight.
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*
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* Betaflight is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* Betaflight is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with Betaflight. If not, see <http://www.gnu.org/licenses/>.
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*/
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#pragma once
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include "stm32f7xx.h"
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#include "common/utils.h"
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#define DMA_STREAM_MASK 0xFFU
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__STATIC_INLINE DMA_TypeDef *LL_EX_DMA_Stream_to_DMA(DMA_Stream_TypeDef *DMAx_Streamy)
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{
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// clear stream address
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return (DMA_TypeDef *) (((uint32_t) DMAx_Streamy) & ((uint32_t) ~DMA_STREAM_MASK));
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}
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__STATIC_INLINE uint32_t LL_EX_DMA_Stream_to_Stream(DMA_Stream_TypeDef *DMAx_Streamy)
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{
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const size_t firstStreamOffset = sizeof(DMA_TypeDef);
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const size_t streamSize = sizeof(DMA_Stream_TypeDef);
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STATIC_ASSERT(DMA1_Stream0_BASE - DMA1_BASE == firstStreamOffset, DMA_TypeDef_has_padding);
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STATIC_ASSERT(DMA1_Stream1_BASE - DMA1_Stream0_BASE == streamSize, DMA_Stream_TypeDef_has_padding);
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return (((uint32_t) DMAx_Streamy & DMA_STREAM_MASK) - firstStreamOffset) / streamSize;
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}
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#undef DMA_STREAM_MASK
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__STATIC_INLINE uint32_t LL_EX_DMA_Init(DMA_Stream_TypeDef *DMAx_Streamy, LL_DMA_InitTypeDef *DMA_InitStruct) {
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DMA_TypeDef *DMA = LL_EX_DMA_Stream_to_DMA(DMAx_Streamy);
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const uint32_t Stream = LL_EX_DMA_Stream_to_Stream(DMAx_Streamy);
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return LL_DMA_Init(DMA, Stream, DMA_InitStruct);
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}
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__STATIC_INLINE uint32_t LL_EX_DMA_DeInit(DMA_Stream_TypeDef *DMAx_Streamy) {
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DMA_TypeDef *DMA = LL_EX_DMA_Stream_to_DMA(DMAx_Streamy);
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const uint32_t Stream = LL_EX_DMA_Stream_to_Stream(DMAx_Streamy);
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return LL_DMA_DeInit(DMA, Stream);
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}
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__STATIC_INLINE void LL_EX_DMA_SetChannelSelection(DMA_Stream_TypeDef *DMAx_Streamy, uint32_t Channel)
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{
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MODIFY_REG(DMAx_Streamy->CR, DMA_SxCR_CHSEL, Channel);
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}
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__STATIC_INLINE void LL_EX_DMA_EnableStream(DMA_Stream_TypeDef *DMAx_Streamy)
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{
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SET_BIT(DMAx_Streamy->CR, DMA_SxCR_EN);
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}
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__STATIC_INLINE void LL_EX_DMA_DisableStream(DMA_Stream_TypeDef *DMAx_Streamy)
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{
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CLEAR_BIT(DMAx_Streamy->CR, DMA_SxCR_EN);
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}
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__STATIC_INLINE void LL_EX_DMA_EnableIT_TC(DMA_Stream_TypeDef *DMAx_Streamy)
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{
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SET_BIT(DMAx_Streamy->CR, DMA_SxCR_TCIE);
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}
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__STATIC_INLINE void LL_EX_DMA_SetDataLength(DMA_Stream_TypeDef* DMAx_Streamy, uint32_t NbData)
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{
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MODIFY_REG(DMAx_Streamy->NDTR, DMA_SxNDT, NbData);
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}
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__STATIC_INLINE void LL_EX_TIM_EnableIT(TIM_TypeDef *TIMx, uint32_t Sources)
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{
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SET_BIT(TIMx->DIER, Sources);
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}
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__STATIC_INLINE void LL_EX_TIM_DisableIT(TIM_TypeDef *TIMx, uint32_t Sources)
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{
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CLEAR_BIT(TIMx->DIER, Sources);
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}
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__STATIC_INLINE void LL_EX_TIM_CC_EnableNChannel(TIM_TypeDef *TIMx, uint32_t Channel)
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{
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LL_TIM_CC_EnableChannel(TIMx, 4 * Channel);
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}
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#ifdef __cplusplus
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}
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#endif
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