The H730 is a value-line CPU, similar to the H723/H725, but with only
128kb RAM.
The FC firmware code is designed to RUN from external flash in MEMORY
MAPPED mode, via OctoSPI. Use of ITCM/DTCM advised for core loops, like
PID control.
A bootloader is required to enable memory-mapped mode and jump to the
firmware, similar to how EXST bootloader system works.
Config storage is not part of this commit and is a problem when using a
single flash chip in memory mapped mode because the CPU can't run
read/write routines from the flash chip while writing to the flash chip.
Until flash read/write routines are updated the solution requires either
a second flash chip on an SPI interface, or the use of an SD card for
config storage.
Additional commits will support read/write of config to the code/data
storage flash chip to enable cheap and space efficient single-flash-chip
FC solutions.
Squashed commits:
STM32H730 - Workaround issue with 2GB `.elf` files being created.
STM32H730 - Reduce firmware size to 1MB.
STM32H730 - Add USB HS configuration.
STM32H730 - Add ADC internal tag mappings.
STM32H730 - Update all ADC mappings based on the referenced ST
documentation. Add the VBAT channels.
STM32H730 - Fix DMA continuous requests.
STM32H730 - Fix ADC_INTERNAL confusion.
STM32H730/G4 - Disambiguate use of ADC_CHANNEL_INTERNAL_FIRST_ID.
STM32H730 - Fix documentation reference.
STM32H730 - Add DMA request mapping for ADC3.
STM32H730 - Explicitly set the ADC clock.
STM32H730 - Configure PLL2 speeds correctly.
* Tested with Ultrafast 64GB SanDisk SDXC card.
STM32H730 - Use 50Mhz clock for SDXC cards.
* Tested with SanDisk Ultra 64GB. 100Mhz clock gave CRC errors.
STM32H730 - Ensure USB has a lower NVIC priority than the SDMMC card
reads.
If it's higher, 0, then the SDMMC's DMA IRQ handler doesn't get called
when handing USB MSC storage reads.
STM32H730 - Support CPU name in CLI.
STM32H730 - Rebuild when linker scripts changes.
Call targetConfiguration() once before config is loaded and again afterwards in case the config needs to be changed to load from SD card etc
Drop SPI clock during binding
Remove debug
Add per device SPI DMA enable
Fix sdioPinConfigure() declaration warning
Reduce clock speed during SPI RX initialisation
Ensure DMA_RAM section is at start of RAM and the the region defining the shareable region is covered.
Enable USE_LEDSTRIP_CACHE_MGMT on NUCLEOH743 target
NUCLEOF103RG is a target for Nucleo-F103RG (Nucleo-F103RB transplanted
with STM32F103RG which has 1MB of FLASH).
Such hardware with this target comes in handy when a firmware that
doesn't fit in smaller FLASH variant when compiled with DEBUG option.
The target definition files are straight copy of NAZE, except LED0_PIN
has been redefined to use Nucleo's LD2 (User LED).
It is also easy to convert exisiting F1 targets to be built to run on
the Nucleo-F103RG board:
- Add
#define FLASH_PAGE_SIZE 0x800
to target.h
- Also add
#undef USE_DSHOT
#undef USE_LED_STRIP
#undef USE_TRANSPONDER
#undef USE_CAMERA_CONTROL
to target.h to avoid non-F1 compatible code from getting in.
- Add
FLASH_SIZE = 1024
to target.mk
* This bypasses the problem introduced when the .data section was moved
from RAM to DTCM_RAM.
* This also ensures that the hash in the .hex file will be valid when
the hex is flashed to a NAND chip as the hash is generated from the .bin
file content. If the hex contains gaps between sections and the gaps
are erased on the NAND flash then erased sectors are full of 0xFF, not
0x00, which will mean the computed hash won't match.
EXST - Add note regarding currently supported bootloader requirements
regarding the CODE_RAM address.
EXST - Fix make 'dirty' file issue.
When `make` is run twice, the TARGET_BIN is recreated incorrectly.
Root cause was that objcopy actually modifies the INPUT file when no
output file is specified, even when the operation is to extract a
section from the input file...
EXST - Improve messaging when generating EXST bin files.
This should help with understanding of the exact operations required for
EXST bin file generation.
Added warning about hard coded start address.
