/* * This file is part of Cleanflight and Betaflight. * * Cleanflight and Betaflight are free software. You can redistribute * this software and/or modify this software under the terms of the * GNU General Public License as published by the Free Software * Foundation, either version 3 of the License, or (at your option) * any later version. * * Cleanflight and Betaflight are distributed in the hope that they * will be useful, but WITHOUT ANY WARRANTY; without even the implied * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. * See the GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this software. * * If not, see . */ #include #include #include #include "platform.h" #ifdef USE_DMA #include "drivers/nvic.h" #include "drivers/dma.h" #include "drivers/rcc.h" #include "drivers/resource.h" /* * DMA descriptors. */ dmaChannelDescriptor_t dmaDescriptors[DMA_LAST_HANDLER] = { DEFINE_DMA_CHANNEL(DMA1, 0, 0), DEFINE_DMA_CHANNEL(DMA1, 1, 6), DEFINE_DMA_CHANNEL(DMA1, 2, 16), DEFINE_DMA_CHANNEL(DMA1, 3, 22), DEFINE_DMA_CHANNEL(DMA1, 4, 32), DEFINE_DMA_CHANNEL(DMA1, 5, 38), DEFINE_DMA_CHANNEL(DMA1, 6, 48), DEFINE_DMA_CHANNEL(DMA1, 7, 54), DEFINE_DMA_CHANNEL(DMA2, 0, 0), DEFINE_DMA_CHANNEL(DMA2, 1, 6), DEFINE_DMA_CHANNEL(DMA2, 2, 16), DEFINE_DMA_CHANNEL(DMA2, 3, 22), DEFINE_DMA_CHANNEL(DMA2, 4, 32), DEFINE_DMA_CHANNEL(DMA2, 5, 38), DEFINE_DMA_CHANNEL(DMA2, 6, 48), DEFINE_DMA_CHANNEL(DMA2, 7, 54), }; /* * DMA IRQ Handlers */ DEFINE_DMA_IRQ_HANDLER(1, 0, DMA1_ST0_HANDLER) DEFINE_DMA_IRQ_HANDLER(1, 1, DMA1_ST1_HANDLER) DEFINE_DMA_IRQ_HANDLER(1, 2, DMA1_ST2_HANDLER) DEFINE_DMA_IRQ_HANDLER(1, 3, DMA1_ST3_HANDLER) DEFINE_DMA_IRQ_HANDLER(1, 4, DMA1_ST4_HANDLER) DEFINE_DMA_IRQ_HANDLER(1, 5, DMA1_ST5_HANDLER) DEFINE_DMA_IRQ_HANDLER(1, 6, DMA1_ST6_HANDLER) DEFINE_DMA_IRQ_HANDLER(1, 7, DMA1_ST7_HANDLER) DEFINE_DMA_IRQ_HANDLER(2, 0, DMA2_ST0_HANDLER) DEFINE_DMA_IRQ_HANDLER(2, 1, DMA2_ST1_HANDLER) DEFINE_DMA_IRQ_HANDLER(2, 2, DMA2_ST2_HANDLER) DEFINE_DMA_IRQ_HANDLER(2, 3, DMA2_ST3_HANDLER) DEFINE_DMA_IRQ_HANDLER(2, 4, DMA2_ST4_HANDLER) DEFINE_DMA_IRQ_HANDLER(2, 5, DMA2_ST5_HANDLER) DEFINE_DMA_IRQ_HANDLER(2, 6, DMA2_ST6_HANDLER) DEFINE_DMA_IRQ_HANDLER(2, 7, DMA2_ST7_HANDLER) static void enableDmaClock(int index) { RCC_ClockCmd(dmaDescriptors[index].dma == DMA1 ? RCC_AHB1(DMA1) : RCC_AHB1(DMA2), ENABLE); } void dmaEnable(dmaIdentifier_e identifier) { const int index = DMA_IDENTIFIER_TO_INDEX(identifier); enableDmaClock(index); } void dmaSetHandler(dmaIdentifier_e identifier, dmaCallbackHandlerFuncPtr callback, uint32_t priority, uint32_t userParam) { const int index = DMA_IDENTIFIER_TO_INDEX(identifier); enableDmaClock(index); dmaDescriptors[index].irqHandlerCallback = callback; dmaDescriptors[index].userParam = userParam; HAL_NVIC_SetPriority(dmaDescriptors[index].irqN, NVIC_PRIORITY_BASE(priority), NVIC_PRIORITY_SUB(priority)); HAL_NVIC_EnableIRQ(dmaDescriptors[index].irqN); } #endif