/* * This file is part of Cleanflight. * * Cleanflight is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation, either version 3 of the License, or * (at your option) any later version. * * Cleanflight is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with Cleanflight. If not, see . */ #include #include #include "platform.h" #include "system.h" #include "io.h" #include "rcc.h" #include "nvic.h" #include "dma.h" #include "serial.h" #include "serial_uart.h" #include "serial_uart_impl.h" #define UART_RX_BUFFER_SIZE 512 #define UART_TX_BUFFER_SIZE 512 typedef enum UARTDevice { UARTDEV_1 = 0, UARTDEV_2 = 1, UARTDEV_3 = 2, UARTDEV_4 = 3, UARTDEV_5 = 4, UARTDEV_6 = 5 } UARTDevice; typedef struct uartDevice_s { USART_TypeDef* dev; uartPort_t port; uint32_t DMAChannel; DMA_Stream_TypeDef *txDMAStream; DMA_Stream_TypeDef *rxDMAStream; ioTag_t rx; ioTag_t tx; volatile uint8_t rxBuffer[UART_RX_BUFFER_SIZE]; volatile uint8_t txBuffer[UART_TX_BUFFER_SIZE]; uint32_t rcc_ahb1; rccPeriphTag_t rcc_apb2; rccPeriphTag_t rcc_apb1; uint8_t af; uint8_t txIrq; uint8_t rxIrq; uint32_t txPriority; uint32_t rxPriority; } uartDevice_t; //static uartPort_t uartPort[MAX_UARTS]; #ifdef USE_UART1 static uartDevice_t uart1 = { .DMAChannel = DMA_Channel_4, .txDMAStream = DMA2_Stream7, #ifdef USE_UART1_RX_DMA .rxDMAStream = DMA2_Stream5, #endif .dev = USART1, .rx = IO_TAG(UART1_RX_PIN), .tx = IO_TAG(UART1_TX_PIN), .af = GPIO_AF_USART1, #ifdef UART1_AHB1_PERIPHERALS .rcc_ahb1 = UART1_AHB1_PERIPHERALS, #endif .rcc_apb2 = RCC_APB2(USART1), .txIrq = DMA2_ST7_HANDLER, .rxIrq = USART1_IRQn, .txPriority = NVIC_PRIO_SERIALUART1_TXDMA, .rxPriority = NVIC_PRIO_SERIALUART1 }; #endif #ifdef USE_UART2 static uartDevice_t uart2 = { .DMAChannel = DMA_Channel_4, #ifdef USE_UART2_RX_DMA .rxDMAStream = DMA1_Stream5, #endif .txDMAStream = DMA1_Stream6, .dev = USART2, .rx = IO_TAG(UART2_RX_PIN), .tx = IO_TAG(UART2_TX_PIN), .af = GPIO_AF_USART2, #ifdef UART2_AHB1_PERIPHERALS .rcc_ahb1 = UART2_AHB1_PERIPHERALS, #endif .rcc_apb1 = RCC_APB1(USART2), .txIrq = DMA1_ST6_HANDLER, .rxIrq = USART2_IRQn, .txPriority = NVIC_PRIO_SERIALUART2_TXDMA, .rxPriority = NVIC_PRIO_SERIALUART2 }; #endif #ifdef USE_UART3 static uartDevice_t uart3 = { .DMAChannel = DMA_Channel_4, #ifdef USE_UART3_RX_DMA .rxDMAStream = DMA1_Stream1, #endif .txDMAStream = DMA1_Stream3, .dev = USART3, .rx = IO_TAG(UART3_RX_PIN), .tx = IO_TAG(UART3_TX_PIN), .af = GPIO_AF_USART3, #ifdef UART3_AHB1_PERIPHERALS .rcc_ahb1 = UART3_AHB1_PERIPHERALS, #endif .rcc_apb1 = RCC_APB1(USART3), .txIrq = DMA1_ST3_HANDLER, .rxIrq = USART3_IRQn, .txPriority = NVIC_PRIO_SERIALUART3_TXDMA, .rxPriority = NVIC_PRIO_SERIALUART3 }; #endif #ifdef USE_UART4 static uartDevice_t uart4 = { .DMAChannel = DMA_Channel_4, #ifdef USE_UART4_RX_DMA .rxDMAStream = DMA1_Stream2, #endif .txDMAStream = DMA1_Stream4, .dev = UART4, .rx = IO_TAG(UART4_RX_PIN), .tx = IO_TAG(UART4_TX_PIN), .af = GPIO_AF_UART4, #ifdef UART4_AHB1_PERIPHERALS .rcc_ahb1 = UART4_AHB1_PERIPHERALS, #endif .rcc_apb1 = RCC_APB1(UART4), .txIrq = DMA1_ST4_HANDLER, .rxIrq = UART4_IRQn, .txPriority = NVIC_PRIO_SERIALUART4_TXDMA, .rxPriority = NVIC_PRIO_SERIALUART4 }; #endif #ifdef USE_UART5 static uartDevice_t uart5 = { .DMAChannel = DMA_Channel_4, #ifdef USE_UART5_RX_DMA .rxDMAStream = DMA1_Stream0, #endif .txDMAStream = DMA1_Stream7, .dev = UART5, .rx = IO_TAG(UART5_RX_PIN), .tx = IO_TAG(UART5_TX_PIN), .af = GPIO_AF_UART5, #ifdef UART5_AHB1_PERIPHERALS .rcc_ahb1 = UART5_AHB1_PERIPHERALS, #endif .rcc_apb1 = RCC_APB1(UART5), .txIrq = DMA1_ST7_HANDLER, .rxIrq = UART5_IRQn, .txPriority = NVIC_PRIO_SERIALUART5_TXDMA, .rxPriority = NVIC_PRIO_SERIALUART5 }; #endif #ifdef USE_UART6 static uartDevice_t uart6 = { .DMAChannel = DMA_Channel_5, #ifdef USE_UART6_RX_DMA .rxDMAStream = DMA2_Stream1, #endif .txDMAStream = DMA2_Stream6, .dev = USART6, .rx = IO_TAG(UART6_RX_PIN), .tx = IO_TAG(UART6_TX_PIN), .af = GPIO_AF_USART6, #ifdef UART6_AHB1_PERIPHERALS .rcc_ahb1 = UART6_AHB1_PERIPHERALS, #endif .rcc_apb2 = RCC_APB2(USART6), .txIrq = DMA2_ST6_HANDLER, .rxIrq = USART6_IRQn, .txPriority = NVIC_PRIO_SERIALUART6_TXDMA, .rxPriority = NVIC_PRIO_SERIALUART6 }; #endif static uartDevice_t* uartHardwareMap[] = { #ifdef USE_UART1 &uart1, #else NULL, #endif #ifdef USE_UART2 &uart2, #else NULL, #endif #ifdef USE_UART3 &uart3, #else NULL, #endif #ifdef USE_UART4 &uart4, #else NULL, #endif #ifdef USE_UART5 &uart5, #else NULL, #endif #ifdef USE_UART6 &uart6, #else NULL, #endif }; void uartIrqHandler(uartPort_t *s) { if (!s->rxDMAStream && (USART_GetITStatus(s->USARTx, USART_IT_RXNE) == SET)) { if (s->port.rxCallback) { s->port.rxCallback(s->USARTx->DR); } else { s->port.rxBuffer[s->port.rxBufferHead] = s->USARTx->DR; s->port.rxBufferHead = (s->port.rxBufferHead + 1) % s->port.rxBufferSize; } } if (!s->txDMAStream && (USART_GetITStatus(s->USARTx, USART_IT_TXE) == SET)) { if (s->port.txBufferTail != s->port.txBufferHead) { USART_SendData(s->USARTx, s->port.txBuffer[s->port.txBufferTail]); s->port.txBufferTail = (s->port.txBufferTail + 1) % s->port.txBufferSize; } else { USART_ITConfig(s->USARTx, USART_IT_TXE, DISABLE); } } if (USART_GetITStatus(s->USARTx, USART_FLAG_ORE) == SET) { USART_ClearITPendingBit (s->USARTx, USART_IT_ORE); } } static void handleUsartTxDma(uartPort_t *s) { DMA_Cmd(s->txDMAStream, DISABLE); if (s->port.txBufferHead != s->port.txBufferTail) uartStartTxDMA(s); else s->txDMAEmpty = true; } void dmaIRQHandler(dmaChannelDescriptor_t* descriptor) { uartPort_t *s = &(((uartDevice_t*)(descriptor->userParam))->port); if (DMA_GET_FLAG_STATUS(descriptor, DMA_IT_TCIF)) { DMA_CLEAR_FLAG(descriptor, DMA_IT_TCIF); DMA_CLEAR_FLAG(descriptor, DMA_IT_HTIF); if (DMA_GET_FLAG_STATUS(descriptor, DMA_IT_FEIF)) { DMA_CLEAR_FLAG(descriptor, DMA_IT_FEIF); } handleUsartTxDma(s); } if (DMA_GET_FLAG_STATUS(descriptor, DMA_IT_TEIF)) { DMA_CLEAR_FLAG(descriptor, DMA_IT_TEIF); } if (DMA_GET_FLAG_STATUS(descriptor, DMA_IT_DMEIF)) { DMA_CLEAR_FLAG(descriptor, DMA_IT_DMEIF); } } uartPort_t *serialUART(UARTDevice device, uint32_t baudRate, portMode_t mode, portOptions_t options) { uartPort_t *s; NVIC_InitTypeDef NVIC_InitStructure; uartDevice_t *uart = uartHardwareMap[device]; if (!uart) return NULL; s = &(uart->port); s->port.vTable = uartVTable; s->port.baudRate = baudRate; s->port.rxBuffer = uart->rxBuffer; s->port.txBuffer = uart->txBuffer; s->port.rxBufferSize = sizeof(uart->rxBuffer); s->port.txBufferSize = sizeof(uart->txBuffer); s->USARTx = uart->dev; if (uart->rxDMAStream) { s->rxDMAChannel = uart->DMAChannel; s->rxDMAStream = uart->rxDMAStream; dmaInit(dmaGetIdentifier(uart->rxDMAStream), OWNER_SERIAL_RX, RESOURCE_INDEX(device)); } if (uart->txDMAStream) { s->txDMAChannel = uart->DMAChannel; s->txDMAStream = uart->txDMAStream; dmaInit(dmaGetIdentifier(uart->txDMAStream), OWNER_SERIAL_TX, RESOURCE_INDEX(device)); } s->txDMAPeripheralBaseAddr = (uint32_t)&s->USARTx->DR; s->rxDMAPeripheralBaseAddr = (uint32_t)&s->USARTx->DR; IO_t tx = IOGetByTag(uart->tx); IO_t rx = IOGetByTag(uart->rx); if (uart->rcc_apb2) RCC_ClockCmd(uart->rcc_apb2, ENABLE); if (uart->rcc_apb1) RCC_ClockCmd(uart->rcc_apb1, ENABLE); if (uart->rcc_ahb1) RCC_AHB1PeriphClockCmd(uart->rcc_ahb1, ENABLE); if (options & SERIAL_BIDIR) { IOInit(tx, OWNER_SERIAL_TX, RESOURCE_INDEX(device)); IOConfigGPIOAF(tx, IOCFG_AF_OD, uart->af); } else { if (mode & MODE_TX) { IOInit(tx, OWNER_SERIAL_TX, RESOURCE_INDEX(device)); IOConfigGPIOAF(tx, IOCFG_AF_PP_UP, uart->af); } if (mode & MODE_RX) { IOInit(rx, OWNER_SERIAL_RX, RESOURCE_INDEX(device)); IOConfigGPIOAF(rx, IOCFG_AF_PP_UP, uart->af); } } // DMA TX Interrupt dmaSetHandler(uart->txIrq, dmaIRQHandler, uart->txPriority, (uint32_t)uart); if (!(s->rxDMAChannel)) { NVIC_InitStructure.NVIC_IRQChannel = uart->rxIrq; NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = NVIC_PRIORITY_BASE(uart->rxPriority); NVIC_InitStructure.NVIC_IRQChannelSubPriority = NVIC_PRIORITY_SUB(uart->rxPriority); NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; NVIC_Init(&NVIC_InitStructure); } return s; } #ifdef USE_UART1 uartPort_t *serialUART1(uint32_t baudRate, portMode_t mode, portOptions_t options) { return serialUART(UARTDEV_1, baudRate, mode, options); } // USART1 Rx/Tx IRQ Handler void USART1_IRQHandler(void) { uartPort_t *s = &(uartHardwareMap[UARTDEV_1]->port); uartIrqHandler(s); } #endif #ifdef USE_UART2 // USART2 - GPS or Spektrum or ?? (RX + TX by IRQ) uartPort_t *serialUART2(uint32_t baudRate, portMode_t mode, portOptions_t options) { return serialUART(UARTDEV_2, baudRate, mode, options); } void USART2_IRQHandler(void) { uartPort_t *s = &(uartHardwareMap[UARTDEV_2]->port); uartIrqHandler(s); } #endif #ifdef USE_UART3 // USART3 uartPort_t *serialUART3(uint32_t baudRate, portMode_t mode, portOptions_t options) { return serialUART(UARTDEV_3, baudRate, mode, options); } void USART3_IRQHandler(void) { uartPort_t *s = &(uartHardwareMap[UARTDEV_3]->port); uartIrqHandler(s); } #endif #ifdef USE_UART4 // USART4 uartPort_t *serialUART4(uint32_t baudRate, portMode_t mode, portOptions_t options) { return serialUART(UARTDEV_4, baudRate, mode, options); } void UART4_IRQHandler(void) { uartPort_t *s = &(uartHardwareMap[UARTDEV_4]->port); uartIrqHandler(s); } #endif #ifdef USE_UART5 // USART5 uartPort_t *serialUART5(uint32_t baudRate, portMode_t mode, portOptions_t options) { return serialUART(UARTDEV_5, baudRate, mode, options); } void UART5_IRQHandler(void) { uartPort_t *s = &(uartHardwareMap[UARTDEV_5]->port); uartIrqHandler(s); } #endif #ifdef USE_UART6 // USART6 uartPort_t *serialUART6(uint32_t baudRate, portMode_t mode, portOptions_t options) { return serialUART(UARTDEV_6, baudRate, mode, options); } void USART6_IRQHandler(void) { uartPort_t *s = &(uartHardwareMap[UARTDEV_6]->port); uartIrqHandler(s); } #endif