mirror of
https://github.com/betaflight/betaflight.git
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105 lines
No EOL
3.4 KiB
C
105 lines
No EOL
3.4 KiB
C
/*
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* Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include "hardware/exception.h"
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#include "hardware/sync.h"
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#include "pico/platform/cpu_regs.h"
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#ifndef exception_is_compile_time_default
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static bool exception_is_compile_time_default(exception_handler_t handler) {
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#ifdef __riscv
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extern char __unhandled_exception;
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return (uintptr_t)handler == (uintptr_t)__unhandled_exception;
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#else
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extern char __default_isrs_start;
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extern char __default_isrs_end;
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return ((uintptr_t)handler) >= (uintptr_t)&__default_isrs_start &&
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((uintptr_t)handler) < (uintptr_t)&__default_isrs_end;
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#endif
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}
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#endif
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static inline exception_handler_t *get_exception_table(void) {
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#ifdef __riscv
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extern uintptr_t __riscv_exception_table;
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return (exception_handler_t *) &__riscv_exception_table;
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#else
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return (exception_handler_t *) scb_hw->vtor;
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#endif
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}
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static void set_raw_exception_handler_and_restore_interrupts(enum exception_number num, exception_handler_t handler, uint32_t save) {
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// update vtable (vtable_handler may be same or updated depending on cases, but we do it anyway for compactness)
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get_exception_table()[num] = handler;
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__dmb();
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restore_interrupts_from_disabled(save);
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}
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static inline void check_exception_param(__unused enum exception_number num) {
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invalid_params_if(HARDWARE_EXCEPTION, num < MIN_EXCEPTION_NUM || num > MAX_EXCEPTION_NUM);
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}
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exception_handler_t exception_get_vtable_handler(enum exception_number num) {
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check_exception_param(num);
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return get_exception_table()[num];
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}
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exception_handler_t exception_set_exclusive_handler(enum exception_number num, exception_handler_t handler) {
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check_exception_param(num);
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#if !PICO_NO_RAM_VECTOR_TABLE
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uint32_t save = save_and_disable_interrupts();
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exception_handler_t current = exception_get_vtable_handler(num);
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hard_assert(handler == current || exception_is_compile_time_default(current));
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set_raw_exception_handler_and_restore_interrupts(num, handler, save);
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#else
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panic_unsupported();
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#endif
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return current;
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}
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void exception_restore_handler(enum exception_number num, exception_handler_t original_handler) {
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hard_assert(exception_is_compile_time_default(original_handler));
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#if !PICO_NO_RAM_VECTOR_TABLE
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uint32_t save = save_and_disable_interrupts();
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set_raw_exception_handler_and_restore_interrupts(num, original_handler, save);
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#else
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panic_unsupported();
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#endif
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}
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#ifndef __riscv
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static io_rw_32 *get_shpr0(uint num) {
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io_rw_32 *shpr0 = NULL;
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#if __ARM_ARCH_6M__
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// only has shpr2-3
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if (num >= 8 && num < 16) shpr0 = (io_rw_32 *) (PPB_BASE + ARM_CPU_PREFIXED(SHPR2_OFFSET) - 8);
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#elif __ARM_ARCH_8M_MAIN__
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// only has shpr1-3
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if (num >= 4 && num < 16) shpr0 = (io_rw_32 *)(PPB_BASE + ARM_CPU_PREFIXED(SHPR1_OFFSET) - 4);
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#endif
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return shpr0;
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}
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bool exception_set_priority(uint num, uint8_t hardware_priority) {
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io_rw_32 *shpr0 = get_shpr0(num);
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if (shpr0) {
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// note that only 32 bit writes are supported
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shpr0[num / 4] = (shpr0[num/4] & ~(0xffu << (8 * (num & 3u)))) | (((uint32_t) hardware_priority) << (8 * (num & 3u)));
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return true;
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}
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return false;
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}
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uint exception_get_priority(uint num) {
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io_rw_32 *shpr0 = get_shpr0(num);
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if (shpr0) {
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// note that only 32 bit writes are supported
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return (uint8_t) (shpr0[num/4] >> (8 * (num & 3)));
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}
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return PICO_LOWEST_EXCEPTION_PRIORITY;
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}
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#endif |