mirror of
https://github.com/betaflight/betaflight.git
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514 lines
16 KiB
C
514 lines
16 KiB
C
/*
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* This file is part of Betaflight.
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*
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* Betaflight is free software. You can redistribute this software
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* and/or modify this software under the terms of the GNU General
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* Public License as published by the Free Software Foundation,
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* either version 3 of the License, or (at your option) any later
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* version.
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*
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* Betaflight is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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*
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* See the GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public
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* License along with this software.
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*
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* If not, see <http://www.gnu.org/licenses/>.
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*/
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/*
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* Clock divider code based on pico-sdk/src/rp2_common/hardware_spi.c
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* Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <stdbool.h>
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#include <stdint.h>
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#include <string.h>
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#include "platform.h"
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#ifdef USE_SPI
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//#define TESTING_NO_DMA 1
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#include "common/maths.h"
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#include "drivers/bus.h"
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#include "drivers/bus_spi.h"
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#include "drivers/bus_spi_impl.h"
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#include "drivers/exti.h"
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#include "drivers/io.h"
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#include "drivers/io_def.h"
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#include "drivers/io_impl.h"
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#include "drivers/nvic.h"
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#include "hardware/spi.h"
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#include "hardware/gpio.h"
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#include "hardware/clocks.h"
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#include "hardware/dma.h"
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#include "pg/bus_spi.h"
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#define SPI_SPEED_20MHZ 20000000
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#define SPI_DATAWIDTH 8
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#define SPI_DMA_THRESHOLD 8
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const spiHardware_t spiHardware[] = {
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{
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.device = SPIDEV_0,
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.reg = SPI0,
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.sckPins = {
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{ DEFIO_TAG_E(PA2) },
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{ DEFIO_TAG_E(PA6) },
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{ DEFIO_TAG_E(PA18) },
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{ DEFIO_TAG_E(PA22) },
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#ifdef RP2350B
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{ DEFIO_TAG_E(PA34) },
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{ DEFIO_TAG_E(PA38) },
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#endif
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},
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.misoPins = {
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{ DEFIO_TAG_E(PA0) },
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{ DEFIO_TAG_E(PA4) },
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{ DEFIO_TAG_E(PA16) },
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{ DEFIO_TAG_E(PA20) },
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#ifdef RP2350B
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{ DEFIO_TAG_E(PA32) },
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{ DEFIO_TAG_E(PA36) },
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#endif
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},
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.mosiPins = {
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{ DEFIO_TAG_E(PA3) },
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{ DEFIO_TAG_E(PA7) },
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{ DEFIO_TAG_E(PA19) },
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{ DEFIO_TAG_E(PA23) },
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#ifdef RP2350B
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{ DEFIO_TAG_E(PA35) },
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{ DEFIO_TAG_E(PA39) },
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#endif
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},
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},
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{
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.device = SPIDEV_1,
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.reg = SPI1,
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.sckPins = {
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{ DEFIO_TAG_E(PA10) },
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{ DEFIO_TAG_E(PA14) },
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{ DEFIO_TAG_E(PA26) },
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#ifdef RP2350B
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{ DEFIO_TAG_E(PA30) },
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{ DEFIO_TAG_E(PA42) },
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{ DEFIO_TAG_E(PA46) },
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#endif
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},
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.misoPins = {
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{ DEFIO_TAG_E(PA8) },
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{ DEFIO_TAG_E(PA12) },
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{ DEFIO_TAG_E(PA24) },
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{ DEFIO_TAG_E(PA28) },
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#ifdef RP2350B
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{ DEFIO_TAG_E(PA40) },
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{ DEFIO_TAG_E(PA44) },
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#endif
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},
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.mosiPins = {
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{ DEFIO_TAG_E(PA11) },
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{ DEFIO_TAG_E(PA15) },
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{ DEFIO_TAG_E(PA27) },
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#ifdef RP2350B
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{ DEFIO_TAG_E(PA31) },
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{ DEFIO_TAG_E(PA43) },
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{ DEFIO_TAG_E(PA47) },
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#endif
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},
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},
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};
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extern busDevice_t spiBusDevice[SPIDEV_COUNT];
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void spiPinConfigure(const struct spiPinConfig_s *pConfig)
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{
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for (size_t hwindex = 0 ; hwindex < ARRAYLEN(spiHardware) ; hwindex++) {
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const spiHardware_t *hw = &spiHardware[hwindex];
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if (!hw->reg) {
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continue;
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}
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SPIDevice device = hw->device;
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spiDevice_t *pDev = &spiDevice[device];
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for (int pindex = 0 ; pindex < MAX_SPI_PIN_SEL ; pindex++) {
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if (pConfig[device].ioTagSck == hw->sckPins[pindex].pin) {
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pDev->sck = hw->sckPins[pindex].pin;
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}
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if (pConfig[device].ioTagMiso == hw->misoPins[pindex].pin) {
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pDev->miso = hw->misoPins[pindex].pin;
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}
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if (pConfig[device].ioTagMosi == hw->mosiPins[pindex].pin) {
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pDev->mosi = hw->mosiPins[pindex].pin;
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}
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}
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if (pDev->sck && pDev->miso && pDev->mosi) {
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pDev->dev = hw->reg;
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pDev->leadingEdge = false;
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bprintf("spiPinConfigure got dev %p sck %d mosi %d miso %d",
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pDev->dev, pDev->sck, pDev->mosi, pDev->miso);
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}
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}
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}
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static void spiSetClockFromSpeed(spi_inst_t *spi, uint16_t speed)
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{
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uint32_t freq = spiCalculateClock(speed);
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bprintf("spiSetClockFromSpeed %p %d -> %d",spi, speed, freq);
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spi_set_baudrate(spi, freq);
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}
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/*
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enum spi_cpha_t { SPI_CPHA_0 = 0, SPI_CPHA_1 = 1 }
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Enumeration of SPI CPHA (clock phase) values.
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enum spi_cpol_t { SPI_CPOL_0 = 0, SPI_CPOL_1 = 1 }
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Enumeration of SPI CPOL (clock polarity) values.
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enum spi_order_t { SPI_LSB_FIRST = 0, SPI_MSB_FIRST = 1 }
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Enumeration of SPI bit-order values.
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static void spi_set_format (spi_inst_t * spi, uint data_bits, spi_cpol_t cpol, spi_cpha_t cpha, __unused spi_order_t order) [inline], [static]
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Configure SPI.
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Configure how the SPI serialises and deserialises data on the wire
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Parameters
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spi
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SPI instance specifier, either spi0 or spi1
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data_bits
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Number of data bits per transfer. Valid values 4..16.
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cpol
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SSPCLKOUT polarity, applicable to Motorola SPI frame format only.
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cpha
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SSPCLKOUT phase, applicable to Motorola SPI frame format only
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order
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Must be SPI_MSB_FIRST, no other values supported on the PL022
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*/
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void spiInitDevice(SPIDevice device)
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{
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bprintf("pico spiInitDevice %d",device);
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const spiDevice_t *spi = &spiDevice[device];
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if (!spi->dev) {
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return;
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}
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// Set owners
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IOInit(IOGetByTag(spi->sck), OWNER_SPI_SCK, RESOURCE_INDEX(device));
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IOInit(IOGetByTag(spi->miso), OWNER_SPI_SDI, RESOURCE_INDEX(device));
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IOInit(IOGetByTag(spi->mosi), OWNER_SPI_SDO, RESOURCE_INDEX(device));
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spi_init(SPI_INST(spi->dev), SPI_SPEED_20MHZ);
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gpio_set_function(IO_PINBYTAG(spi->miso), GPIO_FUNC_SPI);
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gpio_set_function(IO_PINBYTAG(spi->mosi), GPIO_FUNC_SPI);
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gpio_set_function(IO_PINBYTAG(spi->sck), GPIO_FUNC_SPI);
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bprintf("spi initialised device %p [sck %d mosi %d miso %d]",
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spi->dev, IO_PINBYTAG(spi->sck), IO_PINBYTAG(spi->moso), IO_PINBYTAG(spi->misi));
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}
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void spiInternalStopDMA (const extDevice_t *dev)
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{
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dmaChannelDescriptor_t *dmaRx = dev->bus->dmaRx;
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dmaChannelDescriptor_t *dmaTx = dev->bus->dmaTx;
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if (dmaRx && dma_channel_is_busy(dmaRx->channel)) {
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// Abort active DMA - this should never happen
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bprintf("\n *** pico spiInternalStopDMA RX busy\n");
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dma_channel_abort(dmaRx->channel);
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}
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if (dmaTx && dma_channel_is_busy(dmaTx->channel)) {
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// Abort active DMA - this should never happen as Tx should complete before Rx
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bprintf("\n *** pico spiInternalStopDMA TX busy\n");
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dma_channel_abort(dmaTx->channel);
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}
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}
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// Interrupt handler for SPI receive DMA completion
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FAST_IRQ_HANDLER static void spiRxIrqHandler(dmaChannelDescriptor_t* descriptor)
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{
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const extDevice_t *dev = (const extDevice_t *)descriptor->userParam;
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if (!dev) {
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return;
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}
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busDevice_t *bus = dev->bus;
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if (bus->curSegment->negateCS) {
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// Negate Chip Select
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IOHi(dev->busType_u.spi.csnPin);
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}
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spiInternalStopDMA(dev);
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spiIrqHandler(dev);
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}
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extern dmaChannelDescriptor_t dmaDescriptors[];
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void spiInitBusDMA(void)
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{
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for (uint32_t device = 0; device < SPIDEV_COUNT; device++) {
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busDevice_t *bus = &spiBusDevice[device];
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int32_t channel_tx;
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int32_t channel_rx;
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if (bus->busType != BUS_TYPE_SPI) {
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// This bus is not in use
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continue;
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}
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channel_tx = dma_claim_unused_channel(true);
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if (channel_tx == -1) {
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// no more available channels so give up
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return;
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}
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channel_rx = dma_claim_unused_channel(true);
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if (channel_rx == -1) {
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// no more available channels so give up, first releasing the one
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// channel we did claim
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dma_channel_unclaim(channel_tx);
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return;
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}
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if (!dmaAllocate(DMA_CHANNEL_TO_IDENTIFIER(channel_tx), OWNER_SPI_SDO, device + 1) ||
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!dmaAllocate(DMA_CHANNEL_TO_IDENTIFIER(channel_rx), OWNER_SPI_SDI, device + 1)) {
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// This should never happen if all allocated channels are claimed
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dma_channel_unclaim(channel_tx);
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dma_channel_unclaim(channel_rx);
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return;
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}
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bus->dmaTx = &dmaDescriptors[DMA_CHANNEL_TO_INDEX(channel_tx)];
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bus->dmaTx->channel = channel_tx;
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bus->dmaRx = &dmaDescriptors[DMA_CHANNEL_TO_INDEX(channel_rx)];
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bus->dmaRx->channel = channel_rx;
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// The transaction concludes when the data has been received which will be after transmission is complete
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dmaSetHandler(DMA_CHANNEL_TO_IDENTIFIER(bus->dmaRx->channel), spiRxIrqHandler, NVIC_PRIO_SPI_DMA, 0);
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// We got the required resources, so we can use DMA on this bus
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bus->useDMA = true;
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}
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}
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void spiInternalResetStream(dmaChannelDescriptor_t *descriptor)
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{
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//TODO: implement
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UNUSED(descriptor);
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}
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bool spiInternalReadWriteBufPolled(SPI_TypeDef *instance, const uint8_t *txData, uint8_t *rxData, int len)
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{
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// TODO optimise with 16-bit transfers as per stm bus_spi_ll code
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int bytesProcessed = 0;
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if (txData && rxData) {
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bytesProcessed = spi_write_read_blocking(SPI_INST(instance), txData, rxData, len);
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} else if (txData) {
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bytesProcessed = spi_write_blocking(SPI_INST(instance), txData, len);
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} else if (rxData) {
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// NB tx data: "Generally this can be 0, but some devices require a specific value here, e.g. SD cards expect 0xff" (pico-sdk spi.c).
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uint8_t repeated_tx_data = 0xff; // cf. dummyTxByte in stm bus_spi_ll.c and for DMA here
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bytesProcessed = spi_read_blocking(SPI_INST(instance), repeated_tx_data, rxData, len);
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} else {
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bprintf("\n*** unexpected spiInternalReadWriteBufPolled with no tx, rx");
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}
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return bytesProcessed == len;
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}
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void spiInternalInitStream(const extDevice_t *dev, volatile busSegment_t *segment)
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{
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#ifndef USE_DMA
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UNUSED(dev);
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UNUSED(segment);
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#else
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busDevice_t *bus = dev->bus;
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spi_inst_t *spi = SPI_INST(bus->busType_u.spi.instance);
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// Prepare config, store in dmaInitTx/Rx, to be used in the following spiInternalStartDMA.
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// To keep everything uniform (always both TX and RX channels active, callback always on RX completion), if there is
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// no TX or RX buffer to read from / write to, treat as a single dummy byte with no increment.
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// (cf. same idea on other platform implementations)
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bool isTX = segment->u.buffers.txData;
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bool isRX = segment->u.buffers.rxData;
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dma_channel_config config = dma_channel_get_default_config(bus->dmaTx->channel);
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channel_config_set_transfer_data_size(&config, DMA_SIZE_8);
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channel_config_set_read_increment(&config, isTX);
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channel_config_set_write_increment(&config, false);
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channel_config_set_dreq(&config, spi_get_dreq(spi, true));
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*(bus->dmaInitTx) = config;
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config = dma_channel_get_default_config(bus->dmaRx->channel);
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channel_config_set_transfer_data_size(&config, DMA_SIZE_8);
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channel_config_set_read_increment(&config, false);
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channel_config_set_write_increment(&config, isRX);
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channel_config_set_dreq(&config, spi_get_dreq(spi, false));
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*(bus->dmaInitRx) = config;
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#endif
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}
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// Start DMA transfer for the current segment
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void spiInternalStartDMA(const extDevice_t *dev)
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{
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#ifndef USE_DMA
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UNUSED(dev);
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#else
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static uint8_t dummyTxByte = 0xff;
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static uint8_t dummyRxByte;
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busDevice_t *bus = dev->bus;
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spi_inst_t *spi = SPI_INST(bus->busType_u.spi.instance);
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bus->dmaRx->userParam = (uint32_t)dev;
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volatile busSegment_t *segment = bus->curSegment;
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int xferLen = segment->len;
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const uint8_t *txBuffer = segment->u.buffers.txData;
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uint8_t *rxBuffer = segment->u.buffers.rxData;
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// Configure channels using the config that was created in spiInternalInitStream
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io_rw_32 *dr_ptr = &spi_get_hw(spi)->dr;
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dma_channel_configure(bus->dmaTx->channel, bus->dmaInitTx, dr_ptr, txBuffer ? txBuffer : &dummyTxByte, xferLen, false);
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dma_channel_configure(bus->dmaRx->channel, bus->dmaInitRx, rxBuffer ? rxBuffer : &dummyRxByte, dr_ptr, xferLen, false);
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uint32_t channelMask = (1 << bus->dmaTx->channel) | (1 << bus->dmaRx->channel);
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dma_start_channel_mask(channelMask);
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#endif
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}
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// DMA transfer setup and start
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void spiSequenceStart(const extDevice_t *dev)
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{
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busDevice_t *bus = dev->bus;
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SPI_TypeDef *instance = bus->busType_u.spi.instance;
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spiDevice_t *spi = &spiDevice[spiDeviceByInstance(instance)];
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bool dmaSafe = dev->useDMA;
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#if TESTING_NO_DMA
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dmaSafe = false;
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#endif
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uint32_t xferLen = 0;
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uint32_t segmentCount = 0;
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bus->initSegment = true;
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// Switch bus speed
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if (dev->busType_u.spi.speed != bus->busType_u.spi.speed) {
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spiSetClockFromSpeed(SPI_INST(instance), dev->busType_u.spi.speed);
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bus->busType_u.spi.speed = dev->busType_u.spi.speed;
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}
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// Switch SPI clock polarity/phase if necessary
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if (dev->busType_u.spi.leadingEdge != bus->busType_u.spi.leadingEdge) {
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uint8_t sckPin = IO_PINBYTAG(spi->sck);
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gpio_set_slew_rate(sckPin, GPIO_SLEW_RATE_FAST);
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// Betaflight busDevice / SPI supports modes 0 (leadingEdge True), 3 (leadingEdge False)
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// 0: (CPOL 0, CPHA 0)
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// 3: (CPOL 1, CPHA 1)
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if (dev->busType_u.spi.leadingEdge) {
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spi_set_format(SPI_INST(instance), SPI_DATAWIDTH, SPI_CPOL_0, SPI_CPHA_0, SPI_MSB_FIRST);
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}
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else {
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spi_set_format(SPI_INST(instance), SPI_DATAWIDTH, SPI_CPOL_1, SPI_CPHA_1, SPI_MSB_FIRST);
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}
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bus->busType_u.spi.leadingEdge = dev->busType_u.spi.leadingEdge;
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}
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// NB for RP2350 targets, heap and stack will be in SRAM (single-cycle),
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// so there are no cache issues with DMA.
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for (busSegment_t *checkSegment = (busSegment_t *)bus->curSegment; checkSegment->len; checkSegment++) {
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segmentCount++;
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xferLen += checkSegment->len;
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}
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// Use DMA if possible
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// If there are more than one segments, or a single segment with negateCS negated in the list terminator then force DMA irrespective of length
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if (bus->useDMA && dmaSafe && ((segmentCount > 1) ||
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(xferLen >= SPI_DMA_THRESHOLD) ||
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!bus->curSegment[segmentCount].negateCS)) {
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spiProcessSegmentsDMA(dev);
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} else {
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spiProcessSegmentsPolled(dev);
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}
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}
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uint16_t spiCalculateDivider(uint32_t freq)
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{
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/*
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SPI clock is set in Betaflight code by calling spiSetClkDivisor, which records a uint16_t value into a .speed field.
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In order to maintain this code (for simplicity), record the prescale and postdiv numbers as calculated in
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pico-sdk/src/rp2_common/hardware_spi.c: spi_set_baudrate()
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prescale and postdiv are in range 1..255 and are packed into the return value.
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*/
|
|
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|
uint32_t spiClock = clock_get_hz(clk_peri);
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|
uint32_t prescale, postdiv;
|
|
// Find smallest prescale value which puts output frequency in range of
|
|
// post-divide. Prescale is an even number from 2 to 254 inclusive.
|
|
for (prescale = 2; prescale <= 254; prescale += 2) {
|
|
if (spiClock < prescale * 256 * (uint64_t) freq)
|
|
break;
|
|
}
|
|
if (prescale > 254) {
|
|
prescale = 254;
|
|
}
|
|
|
|
// Find largest post-divide which makes output <= freq. Post-divide is
|
|
// an integer in the range 1 to 256 inclusive.
|
|
for (postdiv = 256; postdiv > 1; --postdiv) {
|
|
if (spiClock / (prescale * (postdiv - 1)) > freq)
|
|
break;
|
|
}
|
|
|
|
// Store prescale, (postdiv - 1), both in range 0 to 255.
|
|
return (uint16_t)((prescale << 8) + (postdiv - 1));
|
|
}
|
|
|
|
uint32_t spiCalculateClock(uint16_t speed)
|
|
{
|
|
/*
|
|
speed contains packed values of prescale and postdiv.
|
|
Retrieve a frequency which will recreate the same prescale and postdiv on a call to spi_set_baudrate().
|
|
*/
|
|
uint32_t spiClock = clock_get_hz(clk_peri);
|
|
uint32_t prescale = speed >> 8;
|
|
uint32_t postdivMinusOne = speed & 0xFF;
|
|
|
|
// Set freq to reverse the calculation, so that we would end up with the same prescale and postdiv,
|
|
// hence the same frequency as if we had requested directly from spiCalculateDivider().
|
|
uint32_t freq = 1 + (spiClock/prescale)/(postdivMinusOne + 1);
|
|
|
|
return freq;
|
|
}
|
|
|
|
|
|
#endif
|