mirror of
https://github.com/betaflight/betaflight.git
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72ab5b1275
* Re-arranging VCP files in preparation for AT32 * Tab size 4 * Adding ADC driver for AT32F43x * RCC code here is STM32 specific. * Adding rcc.c for AT32 * pwm_output.c has very specific MCU coupling - to be re factored. * Separating exti.c * Split up io.c int stm32/io_stm32.c and at32/io_at32.c * Adding in VCP files for AT32 and move timer - note will require more cleanup * Solving for sanity checks * Inadvertent inclusion of timer.c for HAL * rcc.c, timer.c and moving other spevific files out of the driver directory * Adding I2C drivers * Formatting * ws2811 driver and usb_msc driver skeleton
290 lines
6.8 KiB
C
290 lines
6.8 KiB
C
/*
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* This file is part of Cleanflight and Betaflight.
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*
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* Cleanflight and Betaflight are free software. You can redistribute
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* this software and/or modify this software under the terms of the
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* GNU General Public License as published by the Free Software
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* Foundation, either version 3 of the License, or (at your option)
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* any later version.
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*
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* Cleanflight and Betaflight are distributed in the hope that they
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* will be useful, but WITHOUT ANY WARRANTY; without even the implied
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* warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See the GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this software.
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*
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* If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "platform.h"
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#include "drivers/io.h"
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#include "drivers/io_impl.h"
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#include "drivers/rcc.h"
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#include "common/utils.h"
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// io ports defs are stored in array by index now
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struct ioPortDef_s {
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rccPeriphTag_t rcc;
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};
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#if defined(STM32F4)
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const struct ioPortDef_s ioPortDefs[] = {
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{ RCC_AHB1(GPIOA) },
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{ RCC_AHB1(GPIOB) },
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{ RCC_AHB1(GPIOC) },
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{ RCC_AHB1(GPIOD) },
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{ RCC_AHB1(GPIOE) },
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{ RCC_AHB1(GPIOF) },
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};
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#elif defined(STM32F7)
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const struct ioPortDef_s ioPortDefs[] = {
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{ RCC_AHB1(GPIOA) },
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{ RCC_AHB1(GPIOB) },
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{ RCC_AHB1(GPIOC) },
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{ RCC_AHB1(GPIOD) },
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{ RCC_AHB1(GPIOE) },
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{ RCC_AHB1(GPIOF) },
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};
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#elif defined(STM32H7)
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const struct ioPortDef_s ioPortDefs[] = {
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{ RCC_AHB4(GPIOA) },
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{ RCC_AHB4(GPIOB) },
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{ RCC_AHB4(GPIOC) },
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{ RCC_AHB4(GPIOD) },
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{ RCC_AHB4(GPIOE) },
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{ RCC_AHB4(GPIOF) },
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{ RCC_AHB4(GPIOG) },
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{ RCC_AHB4(GPIOH) },
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#if !(defined(STM32H723xx) || defined(STM32H725xx) || defined(STM32H730xx))
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{ RCC_AHB4(GPIOI) },
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#endif
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};
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#elif defined(STM32G4)
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const struct ioPortDef_s ioPortDefs[] = {
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{ RCC_AHB2(GPIOA) },
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{ RCC_AHB2(GPIOB) },
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{ RCC_AHB2(GPIOC) },
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{ RCC_AHB2(GPIOD) },
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{ RCC_AHB2(GPIOE) },
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{ RCC_AHB2(GPIOF) },
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};
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#else
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# error "IO PortDefs not defined for MCU"
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#endif
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// mask on stm32f103, bit index on stm32f303
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uint32_t IO_EXTI_Line(IO_t io)
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{
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if (!io) {
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return 0;
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}
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#if defined(STM32F4) || defined(STM32F7) || defined(STM32H7) || defined(STM32G4)
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return 1 << IO_GPIOPinIdx(io);
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#elif defined(SIMULATOR_BUILD)
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return 0;
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#else
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# error "Unknown target type"
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#endif
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}
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bool IORead(IO_t io)
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{
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if (!io) {
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return false;
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}
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#if defined(USE_FULL_LL_DRIVER)
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return (LL_GPIO_ReadInputPort(IO_GPIO(io)) & IO_Pin(io));
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#elif defined(USE_HAL_DRIVER)
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return !! HAL_GPIO_ReadPin(IO_GPIO(io), IO_Pin(io));
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#else
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return (IO_GPIO(io)->IDR & IO_Pin(io));
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#endif
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}
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void IOWrite(IO_t io, bool hi)
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{
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if (!io) {
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return;
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}
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#if defined(USE_FULL_LL_DRIVER)
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LL_GPIO_SetOutputPin(IO_GPIO(io), IO_Pin(io) << (hi ? 0 : 16));
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#elif defined(USE_HAL_DRIVER)
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HAL_GPIO_WritePin(IO_GPIO(io), IO_Pin(io), hi ? GPIO_PIN_SET : GPIO_PIN_RESET);
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#elif defined(STM32F4)
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if (hi) {
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IO_GPIO(io)->BSRRL = IO_Pin(io);
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} else {
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IO_GPIO(io)->BSRRH = IO_Pin(io);
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}
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#else
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IO_GPIO(io)->BSRR = IO_Pin(io) << (hi ? 0 : 16);
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#endif
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}
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void IOHi(IO_t io)
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{
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if (!io) {
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return;
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}
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#if defined(USE_FULL_LL_DRIVER)
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LL_GPIO_SetOutputPin(IO_GPIO(io), IO_Pin(io));
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#elif defined(USE_HAL_DRIVER)
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HAL_GPIO_WritePin(IO_GPIO(io), IO_Pin(io), GPIO_PIN_SET);
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#elif defined(STM32F4)
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IO_GPIO(io)->BSRRL = IO_Pin(io);
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#else
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IO_GPIO(io)->BSRR = IO_Pin(io);
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#endif
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}
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void IOLo(IO_t io)
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{
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if (!io) {
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return;
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}
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#if defined(USE_FULL_LL_DRIVER)
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LL_GPIO_ResetOutputPin(IO_GPIO(io), IO_Pin(io));
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#elif defined(USE_HAL_DRIVER)
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HAL_GPIO_WritePin(IO_GPIO(io), IO_Pin(io), GPIO_PIN_RESET);
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#elif defined(STM32F4)
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IO_GPIO(io)->BSRRH = IO_Pin(io);
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#else
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IO_GPIO(io)->BRR = IO_Pin(io);
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#endif
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}
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void IOToggle(IO_t io)
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{
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if (!io) {
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return;
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}
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uint32_t mask = IO_Pin(io);
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// Read pin state from ODR but write to BSRR because it only changes the pins
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// high in the mask value rather than all pins. XORing ODR directly risks
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// setting other pins incorrectly because it change all pins' state.
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#if defined(USE_FULL_LL_DRIVER)
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if (LL_GPIO_ReadOutputPort(IO_GPIO(io)) & mask) {
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mask <<= 16; // bit is set, shift mask to reset half
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}
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LL_GPIO_SetOutputPin(IO_GPIO(io), mask);
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#elif defined(USE_HAL_DRIVER)
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UNUSED(mask);
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HAL_GPIO_TogglePin(IO_GPIO(io), IO_Pin(io));
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#elif defined(STM32F4)
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if (IO_GPIO(io)->ODR & mask) {
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IO_GPIO(io)->BSRRH = mask;
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} else {
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IO_GPIO(io)->BSRRL = mask;
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}
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#else
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if (IO_GPIO(io)->ODR & mask) {
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mask <<= 16; // bit is set, shift mask to reset half
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}
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IO_GPIO(io)->BSRR = mask;
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#endif
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}
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#if defined(STM32H7) || defined(STM32G4)
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void IOConfigGPIO(IO_t io, ioConfig_t cfg)
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{
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IOConfigGPIOAF(io, cfg, 0);
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}
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void IOConfigGPIOAF(IO_t io, ioConfig_t cfg, uint8_t af)
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{
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if (!io) {
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return;
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}
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rccPeriphTag_t rcc = ioPortDefs[IO_GPIOPortIdx(io)].rcc;
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RCC_ClockCmd(rcc, ENABLE);
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GPIO_InitTypeDef init = {
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.Pin = IO_Pin(io),
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.Mode = (cfg >> 0) & 0x13,
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.Speed = (cfg >> 2) & 0x03,
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.Pull = (cfg >> 5) & 0x03,
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.Alternate = af
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};
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HAL_GPIO_Init(IO_GPIO(io), &init);
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}
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#elif defined(STM32F7)
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void IOConfigGPIO(IO_t io, ioConfig_t cfg)
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{
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IOConfigGPIOAF(io, cfg, 0);
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}
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void IOConfigGPIOAF(IO_t io, ioConfig_t cfg, uint8_t af)
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{
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if (!io) {
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return;
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}
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const rccPeriphTag_t rcc = ioPortDefs[IO_GPIOPortIdx(io)].rcc;
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RCC_ClockCmd(rcc, ENABLE);
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LL_GPIO_InitTypeDef init = {
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.Pin = IO_Pin(io),
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.Mode = (cfg >> 0) & 0x03,
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.Speed = (cfg >> 2) & 0x03,
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.OutputType = (cfg >> 4) & 0x01,
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.Pull = (cfg >> 5) & 0x03,
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.Alternate = af
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};
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LL_GPIO_Init(IO_GPIO(io), &init);
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}
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#elif defined(STM32F4)
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void IOConfigGPIO(IO_t io, ioConfig_t cfg)
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{
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if (!io) {
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return;
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}
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const rccPeriphTag_t rcc = ioPortDefs[IO_GPIOPortIdx(io)].rcc;
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RCC_ClockCmd(rcc, ENABLE);
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GPIO_InitTypeDef init = {
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.GPIO_Pin = IO_Pin(io),
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.GPIO_Mode = (cfg >> 0) & 0x03,
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.GPIO_Speed = (cfg >> 2) & 0x03,
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.GPIO_OType = (cfg >> 4) & 0x01,
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.GPIO_PuPd = (cfg >> 5) & 0x03,
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};
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GPIO_Init(IO_GPIO(io), &init);
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}
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void IOConfigGPIOAF(IO_t io, ioConfig_t cfg, uint8_t af)
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{
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if (!io) {
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return;
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}
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const rccPeriphTag_t rcc = ioPortDefs[IO_GPIOPortIdx(io)].rcc;
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RCC_ClockCmd(rcc, ENABLE);
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GPIO_PinAFConfig(IO_GPIO(io), IO_GPIO_PinSource(io), af);
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GPIO_InitTypeDef init = {
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.GPIO_Pin = IO_Pin(io),
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.GPIO_Mode = (cfg >> 0) & 0x03,
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.GPIO_Speed = (cfg >> 2) & 0x03,
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.GPIO_OType = (cfg >> 4) & 0x01,
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.GPIO_PuPd = (cfg >> 5) & 0x03,
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};
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GPIO_Init(IO_GPIO(io), &init);
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}
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#else
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# warning MCU not set
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#endif
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