mirror of
https://github.com/betaflight/betaflight.git
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242 lines
7.7 KiB
C
242 lines
7.7 KiB
C
/*
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* This file is part of Cleanflight and Betaflight.
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*
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* Cleanflight and Betaflight are free software. You can redistribute
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* this software and/or modify this software under the terms of the
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* GNU General Public License as published by the Free Software
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* Foundation, either version 3 of the License, or (at your option)
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* any later version.
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*
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* Cleanflight and Betaflight are distributed in the hope that they
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* will be useful, but WITHOUT ANY WARRANTY; without even the implied
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* warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See the GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this software.
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*
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* If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "platform.h"
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#ifdef USE_TIMER
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#include "common/utils.h"
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#include "drivers/dma.h"
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#include "drivers/io.h"
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#include "timer_def.h"
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#include "stm32f4xx.h"
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#include "drivers/rcc.h"
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#include "drivers/timer.h"
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const timerDef_t timerDefinitions[HARDWARE_TIMER_DEFINITION_COUNT] = {
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{ .TIMx = TIM1, .rcc = RCC_APB2(TIM1), .inputIrq = TIM1_CC_IRQn},
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{ .TIMx = TIM2, .rcc = RCC_APB1(TIM2), .inputIrq = TIM2_IRQn},
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{ .TIMx = TIM3, .rcc = RCC_APB1(TIM3), .inputIrq = TIM3_IRQn},
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{ .TIMx = TIM4, .rcc = RCC_APB1(TIM4), .inputIrq = TIM4_IRQn},
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{ .TIMx = TIM5, .rcc = RCC_APB1(TIM5), .inputIrq = TIM5_IRQn},
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{ .TIMx = TIM6, .rcc = RCC_APB1(TIM6), .inputIrq = 0},
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{ .TIMx = TIM7, .rcc = RCC_APB1(TIM7), .inputIrq = 0},
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#if defined(STM32F446xx)
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{ .TIMx = TIM8, .rcc = RCC_APB2(TIM8), .inputIrq = 0},
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#elif !defined(STM32F411xE)
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{ .TIMx = TIM8, .rcc = RCC_APB2(TIM8), .inputIrq = TIM8_CC_IRQn},
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#endif
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{ .TIMx = TIM9, .rcc = RCC_APB2(TIM9), .inputIrq = TIM1_BRK_TIM9_IRQn},
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{ .TIMx = TIM10, .rcc = RCC_APB2(TIM10), .inputIrq = TIM1_UP_TIM10_IRQn},
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{ .TIMx = TIM11, .rcc = RCC_APB2(TIM11), .inputIrq = TIM1_TRG_COM_TIM11_IRQn},
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#ifndef STM32F411xE
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{ .TIMx = TIM12, .rcc = RCC_APB1(TIM12), .inputIrq = TIM8_BRK_TIM12_IRQn},
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{ .TIMx = TIM13, .rcc = RCC_APB1(TIM13), .inputIrq = TIM8_UP_TIM13_IRQn},
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{ .TIMx = TIM14, .rcc = RCC_APB1(TIM14), .inputIrq = TIM8_TRG_COM_TIM14_IRQn},
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#endif
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};
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#if defined(USE_TIMER_MGMT)
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const timerHardware_t fullTimerHardware[FULL_TIMER_CHANNEL_COUNT] = {
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// Auto-generated from 'timer_def.h'
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//PORTA
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DEF_TIM(TIM2, CH1, PA0, 0, 0),
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DEF_TIM(TIM2, CH2, PA1, 0, 0),
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DEF_TIM(TIM2, CH3, PA2, 0, 0),
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DEF_TIM(TIM2, CH4, PA3, 0, 0),
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DEF_TIM(TIM2, CH1, PA5, 0, 0),
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DEF_TIM(TIM1, CH1N, PA7, 0, 0),
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DEF_TIM(TIM1, CH1, PA8, 0, 0),
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DEF_TIM(TIM1, CH2, PA9, 0, 0),
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DEF_TIM(TIM1, CH3, PA10, 0, 0),
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DEF_TIM(TIM1, CH1N, PA11, 0, 0),
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DEF_TIM(TIM2, CH1, PA15, 0, 0),
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DEF_TIM(TIM5, CH1, PA0, 0, 0),
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DEF_TIM(TIM5, CH2, PA1, 0, 0),
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DEF_TIM(TIM5, CH3, PA2, 0, 0),
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DEF_TIM(TIM5, CH4, PA3, 0, 0),
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DEF_TIM(TIM3, CH1, PA6, 0, 0),
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DEF_TIM(TIM3, CH2, PA7, 0, 0),
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DEF_TIM(TIM9, CH1, PA2, 0, 0),
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DEF_TIM(TIM9, CH2, PA3, 0, 0),
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#if !defined(STM32F411xE)
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DEF_TIM(TIM8, CH1N, PA5, 0, 0),
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DEF_TIM(TIM8, CH1N, PA7, 0, 0),
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DEF_TIM(TIM13, CH1, PA6, 0, 0),
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DEF_TIM(TIM14, CH1, PA7, 0, 0),
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#endif
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//PORTB
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DEF_TIM(TIM1, CH2N, PB0, 0, 0),
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DEF_TIM(TIM1, CH3N, PB1, 0, 0),
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DEF_TIM(TIM2, CH2, PB3, 0, 0),
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DEF_TIM(TIM2, CH3, PB10, 0, 0),
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DEF_TIM(TIM2, CH4, PB11, 0, 0),
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DEF_TIM(TIM1, CH1N, PB13, 0, 0),
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DEF_TIM(TIM1, CH2N, PB14, 0, 0),
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DEF_TIM(TIM1, CH3N, PB15, 0, 0),
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DEF_TIM(TIM3, CH3, PB0, 0, 0),
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DEF_TIM(TIM3, CH4, PB1, 0, 0),
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DEF_TIM(TIM3, CH1, PB4, 0, 0),
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DEF_TIM(TIM3, CH2, PB5, 0, 0),
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DEF_TIM(TIM4, CH1, PB6, 0, 0),
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DEF_TIM(TIM4, CH2, PB7, 0, 0),
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DEF_TIM(TIM4, CH3, PB8, 0, 0),
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DEF_TIM(TIM4, CH4, PB9, 0, 0),
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#if !defined(STM32F411xE)
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DEF_TIM(TIM8, CH2N, PB0, 0, 0),
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DEF_TIM(TIM8, CH3N, PB1, 0, 0),
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#endif
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DEF_TIM(TIM10, CH1, PB8, 0, 0),
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DEF_TIM(TIM11, CH1, PB9, 0, 0),
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#if !defined(STM32F411xE)
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DEF_TIM(TIM8, CH2N, PB14, 0, 0),
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DEF_TIM(TIM8, CH3N, PB15, 0, 0),
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DEF_TIM(TIM12, CH1, PB14, 0, 0),
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DEF_TIM(TIM12, CH2, PB15, 0, 0),
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#endif
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//PORTC
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DEF_TIM(TIM3, CH1, PC6, 0, 0),
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DEF_TIM(TIM3, CH2, PC7, 0, 0),
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DEF_TIM(TIM3, CH3, PC8, 0, 0),
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DEF_TIM(TIM3, CH4, PC9, 0, 0),
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#if !defined(STM32F411xE)
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DEF_TIM(TIM8, CH1, PC6, 0, 0),
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DEF_TIM(TIM8, CH2, PC7, 0, 0),
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DEF_TIM(TIM8, CH3, PC8, 0, 0),
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DEF_TIM(TIM8, CH4, PC9, 0, 0),
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#endif
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//PORTD
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DEF_TIM(TIM4, CH1, PD12, 0, 0),
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DEF_TIM(TIM4, CH2, PD13, 0, 0),
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DEF_TIM(TIM4, CH3, PD14, 0, 0),
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DEF_TIM(TIM4, CH4, PD15, 0, 0),
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//PORTE
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DEF_TIM(TIM1, CH1N, PE8, 0, 0),
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DEF_TIM(TIM1, CH1, PE9, 0, 0),
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DEF_TIM(TIM1, CH2N, PE10, 0, 0),
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DEF_TIM(TIM1, CH2, PE11, 0, 0),
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DEF_TIM(TIM1, CH3N, PE12, 0, 0),
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DEF_TIM(TIM1, CH3, PE13, 0, 0),
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DEF_TIM(TIM1, CH4, PE14, 0, 0),
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DEF_TIM(TIM9, CH1, PE5, 0, 0),
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DEF_TIM(TIM9, CH2, PE6, 0, 0),
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//PORTF
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#if !defined(STM32F411xE)
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DEF_TIM(TIM10, CH1, PF6, 0, 0),
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DEF_TIM(TIM11, CH1, PF7, 0, 0),
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#endif
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//PORTH
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// Port H is not available for LPQFP-100 or 144 package
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// DEF_TIM(TIM5, CH1, PH10, 0, 0),
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// DEF_TIM(TIM5, CH2, PH11, 0, 0),
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// DEF_TIM(TIM5, CH3, PH12, 0, 0),
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//
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//#if !defined(STM32F411xE)
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// DEF_TIM(TIM8, CH1N, PH13, 0, 0),
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// DEF_TIM(TIM8, CH2N, PH14, 0, 0),
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// DEF_TIM(TIM8, CH3N, PH15, 0, 0),
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//
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// DEF_TIM(TIM12, CH1, PH6, 0, 0),
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// DEF_TIM(TIM12, CH2, PH9, 0, 0),
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//#endif
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//PORTI
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// Port I is not available for LPQFP-100 or 144 package
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// DEF_TIM(TIM5, CH4, PI0, 0, 0),
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//
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//#if !defined(STM32F411xE)
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// DEF_TIM(TIM8, CH4, PI2, 0, 0),
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// DEF_TIM(TIM8, CH1, PI5, 0, 0),
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// DEF_TIM(TIM8, CH2, PI6, 0, 0),
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// DEF_TIM(TIM8, CH3, PI7, 0, 0),
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//#endif
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};
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#endif
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/*
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need a mapping from dma and timers to pins, and the values should all be set here to the dmaMotors array.
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this mapping could be used for both these motors and for led strip.
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only certain pins have OC output (already used in normal PWM et al) but then
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there are only certain DMA streams/channels available for certain timers and channels.
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*** (this may highlight some hardware limitations on some targets) ***
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DMA1
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Channel Stream0 Stream1 Stream2 Stream3 Stream4 Stream5 Stream6 Stream7
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0
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1
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2 TIM4_CH1 TIM4_CH2 TIM4_CH3
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3 TIM2_CH3 TIM2_CH1 TIM2_CH1 TIM2_CH4
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TIM2_CH4
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4
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5 TIM3_CH4 TIM3_CH1 TIM3_CH2 TIM3_CH3
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6 TIM5_CH3 TIM5_CH4 TIM5_CH1 TIM5_CH4 TIM5_CH2
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7
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DMA2
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Channel Stream0 Stream1 Stream2 Stream3 Stream4 Stream5 Stream6 Stream7
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0 TIM8_CH1 TIM1_CH1
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TIM8_CH2 TIM1_CH2
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TIM8_CH3 TIM1_CH3
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1
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2
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3
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4
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5
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6 TIM1_CH1 TIM1_CH2 TIM1_CH1 TIM1_CH4 TIM1_CH3
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7 TIM8_CH1 TIM8_CH2 TIM8_CH3 TIM8_CH4
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*/
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uint32_t timerClock(TIM_TypeDef *tim)
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{
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#if defined(STM32F411xE)
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UNUSED(tim);
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return SystemCoreClock;
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#elif defined(STM32F40_41xxx) || defined(STM32F446xx)
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if (tim == TIM8 || tim == TIM1 || tim == TIM9 || tim == TIM10 || tim == TIM11) {
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return SystemCoreClock;
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} else {
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return SystemCoreClock / 2;
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}
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#else
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#error "No timer clock defined correctly for MCU"
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#endif
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}
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#endif
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