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63 lines
2 KiB
C
63 lines
2 KiB
C
/*
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* Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include "pico.h"
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// For frequency related definitions etc
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#include "hardware/clocks.h"
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#include "hardware/platform_defs.h"
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#include "hardware/regs/xosc.h"
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#include "hardware/xosc.h"
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#if XOSC_HZ < (1 * MHZ) || XOSC_HZ > (50 * MHZ)
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// Note: Although an external clock can be supplied up to 50 MHz, the maximum frequency the
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// XOSC cell is specified to work with a crystal is less, please see the appropriate RP-series datasheet.
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#error XOSC_HZ must be in the range 1,000,000-50,000,000 i.e. 1-50MHz XOSC frequency
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#endif
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#define STARTUP_DELAY ((((XOSC_HZ / KHZ) + 128) / 256) * PICO_XOSC_STARTUP_DELAY_MULTIPLIER)
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// The DELAY field in xosc_hw->startup is 14 bits wide.
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#if STARTUP_DELAY >= (1 << 13)
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#error PICO_XOSC_STARTUP_DELAY_MULTIPLIER is too large: XOSC STARTUP.DELAY must be < 8192
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#endif
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void xosc_init(void) {
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// Assumes 1-15 MHz input, checked above.
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xosc_hw->ctrl = XOSC_CTRL_FREQ_RANGE_VALUE_1_15MHZ;
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// Set xosc startup delay
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xosc_hw->startup = STARTUP_DELAY;
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// Set the enable bit now that we have set freq range and startup delay
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hw_set_bits(&xosc_hw->ctrl, XOSC_CTRL_ENABLE_VALUE_ENABLE << XOSC_CTRL_ENABLE_LSB);
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// Wait for XOSC to be stable
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while(!(xosc_hw->status & XOSC_STATUS_STABLE_BITS)) {
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tight_loop_contents();
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}
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}
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void xosc_disable(void) {
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uint32_t tmp = xosc_hw->ctrl;
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tmp &= (~XOSC_CTRL_ENABLE_BITS);
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tmp |= (XOSC_CTRL_ENABLE_VALUE_DISABLE << XOSC_CTRL_ENABLE_LSB);
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xosc_hw->ctrl = tmp;
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// Wait for stable to go away
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while(xosc_hw->status & XOSC_STATUS_STABLE_BITS) {
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tight_loop_contents();
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}
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}
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void xosc_dormant(void) {
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// WARNING: This stops the xosc until woken up by an irq
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xosc_hw->dormant = XOSC_DORMANT_VALUE_DORMANT;
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// Wait for it to become stable once woken up
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while(!(xosc_hw->status & XOSC_STATUS_STABLE_BITS)) {
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tight_loop_contents();
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}
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}
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