mirror of
https://github.com/betaflight/betaflight.git
synced 2025-07-13 11:29:58 +03:00
87c8847c13
Call targetConfiguration() once before config is loaded and again afterwards in case the config needs to be changed to load from SD card etc Drop SPI clock during binding Remove debug Add per device SPI DMA enable Fix sdioPinConfigure() declaration warning Reduce clock speed during SPI RX initialisation
176 lines
7 KiB
C
176 lines
7 KiB
C
/*
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* This file is part of Cleanflight and Betaflight.
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*
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* Cleanflight and Betaflight are free software. You can redistribute
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* this software and/or modify this software under the terms of the
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* GNU General Public License as published by the Free Software
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* Foundation, either version 3 of the License, or (at your option)
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* any later version.
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*
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* Cleanflight and Betaflight are distributed in the hope that they
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* will be useful, but WITHOUT ANY WARRANTY; without even the implied
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* warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See the GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this software.
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*
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* If not, see <http://www.gnu.org/licenses/>.
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*/
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#pragma once
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#include "drivers/bus.h"
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#include "drivers/io_types.h"
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#include "drivers/bus.h"
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#include "drivers/rcc_types.h"
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#include "pg/pg.h"
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#include "pg/pg_ids.h"
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#if defined(STM32F4) || defined(STM32F3)
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#define SPI_IO_AF_CFG IO_CONFIG(GPIO_Mode_AF, GPIO_Speed_50MHz, GPIO_OType_PP, GPIO_PuPd_NOPULL)
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#define SPI_IO_AF_SCK_CFG IO_CONFIG(GPIO_Mode_AF, GPIO_Speed_50MHz, GPIO_OType_PP, GPIO_PuPd_DOWN)
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#define SPI_IO_AF_MISO_CFG IO_CONFIG(GPIO_Mode_AF, GPIO_Speed_50MHz, GPIO_OType_PP, GPIO_PuPd_UP)
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#define SPI_IO_CS_CFG IO_CONFIG(GPIO_Mode_OUT, GPIO_Speed_50MHz, GPIO_OType_PP, GPIO_PuPd_NOPULL)
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#elif defined(STM32F7) || defined(STM32H7) || defined(STM32G4)
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#define SPI_IO_AF_CFG IO_CONFIG(GPIO_MODE_AF_PP, GPIO_SPEED_FREQ_VERY_HIGH, GPIO_NOPULL)
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#define SPI_IO_AF_SCK_CFG_HIGH IO_CONFIG(GPIO_MODE_AF_PP, GPIO_SPEED_FREQ_VERY_HIGH, GPIO_PULLUP)
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#define SPI_IO_AF_SCK_CFG_LOW IO_CONFIG(GPIO_MODE_AF_PP, GPIO_SPEED_FREQ_VERY_HIGH, GPIO_PULLDOWN)
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#define SPI_IO_AF_MISO_CFG IO_CONFIG(GPIO_MODE_AF_PP, GPIO_SPEED_FREQ_VERY_HIGH, GPIO_PULLUP)
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#define SPI_IO_CS_CFG IO_CONFIG(GPIO_MODE_OUTPUT_PP, GPIO_SPEED_FREQ_VERY_HIGH, GPIO_NOPULL)
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#elif defined(STM32F1)
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#define SPI_IO_AF_SCK_CFG IO_CONFIG(GPIO_Mode_AF_PP, GPIO_Speed_50MHz)
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#define SPI_IO_AF_MOSI_CFG IO_CONFIG(GPIO_Mode_AF_PP, GPIO_Speed_50MHz)
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#define SPI_IO_AF_MISO_CFG IO_CONFIG(GPIO_Mode_IN_FLOATING, GPIO_Speed_50MHz)
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#define SPI_IO_CS_CFG IO_CONFIG(GPIO_Mode_Out_PP, GPIO_Speed_50MHz)
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#endif
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// De facto standard mode
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// See https://en.wikipedia.org/wiki/Serial_Peripheral_Interface
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//
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// Mode CPOL CPHA
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// 0 0 0
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// 1 0 1
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// 2 1 0
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// 3 1 1
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typedef enum {
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SPI_MODE0_POL_LOW_EDGE_1ST = 0,
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SPI_MODE1_POL_LOW_EDGE_2ND,
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SPI_MODE2_POL_HIGH_EDGE_1ST,
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SPI_MODE3_POL_HIGH_EDGE_2ND
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} SPIMode_e;
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typedef enum SPIDevice {
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SPIINVALID = -1,
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SPIDEV_1 = 0,
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SPIDEV_2,
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SPIDEV_3,
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SPIDEV_4,
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SPIDEV_5,
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SPIDEV_6
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} SPIDevice;
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#if defined(STM32F1)
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#define SPIDEV_COUNT 2
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#elif defined(STM32F3) || defined(STM32F4)
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#define SPIDEV_COUNT 3
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#elif defined(STM32F7)
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#define SPIDEV_COUNT 4
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#elif defined(STM32H7)
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#define SPIDEV_COUNT 6
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#else
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#define SPIDEV_COUNT 4
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#endif
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// Macros to convert between CLI bus number and SPIDevice.
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#define SPI_CFG_TO_DEV(x) ((x) - 1)
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#define SPI_DEV_TO_CFG(x) ((x) + 1)
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// Work around different check routines in the libraries for different MCU types
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#if defined(STM32H7)
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#define CHECK_SPI_RX_DATA_AVAILABLE(instance) LL_SPI_IsActiveFlag_RXWNE(instance)
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#define SPI_RX_DATA_REGISTER(base) ((base)->RXDR)
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#else
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#define CHECK_SPI_RX_DATA_AVAILABLE(instance) LL_SPI_IsActiveFlag_RXNE(instance)
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#define SPI_RX_DATA_REGISTER(base) ((base)->DR)
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#endif
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void spiPreinit(void);
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void spiPreinitRegister(ioTag_t iotag, uint8_t iocfg, uint8_t init);
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void spiPreinitByIO(IO_t io);
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void spiPreinitByTag(ioTag_t tag);
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bool spiInit(SPIDevice device);
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// Called after all devices are initialised to enable SPI DMA where streams are available.
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void spiInitBusDMA();
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SPIDevice spiDeviceByInstance(SPI_TypeDef *instance);
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SPI_TypeDef *spiInstanceByDevice(SPIDevice device);
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// BusDevice API
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// Mark a device's associated bus as being SPI and record the first owner to use it
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bool spiSetBusInstance(extDevice_t *dev, uint32_t device, resourceOwner_e owner);
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// Determine the divisor to use for a given bus frequency
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uint16_t spiCalculateDivider(uint32_t freq);
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// Set the clock divisor to be used for accesses by the given device
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void spiSetClkDivisor(const extDevice_t *dev, uint16_t divider);
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// Set the clock phase/polarity to be used for accesses by the given device
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void spiSetClkPhasePolarity(const extDevice_t *dev, bool leadingEdge);
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// Enable/disable DMA on a specific device. Enabled by default.
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void spiDmaEnable(const extDevice_t *dev, bool enable);
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// DMA transfer setup and start
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void spiSequence(const extDevice_t *dev, busSegment_t *segments);
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// Wait for DMA completion
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void spiWait(const extDevice_t *dev);
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// Indicate that the bus on which this device resides may initiate DMA transfers from interrupt context
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void spiSetAtomicWait(const extDevice_t *dev);
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// Wait for DMA completion and claim the bus driver - use this when waiting for a prior access to complete before starting a new one
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void spiWaitClaim(const extDevice_t *dev);
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// Return true if DMA engine is busy
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bool spiIsBusy(const extDevice_t *dev);
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/*
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* Routine naming convention is:
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* spi[Read][Write][Reg][Msk][Buf][RB]
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*
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* Read: Perform a read, returning the value read unless 'Buf' is specified
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* Write Perform a write
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* ReadWrite: Perform both a read and write, returning the value read unless 'Buf' is specified
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* Reg: Register number 'reg' is written prior to the read being performed
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* Msk: Register number is logically ORed with 0x80 as some devices indicate a read by accessing a register with bit 7 set
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* Buf: Pass data of given length by reference
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* RB: Return false immediately if the bus is busy, otherwise complete the access and return true
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*/
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uint8_t spiReadReg(const extDevice_t *dev, uint8_t reg);
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uint8_t spiReadRegMsk(const extDevice_t *dev, uint8_t reg);
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void spiReadRegBuf(const extDevice_t *dev, uint8_t reg, uint8_t *data, uint8_t length);
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bool spiReadRegBufRB(const extDevice_t *dev, uint8_t reg, uint8_t *data, uint8_t length);
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bool spiReadRegMskBufRB(const extDevice_t *dev, uint8_t reg, uint8_t *data, uint8_t length);
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void spiWrite(const extDevice_t *dev, uint8_t data);
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void spiWriteReg(const extDevice_t *dev, uint8_t reg, uint8_t data);
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bool spiWriteRegRB(const extDevice_t *dev, uint8_t reg, uint8_t data);
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uint8_t spiReadWrite(const extDevice_t *dev, uint8_t data);
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void spiWriteRegBuf(const extDevice_t *dev, uint8_t reg, uint8_t *data, uint32_t length);
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uint8_t spiReadWriteReg(const extDevice_t *dev, uint8_t reg, uint8_t data);
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void spiReadWriteBuf(const extDevice_t *dev, uint8_t *txData, uint8_t *rxData, int len);
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bool spiReadWriteBufRB(const extDevice_t *dev, uint8_t *txData, uint8_t *rxData, int length);
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//
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// Config
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//
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struct spiPinConfig_s;
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void spiPinConfigure(const struct spiPinConfig_s *pConfig);
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bool spiUseDMA(const extDevice_t *dev);
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void spiBusDeviceRegister(const extDevice_t *dev);
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uint8_t spiGetRegisteredDeviceCount(void);
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uint8_t spiGetExtDeviceCount(const extDevice_t *dev);
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