mirror of
https://github.com/betaflight/betaflight.git
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306 lines
10 KiB
C
306 lines
10 KiB
C
/*
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* This file is part of Cleanflight and Betaflight.
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*
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* Cleanflight and Betaflight are free software. You can redistribute
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* this software and/or modify this software under the terms of the
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* GNU General Public License as published by the Free Software
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* Foundation, either version 3 of the License, or (at your option)
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* any later version.
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*
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* Cleanflight and Betaflight are distributed in the hope that they
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* will be useful, but WITHOUT ANY WARRANTY; without even the implied
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* warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See the GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this software.
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*
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* If not, see <http://www.gnu.org/licenses/>.
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*/
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#pragma once
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#include <stdbool.h>
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#include <stdint.h>
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#include "drivers/dma.h"
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#include "drivers/io_types.h"
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#include "drivers/rcc_types.h"
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#include "drivers/resource.h"
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#include "drivers/timer_def.h"
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#include "pg/timerio.h"
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#define CC_CHANNELS_PER_TIMER 4 // TIM_Channel_1..4
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#define CC_INDEX_FROM_CHANNEL(x) ((uint8_t)((x) >> 2))
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#define CC_CHANNEL_FROM_INDEX(x) ((uint16_t)(x) << 2)
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typedef uint16_t captureCompare_t; // 16 bit on both 103 and 303, just register access must be 32bit sometimes (use timCCR_t)
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#if defined(STM32F4)
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typedef uint32_t timCCR_t;
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typedef uint32_t timCCER_t;
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typedef uint32_t timSR_t;
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typedef uint32_t timCNT_t;
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#elif defined(STM32F7)
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typedef uint32_t timCCR_t;
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typedef uint32_t timCCER_t;
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typedef uint32_t timSR_t;
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typedef uint32_t timCNT_t;
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#elif defined(STM32F3)
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typedef uint32_t timCCR_t;
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typedef uint32_t timCCER_t;
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typedef uint32_t timSR_t;
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typedef uint32_t timCNT_t;
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#elif defined(STM32H7)
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typedef uint32_t timCCR_t;
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typedef uint32_t timCCER_t;
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typedef uint32_t timSR_t;
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typedef uint32_t timCNT_t;
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#elif defined(STM32F1)
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typedef uint16_t timCCR_t;
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typedef uint16_t timCCER_t;
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typedef uint16_t timSR_t;
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typedef uint16_t timCNT_t;
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#elif defined(UNIT_TEST) || defined(SIMULATOR_BUILD)
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typedef uint32_t timCCR_t;
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typedef uint32_t timCCER_t;
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typedef uint32_t timSR_t;
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typedef uint32_t timCNT_t;
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#else
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#error "Unknown CPU defined"
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#endif
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typedef enum {
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TIM_USE_ANY = 0x0,
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TIM_USE_NONE = 0x0,
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TIM_USE_PPM = 0x1,
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TIM_USE_PWM = 0x2,
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TIM_USE_MOTOR = 0x4,
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TIM_USE_SERVO = 0x8,
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TIM_USE_LED = 0x10,
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TIM_USE_TRANSPONDER = 0x20,
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TIM_USE_BEEPER = 0x40,
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TIM_USE_CAMERA_CONTROL = 0x80,
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} timerUsageFlag_e;
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// use different types from capture and overflow - multiple overflow handlers are implemented as linked list
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struct timerCCHandlerRec_s;
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struct timerOvrHandlerRec_s;
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typedef void timerCCHandlerCallback(struct timerCCHandlerRec_s* self, uint16_t capture);
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typedef void timerOvrHandlerCallback(struct timerOvrHandlerRec_s* self, uint16_t capture);
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typedef struct timerCCHandlerRec_s {
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timerCCHandlerCallback* fn;
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} timerCCHandlerRec_t;
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typedef struct timerOvrHandlerRec_s {
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timerOvrHandlerCallback* fn;
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struct timerOvrHandlerRec_s* next;
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} timerOvrHandlerRec_t;
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typedef struct timerDef_s {
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TIM_TypeDef *TIMx;
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rccPeriphTag_t rcc;
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uint8_t inputIrq;
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} timerDef_t;
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typedef struct timerHardware_s {
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TIM_TypeDef *tim;
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ioTag_t tag;
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uint8_t channel;
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timerUsageFlag_e usageFlags;
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uint8_t output;
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#if defined(STM32F3) || defined(STM32F4) || defined(STM32F7) || defined(STM32H7)
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uint8_t alternateFunction;
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#endif
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#if defined(USE_TIMER_DMA)
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#if defined(USE_DMA_SPEC)
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dmaResource_t *dmaRefConfigured;
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#if defined(STM32F4) || defined(STM32F7) || defined(STM32H7)
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uint32_t dmaChannelConfigured;
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#endif
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#else // USE_DMA_SPEC
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dmaResource_t *dmaRef;
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#if defined(STM32F4) || defined(STM32F7) || defined(STM32H7)
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uint32_t dmaChannel; // XXX Can be much smaller (e.g. uint8_t)
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#endif
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#endif // USE_DMA_SPEC
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dmaResource_t *dmaTimUPRef;
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#if defined(STM32F4) || defined(STM32F7) || defined(STM32H7)
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uint32_t dmaTimUPChannel;
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#endif
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uint8_t dmaTimUPIrqHandler;
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#endif
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} timerHardware_t;
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typedef enum {
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TIMER_OUTPUT_NONE = 0,
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TIMER_OUTPUT_INVERTED = (1 << 0),
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TIMER_OUTPUT_N_CHANNEL = (1 << 1),
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} timerFlag_e;
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#ifdef STM32F1
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#if defined(STM32F10X_XL) || defined(STM32F10X_HD_VL)
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#define HARDWARE_TIMER_DEFINITION_COUNT 14
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#elif defined(STM32F10X_HD) || defined(STM32F10X_CL)
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#define HARDWARE_TIMER_DEFINITION_COUNT 7
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#else
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#define HARDWARE_TIMER_DEFINITION_COUNT 4
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#endif
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#elif defined(STM32F3)
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#define HARDWARE_TIMER_DEFINITION_COUNT 10
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#elif defined(STM32F411xE)
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#define HARDWARE_TIMER_DEFINITION_COUNT 10
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#elif defined(STM32F4)
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#define HARDWARE_TIMER_DEFINITION_COUNT 14
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#elif defined(STM32F7)
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#define HARDWARE_TIMER_DEFINITION_COUNT 14
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#elif defined(STM32H7)
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#define HARDWARE_TIMER_DEFINITION_COUNT 17
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#define TIMUP_TIMERS ( BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5) | BIT(6) | BIT(7) | BIT(8) | BIT(15) | BIT(16) | BIT(17) )
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#endif
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#define MHZ_TO_HZ(x) ((x) * 1000000)
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#if !defined(USE_UNIFIED_TARGET)
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extern const timerHardware_t timerHardware[];
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#endif
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#if defined(USE_TIMER_MGMT)
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#if defined(STM32F3)
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#define FULL_TIMER_CHANNEL_COUNT 88
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#elif defined(STM32F4)
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#define FULL_TIMER_CHANNEL_COUNT 78
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#elif defined(STM32F7)
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#define FULL_TIMER_CHANNEL_COUNT 78
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#elif defined(STM32H7)
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#define FULL_TIMER_CHANNEL_COUNT 87
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#endif
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extern const timerHardware_t fullTimerHardware[];
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#define TIMER_CHANNEL_COUNT FULL_TIMER_CHANNEL_COUNT
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#define TIMER_HARDWARE fullTimerHardware
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#if defined(STM32F7) || defined(STM32F4)
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#define USED_TIMERS ( TIM_N(1) | TIM_N(2) | TIM_N(3) | TIM_N(4) | TIM_N(5) | TIM_N(6) | TIM_N(7) | TIM_N(8) | TIM_N(9) | TIM_N(10) | TIM_N(11) | TIM_N(12) | TIM_N(13) | TIM_N(14) )
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#elif defined(STM32F3)
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#define USED_TIMERS ( TIM_N(1) | TIM_N(2) | TIM_N(3) | TIM_N(4) | TIM_N(6) | TIM_N(7) | TIM_N(8) | TIM_N(15) | TIM_N(16) | TIM_N(17) )
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#elif defined(STM32F1)
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#define USED_TIMERS ( TIM_N(1) | TIM_N(2) | TIM_N(3) | TIM_N(4) )
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#elif defined(STM32H7)
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#define USED_TIMERS ( TIM_N(1) | TIM_N(2) | TIM_N(3) | TIM_N(4) | TIM_N(5) | TIM_N(6) | TIM_N(7) | TIM_N(8) | TIM_N(12) | TIM_N(13) | TIM_N(14) | TIM_N(15) | TIM_N(16) | TIM_N(17) )
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#else
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#error "No timer / channel tag definition found for CPU"
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#endif
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#else
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#define TIMER_CHANNEL_COUNT USABLE_TIMER_CHANNEL_COUNT
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#define TIMER_HARDWARE timerHardware
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#endif // USE_TIMER_MGMT
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extern const timerDef_t timerDefinitions[];
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typedef enum {
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TYPE_FREE,
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TYPE_PWMINPUT,
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TYPE_PPMINPUT,
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TYPE_PWMOUTPUT_MOTOR,
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TYPE_PWMOUTPUT_FAST,
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TYPE_PWMOUTPUT_SERVO,
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TYPE_SOFTSERIAL_RX,
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TYPE_SOFTSERIAL_TX,
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TYPE_SOFTSERIAL_RXTX, // bidirectional pin for softserial
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TYPE_SOFTSERIAL_AUXTIMER, // timer channel is used for softserial. No IO function on pin
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TYPE_ADC,
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TYPE_SERIAL_RX,
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TYPE_SERIAL_TX,
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TYPE_SERIAL_RXTX,
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TYPE_TIMER
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} channelType_t;
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void timerConfigure(const timerHardware_t *timHw, uint16_t period, uint32_t hz); // This interface should be replaced.
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void timerChConfigIC(const timerHardware_t *timHw, bool polarityRising, unsigned inputFilterSamples);
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void timerChConfigICDual(const timerHardware_t* timHw, bool polarityRising, unsigned inputFilterSamples);
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void timerChICPolarity(const timerHardware_t *timHw, bool polarityRising);
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volatile timCCR_t* timerChCCR(const timerHardware_t* timHw);
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volatile timCCR_t* timerChCCRLo(const timerHardware_t* timHw);
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volatile timCCR_t* timerChCCRHi(const timerHardware_t* timHw);
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void timerChConfigOC(const timerHardware_t* timHw, bool outEnable, bool stateHigh);
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void timerChConfigGPIO(const timerHardware_t* timHw, ioConfig_t mode);
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void timerChCCHandlerInit(timerCCHandlerRec_t *self, timerCCHandlerCallback *fn);
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void timerChOvrHandlerInit(timerOvrHandlerRec_t *self, timerOvrHandlerCallback *fn);
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void timerChConfigCallbacks(const timerHardware_t *channel, timerCCHandlerRec_t *edgeCallback, timerOvrHandlerRec_t *overflowCallback);
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void timerChConfigCallbacksDual(const timerHardware_t *channel, timerCCHandlerRec_t *edgeCallbackLo, timerCCHandlerRec_t *edgeCallbackHi, timerOvrHandlerRec_t *overflowCallback);
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void timerChITConfigDualLo(const timerHardware_t* timHw, FunctionalState newState);
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void timerChITConfig(const timerHardware_t* timHw, FunctionalState newState);
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void timerChClearCCFlag(const timerHardware_t* timHw);
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void timerChInit(const timerHardware_t *timHw, channelType_t type, int irqPriority, uint8_t irq);
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void timerInit(void);
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void timerStart(void);
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void timerForceOverflow(TIM_TypeDef *tim);
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uint32_t timerClock(TIM_TypeDef *tim);
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void configTimeBase(TIM_TypeDef *tim, uint16_t period, uint32_t hz); // TODO - just for migration
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rccPeriphTag_t timerRCC(TIM_TypeDef *tim);
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uint8_t timerInputIrq(TIM_TypeDef *tim);
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#if defined(USE_TIMER_MGMT)
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extern const resourceOwner_t freeOwner;
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timerIOConfig_t *timerIoConfigByTag(ioTag_t ioTag);
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const resourceOwner_t *timerGetOwner(int8_t timerNumber, uint16_t timerChannel);
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#endif
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const timerHardware_t *timerGetByTag(ioTag_t ioTag);
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const timerHardware_t *timerAllocate(ioTag_t ioTag, resourceOwner_e owner, uint8_t resourceIndex);
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const timerHardware_t *timerGetByTagAndIndex(ioTag_t ioTag, unsigned timerIndex);
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ioTag_t timerioTagGetByUsage(timerUsageFlag_e usageFlag, uint8_t index);
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#if defined(USE_HAL_DRIVER)
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TIM_HandleTypeDef* timerFindTimerHandle(TIM_TypeDef *tim);
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HAL_StatusTypeDef TIM_DMACmd(TIM_HandleTypeDef *htim, uint32_t Channel, FunctionalState NewState);
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HAL_StatusTypeDef DMA_SetCurrDataCounter(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
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uint16_t timerDmaIndex(uint8_t channel);
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#else
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void timerOCInit(TIM_TypeDef *tim, uint8_t channel, TIM_OCInitTypeDef *init);
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void timerOCPreloadConfig(TIM_TypeDef *tim, uint8_t channel, uint16_t preload);
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#endif
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volatile timCCR_t *timerCCR(TIM_TypeDef *tim, uint8_t channel);
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uint16_t timerDmaSource(uint8_t channel);
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uint16_t timerGetPrescalerByDesiredHertz(TIM_TypeDef *tim, uint32_t hz);
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uint16_t timerGetPrescalerByDesiredMhz(TIM_TypeDef *tim, uint16_t mhz);
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uint16_t timerGetPeriodByPrescaler(TIM_TypeDef *tim, uint16_t prescaler, uint32_t hz);
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int8_t timerGetNumberByIndex(uint8_t index);
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int8_t timerGetTIMNumber(const TIM_TypeDef *tim);
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uint8_t timerLookupChannelIndex(const uint16_t channel);
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