mirror of
https://github.com/betaflight/betaflight.git
synced 2025-07-15 20:35:33 +03:00
340 lines
8.3 KiB
C
340 lines
8.3 KiB
C
/*
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* This file is part of Cleanflight and Betaflight.
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*
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* Cleanflight and Betaflight are free software. You can redistribute
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* this software and/or modify this software under the terms of the
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* GNU General Public License as published by the Free Software
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* Foundation, either version 3 of the License, or (at your option)
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* any later version.
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*
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* Cleanflight and Betaflight are distributed in the hope that they
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* will be useful, but WITHOUT ANY WARRANTY; without even the implied
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* warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See the GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this software.
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*
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* If not, see <http://www.gnu.org/licenses/>.
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*/
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#pragma once
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#if defined(STM32G474xx)
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#include "stm32g4xx.h"
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#include "stm32g4xx_hal.h"
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#include "system_stm32g4xx.h"
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#include "stm32g4xx_ll_spi.h"
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#include "stm32g4xx_ll_gpio.h"
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#include "stm32g4xx_ll_dma.h"
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#include "stm32g4xx_ll_rcc.h"
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#include "stm32g4xx_ll_bus.h"
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#include "stm32g4xx_ll_tim.h"
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#include "stm32g4xx_ll_system.h"
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#include "drivers/stm32/stm32g4xx_ll_ex.h"
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// Chip Unique ID on G4
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#define U_ID_0 (*(uint32_t*)UID_BASE)
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#define U_ID_1 (*(uint32_t*)(UID_BASE + 4))
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#define U_ID_2 (*(uint32_t*)(UID_BASE + 8))
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#define USE_PIN_AF
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#ifndef STM32G4
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#define STM32G4
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#endif
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#elif defined(STM32H743xx) || defined(STM32H750xx) || defined(STM32H7A3xx) || defined(STM32H7A3xxQ) || defined(STM32H723xx) || defined(STM32H725xx) || defined(STM32H730xx)
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#include "stm32h7xx.h"
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#include "stm32h7xx_hal.h"
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#include "system_stm32h7xx.h"
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#include "stm32h7xx_ll_spi.h"
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#include "stm32h7xx_ll_gpio.h"
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#include "stm32h7xx_ll_dma.h"
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#include "stm32h7xx_ll_rcc.h"
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#include "stm32h7xx_ll_bus.h"
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#include "stm32h7xx_ll_tim.h"
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#include "stm32h7xx_ll_system.h"
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#include "drivers/stm32/stm32h7xx_ll_ex.h"
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// Chip Unique ID on H7
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#define U_ID_0 (*(uint32_t*)UID_BASE)
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#define U_ID_1 (*(uint32_t*)(UID_BASE + 4))
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#define U_ID_2 (*(uint32_t*)(UID_BASE + 8))
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#define USE_PIN_AF
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#ifndef STM32H7
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#define STM32H7
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#endif
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#elif defined(STM32F722xx) || defined(STM32F745xx) || defined(STM32F746xx) || defined(STM32F765xx)
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#include "stm32f7xx.h"
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#include "stm32f7xx_hal.h"
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#include "system_stm32f7xx.h"
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#include "stm32f7xx_ll_spi.h"
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#include "stm32f7xx_ll_gpio.h"
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#include "stm32f7xx_ll_dma.h"
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#include "stm32f7xx_ll_rcc.h"
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#include "stm32f7xx_ll_bus.h"
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#include "stm32f7xx_ll_tim.h"
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#include "stm32f7xx_ll_system.h"
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#include "drivers/stm32/stm32f7xx_ll_ex.h"
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// Chip Unique ID on F7
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#define U_ID_0 (*(uint32_t*)UID_BASE)
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#define U_ID_1 (*(uint32_t*)(UID_BASE + 4))
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#define U_ID_2 (*(uint32_t*)(UID_BASE + 8))
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#define USE_PIN_AF
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#ifndef STM32F7
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#define STM32F7
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#endif
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#elif defined(STM32F40_41xxx) || defined(STM32F411xE) || defined(STM32F446xx)
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#include "stm32f4xx.h"
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// Chip Unique ID on F405
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#define U_ID_0 (*(uint32_t*)0x1fff7a10)
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#define U_ID_1 (*(uint32_t*)0x1fff7a14)
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#define U_ID_2 (*(uint32_t*)0x1fff7a18)
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#ifndef STM32F4
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#define STM32F4
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#endif
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#endif
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#ifdef STM32F4
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#if defined(STM32F40_41xxx)
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#define USE_FAST_DATA
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#endif
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#define USE_RPM_FILTER
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#define USE_DYN_IDLE
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#define USE_DYN_NOTCH_FILTER
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#define USE_ADC_INTERNAL
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#define USE_USB_CDC_HID
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#define USE_USB_MSC
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#define USE_PERSISTENT_MSC_RTC
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#define USE_MCO
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#define USE_DMA_SPEC
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#define USE_PERSISTENT_OBJECTS
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#define USE_CUSTOM_DEFAULTS_ADDRESS
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#define USE_LATE_TASK_STATISTICS
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#if defined(STM32F40_41xxx) || defined(STM32F411xE)
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#define USE_OVERCLOCK
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#endif
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#endif // STM32F4
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#ifdef STM32F7
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#define USE_ITCM_RAM
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#define ITCM_RAM_OPTIMISATION "-O2", "-freorder-blocks-algorithm=simple"
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#define USE_FAST_DATA
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#define USE_RPM_FILTER
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#define USE_DYN_IDLE
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#define USE_DYN_NOTCH_FILTER
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#define USE_OVERCLOCK
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#define USE_ADC_INTERNAL
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#define USE_USB_CDC_HID
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#define USE_USB_MSC
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#define USE_PERSISTENT_MSC_RTC
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#define USE_MCO
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#define USE_DMA_SPEC
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#define USE_PERSISTENT_OBJECTS
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#define USE_CUSTOM_DEFAULTS_ADDRESS
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#define USE_LATE_TASK_STATISTICS
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#endif // STM32F7
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#ifdef STM32H7
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#ifdef USE_DSHOT
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#define USE_DSHOT_CACHE_MGMT
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#endif
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#define USE_ITCM_RAM
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#define USE_FAST_DATA
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#define USE_RPM_FILTER
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#define USE_DYN_IDLE
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#define USE_DYN_NOTCH_FILTER
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#define USE_ADC_INTERNAL
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#define USE_USB_CDC_HID
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#define USE_DMA_SPEC
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#define USE_PERSISTENT_OBJECTS
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#define USE_DMA_RAM
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#define USE_USB_MSC
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#define USE_RTC_TIME
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#define USE_PERSISTENT_MSC_RTC
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#define USE_LATE_TASK_STATISTICS
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#endif
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#ifdef STM32G4
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#define USE_RPM_FILTER
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#define USE_DYN_IDLE
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#define USE_OVERCLOCK
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#define USE_DYN_NOTCH_FILTER
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#define USE_ADC_INTERNAL
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#define USE_USB_MSC
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#define USE_USB_CDC_HID
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#define USE_MCO
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#define USE_DMA_SPEC
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#define USE_LATE_TASK_STATISTICS
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#endif
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#if defined(STM32F4) || defined(STM32F7) || defined(STM32H7) || defined(STM32G4)
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#define TASK_GYROPID_DESIRED_PERIOD 125 // 125us = 8kHz
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#define SCHEDULER_DELAY_LIMIT 10
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#else
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#define TASK_GYROPID_DESIRED_PERIOD 1000 // 1000us = 1kHz
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#define SCHEDULER_DELAY_LIMIT 100
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#endif
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// Set the default cpu_overclock to the first level (108MHz) for F411
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// Helps with looptime stability as the CPU is borderline when running native gyro sampling
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#if defined(USE_OVERCLOCK) && defined(STM32F411xE)
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#define DEFAULT_CPU_OVERCLOCK 1
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#else
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#define DEFAULT_CPU_OVERCLOCK 0
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#endif
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#if defined(STM32H7)
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// Move ISRs to fast ram to avoid flash latency.
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#define FAST_IRQ_HANDLER FAST_CODE
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#else
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#define FAST_IRQ_HANDLER
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#endif
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#if defined(STM32F4) || defined(STM32G4)
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// F4 can't DMA to/from CCM (core coupled memory) SRAM (where the stack lives)
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// On G4 there is no specific DMA target memory
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#define DMA_DATA_ZERO_INIT
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#define DMA_DATA
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#define STATIC_DMA_DATA_AUTO static
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#elif defined(STM32F7)
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// F7 has no cache coherency issues DMAing to/from DTCM, otherwise buffers must be cache aligned
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#define DMA_DATA_ZERO_INIT FAST_DATA_ZERO_INIT
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#define DMA_DATA FAST_DATA
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#define STATIC_DMA_DATA_AUTO static DMA_DATA
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#else
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// DMA to/from any memory
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#define DMA_DATA_ZERO_INIT __attribute__ ((section(".dmaram_bss"), aligned(32)))
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#define DMA_DATA __attribute__ ((section(".dmaram_data"), aligned(32)))
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#define STATIC_DMA_DATA_AUTO static DMA_DATA
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#endif
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#if defined(STM32F4) || defined(STM32H7)
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// Data in RAM which is guaranteed to not be reset on hot reboot
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#define PERSISTENT __attribute__ ((section(".persistent_data"), aligned(4)))
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#endif
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#ifdef USE_DMA_RAM
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#if defined(STM32H7)
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#define DMA_RAM __attribute__((section(".DMA_RAM"), aligned(32)))
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#define DMA_RW_AXI __attribute__((section(".DMA_RW_AXI"), aligned(32)))
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extern uint8_t _dmaram_start__;
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extern uint8_t _dmaram_end__;
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#elif defined(STM32G4)
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#define DMA_RAM_R __attribute__((section(".DMA_RAM_R")))
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#define DMA_RAM_W __attribute__((section(".DMA_RAM_W")))
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#define DMA_RAM_RW __attribute__((section(".DMA_RAM_RW")))
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#endif
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#else
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#define DMA_RAM
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#define DMA_RW_AXI
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#define DMA_RAM_R
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#define DMA_RAM_W
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#define DMA_RAM_RW
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#endif
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#define USE_TIMER_MGMT
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#define USE_TIMER_AF
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#ifdef STM32F4
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#ifndef I2C1_SCL_PIN
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#define I2C1_SCL_PIN PB6
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#endif
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#ifndef I2C1_SDA_PIN
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#define I2C1_SDA_PIN PB7
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#endif
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#ifndef I2C2_SCL_PIN
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#define I2C2_SCL_PIN PB10
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#endif
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#ifndef I2C2_SDA_PIN
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#define I2C2_SDA_PIN PB11
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#endif
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#ifndef I2C3_SCL_PIN
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#define I2C3_SCL_PIN PA8
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#endif
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#ifndef I2C3_SDA_PIN
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#define I2C3_SDA_PIN PC9
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#endif
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#endif // STM32F4
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#ifdef STM32F7
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#ifndef I2C1_SCL_PIN
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#define I2C1_SCL_PIN PB6
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#endif
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#ifndef I2C1_SDA_PIN
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#define I2C1_SDA_PIN PB7
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#endif
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#ifndef I2C2_SCL_PIN
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#define I2C2_SCL_PIN PB10
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#endif
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#ifndef I2C2_SDA_PIN
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#define I2C2_SDA_PIN PB11
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#endif
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#ifndef I2C3_SCL_PIN
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#define I2C3_SCL_PIN PA8
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#endif
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#ifndef I2C3_SDA_PIN
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#define I2C3_SDA_PIN PB4
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#endif
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#ifndef I2C4_SCL_PIN
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#define I2C4_SCL_PIN PD12
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#endif
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#ifndef I2C4_SDA_PIN
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#define I2C4_SDA_PIN PD13
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#endif
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#endif // STM32F7
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#ifndef SPI1_SCK_PIN
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#define SPI1_SCK_PIN PA5
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#define SPI1_MISO_PIN PA6
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#define SPI1_MOSI_PIN PA7
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#endif
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#ifndef SPI2_SCK_PIN
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#define SPI2_SCK_PIN PB13
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#define SPI2_MISO_PIN PB14
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#define SPI2_MOSI_PIN PB15
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#endif
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#ifndef SPI3_SCK_PIN
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#define SPI3_SCK_PIN PB3
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#define SPI3_MISO_PIN PB4
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#define SPI3_MOSI_PIN PB5
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#endif
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#ifndef SPI4_SCK_PIN
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#define SPI4_SCK_PIN NONE
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#define SPI4_MISO_PIN NONE
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#define SPI4_MOSI_PIN NONE
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#endif
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#ifndef SPI5_SCK_PIN
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#define SPI5_SCK_PIN NONE
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#define SPI5_MISO_PIN NONE
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#define SPI5_MOSI_PIN NONE
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#endif
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#ifndef SPI6_SCK_PIN
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#define SPI6_SCK_PIN NONE
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#define SPI6_MISO_PIN NONE
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#define SPI6_MOSI_PIN NONE
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#endif
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