mirror of
https://github.com/betaflight/betaflight.git
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296 lines
11 KiB
C
296 lines
11 KiB
C
/*
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* This file is part of Cleanflight and Betaflight.
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*
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* Cleanflight and Betaflight are free software. You can redistribute
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* this software and/or modify this software under the terms of the
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* GNU General Public License as published by the Free Software
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* Foundation, either version 3 of the License, or (at your option)
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* any later version.
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*
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* Cleanflight and Betaflight are distributed in the hope that they
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* will be useful, but WITHOUT ANY WARRANTY; without even the implied
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* warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See the GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this software.
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*
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* If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <stdbool.h>
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#include <stdint.h>
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#include <math.h>
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#include "platform.h"
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#ifdef USE_DSHOT
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#include "build/debug.h"
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#include "drivers/io.h"
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#include "timer.h"
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#if defined(STM32F4)
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#include "stm32f4xx.h"
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#elif defined(STM32F3)
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#include "stm32f30x.h"
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#endif
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#include "pwm_output.h"
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#include "drivers/nvic.h"
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#include "dma.h"
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#include "rcc.h"
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static uint8_t dmaMotorTimerCount = 0;
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static motorDmaTimer_t dmaMotorTimers[MAX_DMA_TIMERS];
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static motorDmaOutput_t dmaMotors[MAX_SUPPORTED_MOTORS];
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motorDmaOutput_t *getMotorDmaOutput(uint8_t index)
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{
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return &dmaMotors[index];
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}
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uint8_t getTimerIndex(TIM_TypeDef *timer)
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{
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for (int i = 0; i < dmaMotorTimerCount; i++) {
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if (dmaMotorTimers[i].timer == timer) {
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return i;
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}
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}
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dmaMotorTimers[dmaMotorTimerCount++].timer = timer;
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return dmaMotorTimerCount-1;
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}
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void pwmWriteDshotInt(uint8_t index, uint16_t value)
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{
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motorDmaOutput_t *const motor = &dmaMotors[index];
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if (!motor->configured) {
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return;
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}
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uint16_t packet = prepareDshotPacket(motor, value);
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uint8_t bufferSize;
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#ifdef USE_DSHOT_DMAR
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if (useBurstDshot) {
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bufferSize = loadDmaBuffer(&motor->timer->dmaBurstBuffer[timerLookupChannelIndex(motor->timerHardware->channel)], 4, packet);
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motor->timer->dmaBurstLength = bufferSize * 4;
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} else
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#endif
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{
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bufferSize = loadDmaBuffer(motor->dmaBuffer, 1, packet);
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motor->timer->timerDmaSources |= motor->timerDmaSource;
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DMA_SetCurrDataCounter(motor->timerHardware->dmaRef, bufferSize);
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DMA_Cmd(motor->timerHardware->dmaRef, ENABLE);
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}
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}
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void pwmCompleteDshotMotorUpdate(uint8_t motorCount)
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{
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UNUSED(motorCount);
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for (int i = 0; i < dmaMotorTimerCount; i++) {
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#ifdef USE_DSHOT_DMAR
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if (useBurstDshot) {
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DMA_SetCurrDataCounter(dmaMotorTimers[i].dmaBurstRef, dmaMotorTimers[i].dmaBurstLength);
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DMA_Cmd(dmaMotorTimers[i].dmaBurstRef, ENABLE);
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TIM_DMAConfig(dmaMotorTimers[i].timer, TIM_DMABase_CCR1, TIM_DMABurstLength_4Transfers);
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TIM_DMACmd(dmaMotorTimers[i].timer, TIM_DMA_Update, ENABLE);
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} else
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#endif
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{
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TIM_SetCounter(dmaMotorTimers[i].timer, 0);
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TIM_DMACmd(dmaMotorTimers[i].timer, dmaMotorTimers[i].timerDmaSources, ENABLE);
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dmaMotorTimers[i].timerDmaSources = 0;
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}
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}
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}
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static void motor_DMA_IRQHandler(dmaChannelDescriptor_t *descriptor)
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{
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if (DMA_GET_FLAG_STATUS(descriptor, DMA_IT_TCIF)) {
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motorDmaOutput_t * const motor = &dmaMotors[descriptor->userParam];
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#ifdef USE_DSHOT_DMAR
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if (useBurstDshot) {
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DMA_Cmd(motor->timerHardware->dmaTimUPRef, DISABLE);
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TIM_DMACmd(motor->timerHardware->tim, TIM_DMA_Update, DISABLE);
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} else
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#endif
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{
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DMA_Cmd(motor->timerHardware->dmaRef, DISABLE);
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TIM_DMACmd(motor->timerHardware->tim, motor->timerDmaSource, DISABLE);
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}
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DMA_CLEAR_FLAG(descriptor, DMA_IT_TCIF);
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}
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}
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void pwmDshotMotorHardwareConfig(const timerHardware_t *timerHardware, uint8_t motorIndex, motorPwmProtocolTypes_e pwmProtocolType, uint8_t output)
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{
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#if defined(STM32F4) || defined(STM32F7)
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typedef DMA_Stream_TypeDef dmaStream_t;
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#else
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typedef DMA_Channel_TypeDef dmaStream_t;
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#endif
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dmaStream_t *dmaRef;
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#ifdef USE_DSHOT_DMAR
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if (useBurstDshot) {
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dmaRef = timerHardware->dmaTimUPRef;
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} else
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#endif
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{
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dmaRef = timerHardware->dmaRef;
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}
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if (dmaRef == NULL) {
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return;
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}
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TIM_OCInitTypeDef TIM_OCInitStructure;
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DMA_InitTypeDef DMA_InitStructure;
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motorDmaOutput_t * const motor = &dmaMotors[motorIndex];
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motor->timerHardware = timerHardware;
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TIM_TypeDef *timer = timerHardware->tim;
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const IO_t motorIO = IOGetByTag(timerHardware->tag);
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// Boolean configureTimer is always true when different channels of the same timer are processed in sequence,
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// causing the timer and the associated DMA initialized more than once.
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// To fix this, getTimerIndex must be expanded to return if a new timer has been requested.
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// However, since the initialization is idempotent, it is left as is in a favor of flash space (for now).
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const uint8_t timerIndex = getTimerIndex(timer);
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const bool configureTimer = (timerIndex == dmaMotorTimerCount-1);
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IOConfigGPIOAF(motorIO, IO_CONFIG(GPIO_Mode_AF, GPIO_Speed_50MHz, GPIO_OType_PP, GPIO_PuPd_UP), timerHardware->alternateFunction);
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if (configureTimer) {
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TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
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TIM_TimeBaseStructInit(&TIM_TimeBaseStructure);
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RCC_ClockCmd(timerRCC(timer), ENABLE);
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TIM_Cmd(timer, DISABLE);
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TIM_TimeBaseStructure.TIM_Prescaler = (uint16_t)(lrintf((float) timerClock(timer) / getDshotHz(pwmProtocolType) + 0.01f) - 1);
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TIM_TimeBaseStructure.TIM_Period = pwmProtocolType == PWM_TYPE_PROSHOT1000 ? MOTOR_NIBBLE_LENGTH_PROSHOT : MOTOR_BITLENGTH;
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TIM_TimeBaseStructure.TIM_ClockDivision = TIM_CKD_DIV1;
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TIM_TimeBaseStructure.TIM_RepetitionCounter = 0;
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TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
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TIM_TimeBaseInit(timer, &TIM_TimeBaseStructure);
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}
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TIM_OCStructInit(&TIM_OCInitStructure);
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TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
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if (output & TIMER_OUTPUT_N_CHANNEL) {
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TIM_OCInitStructure.TIM_OutputNState = TIM_OutputNState_Enable;
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TIM_OCInitStructure.TIM_OCNIdleState = TIM_OCNIdleState_Reset;
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TIM_OCInitStructure.TIM_OCNPolarity = (output & TIMER_OUTPUT_INVERTED) ? TIM_OCNPolarity_Low : TIM_OCNPolarity_High;
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} else {
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TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
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TIM_OCInitStructure.TIM_OCIdleState = TIM_OCIdleState_Set;
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TIM_OCInitStructure.TIM_OCPolarity = (output & TIMER_OUTPUT_INVERTED) ? TIM_OCPolarity_Low : TIM_OCPolarity_High;
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}
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TIM_OCInitStructure.TIM_Pulse = 0;
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timerOCInit(timer, timerHardware->channel, &TIM_OCInitStructure);
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timerOCPreloadConfig(timer, timerHardware->channel, TIM_OCPreload_Enable);
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if (output & TIMER_OUTPUT_N_CHANNEL) {
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TIM_CCxNCmd(timer, timerHardware->channel, TIM_CCxN_Enable);
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} else {
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TIM_CCxCmd(timer, timerHardware->channel, TIM_CCx_Enable);
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}
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if (configureTimer) {
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TIM_CtrlPWMOutputs(timer, ENABLE);
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TIM_ARRPreloadConfig(timer, ENABLE);
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TIM_Cmd(timer, ENABLE);
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}
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motor->timer = &dmaMotorTimers[timerIndex];
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#ifdef USE_DSHOT_DMAR
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if (useBurstDshot) {
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motor->timer->dmaBurstRef = dmaRef;
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if (!configureTimer) {
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motor->configured = true;
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return;
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}
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} else
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#endif
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{
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motor->timerDmaSource = timerDmaSource(timerHardware->channel);
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motor->timer->timerDmaSources &= ~motor->timerDmaSource;
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}
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DMA_Cmd(dmaRef, DISABLE);
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DMA_DeInit(dmaRef);
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DMA_StructInit(&DMA_InitStructure);
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#ifdef USE_DSHOT_DMAR
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if (useBurstDshot) {
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dmaInit(timerHardware->dmaTimUPIrqHandler, OWNER_TIMUP, timerGetTIMNumber(timerHardware->tim));
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dmaSetHandler(timerHardware->dmaTimUPIrqHandler, motor_DMA_IRQHandler, NVIC_BUILD_PRIORITY(1, 2), motorIndex);
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#if defined(STM32F3)
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DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)motor->timer->dmaBurstBuffer;
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DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
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#else
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DMA_InitStructure.DMA_Channel = timerHardware->dmaTimUPChannel;
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DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)motor->timer->dmaBurstBuffer;
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DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral;
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DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Enable;
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DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full;
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DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
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DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
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#endif
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DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)&timerHardware->tim->DMAR;
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DMA_InitStructure.DMA_BufferSize = (pwmProtocolType == PWM_TYPE_PROSHOT1000) ? PROSHOT_DMA_BUFFER_SIZE : DSHOT_DMA_BUFFER_SIZE; // XXX
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DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
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DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
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DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word;
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DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Word;
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DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
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DMA_InitStructure.DMA_Priority = DMA_Priority_High;
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} else
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#endif
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{
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dmaInit(timerHardware->dmaIrqHandler, OWNER_MOTOR, RESOURCE_INDEX(motorIndex));
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dmaSetHandler(timerHardware->dmaIrqHandler, motor_DMA_IRQHandler, NVIC_BUILD_PRIORITY(1, 2), motorIndex);
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#if defined(STM32F3)
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DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)motor->dmaBuffer;
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DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
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DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
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#elif defined(STM32F4)
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DMA_InitStructure.DMA_Channel = timerHardware->dmaChannel;
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DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)motor->dmaBuffer;
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DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral;
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DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Enable;
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DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_1QuarterFull;
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DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
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DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
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#endif
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DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)timerChCCR(timerHardware);
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DMA_InitStructure.DMA_BufferSize = pwmProtocolType == PWM_TYPE_PROSHOT1000 ? PROSHOT_DMA_BUFFER_SIZE : DSHOT_DMA_BUFFER_SIZE;
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DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
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DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
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DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word;
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DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Word;
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DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
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DMA_InitStructure.DMA_Priority = DMA_Priority_High;
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}
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// XXX Consolidate common settings in the next refactor
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DMA_Init(dmaRef, &DMA_InitStructure);
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DMA_ITConfig(dmaRef, DMA_IT_TC, ENABLE);
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motor->configured = true;
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}
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#endif
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