mirror of
https://github.com/betaflight/betaflight.git
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396 lines
15 KiB
C
396 lines
15 KiB
C
/*
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* Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include "hardware/claim.h"
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#include "hardware/pio.h"
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#include "hardware/pio_instructions.h"
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// sanity check
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check_hw_layout(pio_hw_t, sm[0].clkdiv, PIO_SM0_CLKDIV_OFFSET);
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check_hw_layout(pio_hw_t, sm[1].clkdiv, PIO_SM1_CLKDIV_OFFSET);
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check_hw_layout(pio_hw_t, instr_mem[0], PIO_INSTR_MEM0_OFFSET);
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check_hw_layout(pio_hw_t, inte0, PIO_IRQ0_INTE_OFFSET);
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check_hw_layout(pio_hw_t, irq_ctrl[0].inte, PIO_IRQ0_INTE_OFFSET);
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check_hw_layout(pio_hw_t, txf[1], PIO_TXF1_OFFSET);
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check_hw_layout(pio_hw_t, rxf[3], PIO_RXF3_OFFSET);
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check_hw_layout(pio_hw_t, ints1, PIO_IRQ1_INTS_OFFSET);
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check_hw_layout(pio_hw_t, irq_ctrl[1].ints, PIO_IRQ1_INTS_OFFSET);
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static uint8_t claimed[(NUM_PIO_STATE_MACHINES * NUM_PIOS + 7) >> 3];
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void pio_sm_claim(PIO pio, uint sm) {
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check_sm_param(sm);
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uint which = pio_get_index(pio);
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const char *msg =
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#if PICO_PIO_VERSION > 0
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which == 2 ? "PIO 2 SM (%d - 8) already claimed" :
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#endif
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which == 1 ? "PIO 1 SM (%d - 4) already claimed" :
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"PIO 0 SM %d already claimed";
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hw_claim_or_assert(&claimed[0], which * NUM_PIO_STATE_MACHINES + sm, msg);
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}
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void pio_claim_sm_mask(PIO pio, uint sm_mask) {
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for(uint i = 0; sm_mask; i++, sm_mask >>= 1u) {
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if (sm_mask & 1u) pio_sm_claim(pio, i);
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}
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}
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void pio_sm_unclaim(PIO pio, uint sm) {
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check_sm_param(sm);
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uint which = pio_get_index(pio);
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hw_claim_clear(&claimed[0], which * NUM_PIO_STATE_MACHINES + sm);
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}
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int pio_claim_unused_sm(PIO pio, bool required) {
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// PIO index ranges from 0 to NUM_PIOS - 1.
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uint which = pio_get_index(pio);
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uint base = which * NUM_PIO_STATE_MACHINES;
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int index = hw_claim_unused_from_range((uint8_t*)&claimed[0], required, base,
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base + NUM_PIO_STATE_MACHINES - 1, "No PIO state machines are available");
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return index >= (int)base ? index - (int)base : -1;
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}
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bool pio_sm_is_claimed(PIO pio, uint sm) {
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check_sm_param(sm);
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uint which = pio_get_index(pio);
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return hw_is_claimed(&claimed[0], which * NUM_PIO_STATE_MACHINES + sm);
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}
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static_assert(PIO_INSTRUCTION_COUNT <= 32, "");
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static uint32_t _used_instruction_space[NUM_PIOS];
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static int find_offset_for_program(PIO pio, const pio_program_t *program) {
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assert(program->length <= PIO_INSTRUCTION_COUNT);
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uint32_t used_mask = _used_instruction_space[pio_get_index(pio)];
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uint32_t program_mask = (1u << program->length) - 1;
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if (program->origin >= 0) {
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if (program->origin > 32 - program->length) return PICO_ERROR_GENERIC;
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return used_mask & (program_mask << program->origin) ? -1 : program->origin;
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} else {
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// work down from the top always
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for (int i = 32 - program->length; i >= 0; i--) {
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if (!(used_mask & (program_mask << (uint) i))) {
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return i;
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}
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}
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return PICO_ERROR_INSUFFICIENT_RESOURCES;
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}
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}
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static int pio_set_gpio_base_unsafe(PIO pio, uint gpio_base) {
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invalid_params_if_and_return(PIO, gpio_base != 0 && (!PICO_PIO_VERSION || gpio_base != 16), PICO_ERROR_BAD_ALIGNMENT);
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#if PICO_PIO_VERSION > 0
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uint32_t used_mask = _used_instruction_space[pio_get_index(pio)];
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invalid_params_if_and_return(PIO, used_mask, PICO_ERROR_INVALID_STATE);
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pio->gpiobase = gpio_base;
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#else
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((void)pio);
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((void)gpio_base);
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#endif
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return PICO_OK;
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}
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int pio_set_gpio_base(PIO pio, uint gpio_base) {
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int rc = PICO_OK;
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#if PICO_PIO_VERSION > 0
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uint32_t save = hw_claim_lock();
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rc = pio_set_gpio_base_unsafe(pio, gpio_base);
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hw_claim_unlock(save);
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#else
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((void)pio);
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((void)gpio_base);
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#endif
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return rc;
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}
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static bool is_gpio_compatible(PIO pio, uint32_t used_gpio_ranges) {
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#if PICO_PIO_VERSION > 0
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bool gpio_base = pio_get_gpio_base(pio);
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return !((gpio_base && (used_gpio_ranges & 1)) ||
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(!gpio_base && (used_gpio_ranges & 4)));
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#else
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((void)pio);
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((void)used_gpio_ranges);
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return true;
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#endif
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}
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static bool is_program_gpio_compatible(PIO pio, const pio_program_t *program) {
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#if PICO_PIO_VERSION > 0
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return is_gpio_compatible(pio, program->used_gpio_ranges);
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#else
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((void)pio);
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((void)program);
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return true;
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#endif
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}
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static int add_program_at_offset_check(PIO pio, const pio_program_t *program, uint offset) {
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valid_params_if(HARDWARE_PIO, offset < PIO_INSTRUCTION_COUNT);
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valid_params_if(HARDWARE_PIO, offset + program->length <= PIO_INSTRUCTION_COUNT);
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#if PICO_PIO_VERSION == 0
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if (program->pio_version) return PICO_ERROR_VERSION_MISMATCH;
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#endif
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if (!is_program_gpio_compatible(pio, program)) return PICO_ERROR_BAD_ALIGNMENT; // todo better error?
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if (program->origin >= 0 && (uint)program->origin != offset) return PICO_ERROR_BAD_ALIGNMENT; // todo better error?
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uint32_t used_mask = _used_instruction_space[pio_get_index(pio)];
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uint32_t program_mask = (1u << program->length) - 1;
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return (used_mask & (program_mask << offset)) ? PICO_ERROR_INSUFFICIENT_RESOURCES : PICO_OK;
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}
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bool pio_can_add_program(PIO pio, const pio_program_t *program) {
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uint32_t save = hw_claim_lock();
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int rc = find_offset_for_program(pio, program);
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if (rc >= 0) rc = add_program_at_offset_check(pio, program, (uint)rc);
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hw_claim_unlock(save);
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return rc == 0;
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}
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bool pio_can_add_program_at_offset(PIO pio, const pio_program_t *program, uint offset) {
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uint32_t save = hw_claim_lock();
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bool rc = add_program_at_offset_check(pio, program, offset) == 0;
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hw_claim_unlock(save);
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return rc;
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}
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static int add_program_at_offset(PIO pio, const pio_program_t *program, uint offset) {
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int rc = add_program_at_offset_check(pio, program, offset);
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if (rc != 0) return rc;
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for (uint i = 0; i < program->length; ++i) {
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uint16_t instr = program->instructions[i];
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pio->instr_mem[offset + i] = pio_instr_bits_jmp != _pio_major_instr_bits(instr) ? instr : instr + offset;
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}
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uint32_t program_mask = (1u << program->length) - 1;
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_used_instruction_space[pio_get_index(pio)] |= program_mask << offset;
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return (int)offset;
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}
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// these assert if unable
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int pio_add_program(PIO pio, const pio_program_t *program) {
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uint32_t save = hw_claim_lock();
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int offset = find_offset_for_program(pio, program);
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if (offset >= 0) {
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offset = add_program_at_offset(pio, program, (uint) offset);
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}
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hw_claim_unlock(save);
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return offset;
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}
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int pio_add_program_at_offset(PIO pio, const pio_program_t *program, uint offset) {
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uint32_t save = hw_claim_lock();
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int rc = add_program_at_offset(pio, program, offset);
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hw_claim_unlock(save);
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return rc;
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}
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void pio_remove_program(PIO pio, const pio_program_t *program, uint loaded_offset) {
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uint32_t program_mask = (1u << program->length) - 1;
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program_mask <<= loaded_offset;
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uint32_t save = hw_claim_lock();
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assert(program_mask == (_used_instruction_space[pio_get_index(pio)] & program_mask));
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_used_instruction_space[pio_get_index(pio)] &= ~program_mask;
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hw_claim_unlock(save);
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}
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void pio_clear_instruction_memory(PIO pio) {
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uint32_t save = hw_claim_lock();
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_used_instruction_space[pio_get_index(pio)] = 0;
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for(uint i=0;i<PIO_INSTRUCTION_COUNT;i++) {
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pio->instr_mem[i] = pio_encode_jmp(i);
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}
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hw_claim_unlock(save);
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}
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// Set the value of all PIO pins. This is done by forcibly executing
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// instructions on a "victim" state machine, sm. Ideally you should choose one
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// which is not currently running a program. This is intended for one-time
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// setup of initial pin states.
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void pio_sm_set_pins(PIO pio, uint sm, uint32_t pins) {
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check_pio_param(pio);
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check_sm_param(sm);
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uint32_t pinctrl_saved = pio->sm[sm].pinctrl;
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uint32_t execctrl_saved = pio->sm[sm].execctrl;
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hw_clear_bits(&pio->sm[sm].execctrl, 1u << PIO_SM0_EXECCTRL_OUT_STICKY_LSB);
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uint remaining = 32;
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uint base = 0;
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while (remaining) {
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uint decrement = remaining > 5 ? 5 : remaining;
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pio->sm[sm].pinctrl =
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(decrement << PIO_SM0_PINCTRL_SET_COUNT_LSB) |
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(base << PIO_SM0_PINCTRL_SET_BASE_LSB);
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pio_sm_exec(pio, sm, pio_encode_set(pio_pins, pins & 0x1fu));
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remaining -= decrement;
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base += decrement;
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pins >>= 5;
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}
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pio->sm[sm].pinctrl = pinctrl_saved;
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pio->sm[sm].execctrl = execctrl_saved;
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}
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void pio_sm_set_pins_with_mask(PIO pio, uint sm, uint32_t pinvals, uint32_t pin_mask) {
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check_pio_param(pio);
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check_sm_param(sm);
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uint32_t pinctrl_saved = pio->sm[sm].pinctrl;
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uint32_t execctrl_saved = pio->sm[sm].execctrl;
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hw_clear_bits(&pio->sm[sm].execctrl, 1u << PIO_SM0_EXECCTRL_OUT_STICKY_LSB);
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while (pin_mask) {
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uint base = (uint)__builtin_ctz(pin_mask);
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pio->sm[sm].pinctrl =
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(1u << PIO_SM0_PINCTRL_SET_COUNT_LSB) |
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(base << PIO_SM0_PINCTRL_SET_BASE_LSB);
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pio_sm_exec(pio, sm, pio_encode_set(pio_pins, (pinvals >> base) & 0x1u));
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pin_mask &= pin_mask - 1;
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}
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pio->sm[sm].pinctrl = pinctrl_saved;
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pio->sm[sm].execctrl = execctrl_saved;
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}
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void pio_sm_set_pindirs_with_mask(PIO pio, uint sm, uint32_t pindirs, uint32_t pin_mask) {
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check_pio_param(pio);
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check_sm_param(sm);
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uint32_t pinctrl_saved = pio->sm[sm].pinctrl;
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uint32_t execctrl_saved = pio->sm[sm].execctrl;
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hw_clear_bits(&pio->sm[sm].execctrl, 1u << PIO_SM0_EXECCTRL_OUT_STICKY_LSB);
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while (pin_mask) {
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uint base = (uint)__builtin_ctz(pin_mask);
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pio->sm[sm].pinctrl =
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(1u << PIO_SM0_PINCTRL_SET_COUNT_LSB) |
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(base << PIO_SM0_PINCTRL_SET_BASE_LSB);
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pio_sm_exec(pio, sm, pio_encode_set(pio_pindirs, (pindirs >> base) & 0x1u));
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pin_mask &= pin_mask - 1;
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}
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pio->sm[sm].pinctrl = pinctrl_saved;
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pio->sm[sm].execctrl = execctrl_saved;
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}
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int pio_sm_set_consecutive_pindirs(PIO pio, uint sm, uint pin, uint count, bool is_out) {
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check_pio_param(pio);
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check_sm_param(sm);
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pin -= pio_get_gpio_base(pio);
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invalid_params_if_and_return(PIO, pin >= 32u, PICO_ERROR_INVALID_ARG);
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uint32_t pinctrl_saved = pio->sm[sm].pinctrl;
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uint32_t execctrl_saved = pio->sm[sm].execctrl;
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hw_clear_bits(&pio->sm[sm].execctrl, 1u << PIO_SM0_EXECCTRL_OUT_STICKY_LSB);
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uint pindir_val = is_out ? 0x1f : 0;
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while (count > 5) {
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pio->sm[sm].pinctrl = (5u << PIO_SM0_PINCTRL_SET_COUNT_LSB) | (pin << PIO_SM0_PINCTRL_SET_BASE_LSB);
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pio_sm_exec(pio, sm, pio_encode_set(pio_pindirs, pindir_val));
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count -= 5;
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pin = (pin + 5) & 0x1f;
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}
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pio->sm[sm].pinctrl = (count << PIO_SM0_PINCTRL_SET_COUNT_LSB) | (pin << PIO_SM0_PINCTRL_SET_BASE_LSB);
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pio_sm_exec(pio, sm, pio_encode_set(pio_pindirs, pindir_val));
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pio->sm[sm].pinctrl = pinctrl_saved;
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pio->sm[sm].execctrl = execctrl_saved;
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return PICO_OK;
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}
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int pio_sm_init(PIO pio, uint sm, uint initial_pc, const pio_sm_config *config) {
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valid_params_if(HARDWARE_PIO, initial_pc < PIO_INSTRUCTION_COUNT);
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// Halt the machine, set some sensible defaults
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pio_sm_set_enabled(pio, sm, false);
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int rc;
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if (config) {
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rc = pio_sm_set_config(pio, sm, config);
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} else {
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pio_sm_config c = pio_get_default_sm_config();
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rc = pio_sm_set_config(pio, sm, &c);
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}
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if (rc) return rc;
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pio_sm_clear_fifos(pio, sm);
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// Clear FIFO debug flags
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const uint32_t fdebug_sm_mask =
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(1u << PIO_FDEBUG_TXOVER_LSB) |
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(1u << PIO_FDEBUG_RXUNDER_LSB) |
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(1u << PIO_FDEBUG_TXSTALL_LSB) |
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(1u << PIO_FDEBUG_RXSTALL_LSB);
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pio->fdebug = fdebug_sm_mask << sm;
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// Finally, clear some internal SM state
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pio_sm_restart(pio, sm);
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pio_sm_clkdiv_restart(pio, sm);
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pio_sm_exec(pio, sm, pio_encode_jmp(initial_pc));
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return PICO_OK;
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}
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void pio_sm_drain_tx_fifo(PIO pio, uint sm) {
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uint instr = (pio->sm[sm].shiftctrl & PIO_SM0_SHIFTCTRL_AUTOPULL_BITS) ? pio_encode_out(pio_null, 32) :
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pio_encode_pull(false, false);
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while (!pio_sm_is_tx_fifo_empty(pio, sm)) {
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pio_sm_exec(pio, sm, instr);
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}
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}
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bool pio_claim_free_sm_and_add_program(const pio_program_t *program, PIO *pio, uint *sm, uint *offset) {
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return pio_claim_free_sm_and_add_program_for_gpio_range(program, pio, sm, offset, 0, 0, false);
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}
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bool pio_claim_free_sm_and_add_program_for_gpio_range(const pio_program_t *program, PIO *pio, uint *sm, uint *offset, uint gpio_base, uint gpio_count, bool set_gpio_base) {
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invalid_params_if(HARDWARE_PIO, (gpio_base + gpio_count) > NUM_BANK0_GPIOS);
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#if !PICO_PIO_USE_GPIO_BASE
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// short-circuit some logic when not using GIO_BASE
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set_gpio_base = 0;
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gpio_count = 0;
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#endif
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// note if we gpio_count == 0, we don't care about GPIOs so use a zero mask for what we require
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// if gpio_count > 0, then we just set used mask for the ends, since that is all that is checked at the moment
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uint32_t required_gpio_ranges;
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if (gpio_count) required_gpio_ranges = (1u << (gpio_base >> 4)) | (1u << ((gpio_base + gpio_count - 1) >> 4));
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else required_gpio_ranges = 0;
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int passes = set_gpio_base ? 2 : 1;
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for(int pass = 0; pass < passes; pass++) {
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int pio_num = NUM_PIOS;
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while (pio_num--) {
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*pio = pio_get_instance((uint)pio_num);
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// We need to claim an SM on the PIO
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int8_t sm_index[NUM_PIO_STATE_MACHINES];
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// on second pass, if there is one, we try and claim all the state machines so that we can change the GPIO base
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uint num_claimed;
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for(num_claimed = 0; num_claimed < (pass ? NUM_PIO_STATE_MACHINES : 1u) ; num_claimed++) {
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sm_index[num_claimed] = (int8_t)pio_claim_unused_sm(*pio, false);
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if (sm_index[num_claimed] < 0) break;
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}
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if (num_claimed && (!pass || num_claimed == NUM_PIO_STATE_MACHINES)) {
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uint32_t save = hw_claim_lock();
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if (pass) {
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pio_set_gpio_base_unsafe(*pio, required_gpio_ranges & 4 ? 16 : 0);
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}
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int rc = is_gpio_compatible(*pio, required_gpio_ranges) ? PICO_OK : PICO_ERROR_BAD_ALIGNMENT;
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if (rc == PICO_OK) rc = find_offset_for_program(*pio, program);
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if (rc >= 0) rc = add_program_at_offset(*pio, program, (uint)rc);
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if (rc >= 0) {
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*sm = (uint) sm_index[0];
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*offset = (uint) rc;
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}
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hw_claim_unlock(save);
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// always un-claim all SMs other than the one we need (array index 0),
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// or all of them if we had an error
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for (uint i = (rc >= 0); i < num_claimed; i++) {
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pio_sm_unclaim(*pio, (uint) sm_index[i]);
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}
|
|
if (rc >= 0) {
|
|
return true;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
*pio = NULL;
|
|
return false;
|
|
}
|
|
|
|
void pio_remove_program_and_unclaim_sm(const pio_program_t *program, PIO pio, uint sm, uint offset) {
|
|
check_pio_param(pio);
|
|
check_sm_param(sm);
|
|
pio_remove_program(pio, program, offset);
|
|
pio_sm_unclaim(pio, sm);
|
|
}
|