mirror of
https://github.com/betaflight/betaflight.git
synced 2025-07-12 19:10:32 +03:00
337 lines
9.9 KiB
C
337 lines
9.9 KiB
C
/*
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* This file is part of Cleanflight and Betaflight.
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*
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* Cleanflight and Betaflight are free software. You can redistribute
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* this software and/or modify this software under the terms of the
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* GNU General Public License as published by the Free Software
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* Foundation, either version 3 of the License, or (at your option)
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* any later version.
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*
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* Cleanflight and Betaflight are distributed in the hope that they
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* will be useful, but WITHOUT ANY WARRANTY; without even the implied
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* warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See the GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this software.
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*
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* If not, see <http://www.gnu.org/licenses/>.
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*
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* Author: jflyper
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*/
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#include <stdbool.h>
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#include <stdint.h>
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#include "platform.h"
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#ifdef USE_UART
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#include "drivers/system.h"
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#include "drivers/dma.h"
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#include "drivers/io.h"
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#include "drivers/nvic.h"
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#include "drivers/rcc.h"
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#include "drivers/serial.h"
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#include "drivers/serial_uart.h"
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#include "drivers/serial_uart_impl.h"
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#ifndef UART1_TX_DMA_CHANNEL
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#define UART1_TX_DMA_CHANNEL NULL
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#endif
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#ifndef UART1_RX_DMA_CHANNEL
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#define UART1_RX_DMA_CHANNEL NULL
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#endif
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#ifndef UART2_TX_DMA_CHANNEL
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#define UART2_TX_DMA_CHANNEL NULL
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#endif
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#ifndef UART2_RX_DMA_CHANNEL
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#define UART2_RX_DMA_CHANNEL NULL
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#endif
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#ifndef UART3_TX_DMA_CHANNEL
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#define UART3_TX_DMA_CHANNEL NULL
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#endif
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#ifndef UART3_RX_DMA_CHANNEL
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#define UART3_RX_DMA_CHANNEL NULL
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#endif
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#ifndef UART4_TX_DMA_CHANNEL
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#define UART4_TX_DMA_CHANNEL NULL
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#endif
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#ifndef UART4_RX_DMA_CHANNEL
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#define UART4_RX_DMA_CHANNEL NULL
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#endif
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#ifndef UART5_TX_DMA_CHANNEL
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#define UART5_TX_DMA_CHANNEL NULL
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#endif
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#ifndef UART5_RX_DMA_CHANNEL
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#define UART5_RX_DMA_CHANNEL NULL
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#endif
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#ifndef LPUART1_TX_DMA_CHANNEL
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#define LPUART1_TX_DMA_CHANNEL NULL
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#endif
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#ifndef LPUART1_RX_DMA_CHANNEL
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#define LPUART1_RX_DMA_CHANNEL NULL
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#endif
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const uartHardware_t uartHardware[UARTDEV_COUNT] = {
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#ifdef USE_UART1
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{
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.device = UARTDEV_1,
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.reg = USART1,
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#ifdef USE_DMA
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.rxDMAChannel = DMA_REQUEST_USART1_RX,
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.rxDMAResource = (dmaResource_t *)UART1_RX_DMA_CHANNEL,
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.txDMAChannel = DMA_REQUEST_USART1_TX,
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.txDMAResource = (dmaResource_t *)UART1_TX_DMA_CHANNEL,
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#endif
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.rxPins = {
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{ DEFIO_TAG_E(PA10), GPIO_AF7_USART1 },
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{ DEFIO_TAG_E(PB7), GPIO_AF7_USART1 },
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{ DEFIO_TAG_E(PC5), GPIO_AF7_USART1 },
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},
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.txPins = {
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{ DEFIO_TAG_E(PA9), GPIO_AF7_USART1 },
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{ DEFIO_TAG_E(PB6), GPIO_AF7_USART1 },
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{ DEFIO_TAG_E(PC4), GPIO_AF7_USART1 },
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},
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.rcc = RCC_APB2(USART1),
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.rxIrq = USART1_IRQn,
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.txPriority = NVIC_PRIO_SERIALUART1_TXDMA,
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.rxPriority = NVIC_PRIO_SERIALUART1,
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.txBuffer = uart1TxBuffer,
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.rxBuffer = uart1RxBuffer,
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.txBufferSize = sizeof(uart1TxBuffer),
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.rxBufferSize = sizeof(uart1RxBuffer),
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},
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#endif
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#ifdef USE_UART2
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{
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.device = UARTDEV_2,
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.reg = USART2,
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#ifdef USE_DMA
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.rxDMAChannel = DMA_REQUEST_USART2_RX,
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.rxDMAResource = (dmaResource_t *)UART2_RX_DMA_CHANNEL,
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.txDMAChannel = DMA_REQUEST_USART2_TX,
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.txDMAResource = (dmaResource_t *)UART2_TX_DMA_CHANNEL,
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#endif
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.rxPins = {
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{ DEFIO_TAG_E(PA3), GPIO_AF7_USART2 },
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{ DEFIO_TAG_E(PA15), GPIO_AF7_USART2 },
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{ DEFIO_TAG_E(PB4), GPIO_AF7_USART2 },
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},
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.txPins = {
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{ DEFIO_TAG_E(PA2), GPIO_AF7_USART2 },
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{ DEFIO_TAG_E(PA14), GPIO_AF7_USART2 },
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{ DEFIO_TAG_E(PB3), GPIO_AF7_USART2 },
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},
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.rcc = RCC_APB11(USART2),
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.rxIrq = USART2_IRQn,
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.txPriority = NVIC_PRIO_SERIALUART2_TXDMA,
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.rxPriority = NVIC_PRIO_SERIALUART2,
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.txBuffer = uart2TxBuffer,
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.rxBuffer = uart2RxBuffer,
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.txBufferSize = sizeof(uart2TxBuffer),
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.rxBufferSize = sizeof(uart2RxBuffer),
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},
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#endif
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#ifdef USE_UART3
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{
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.device = UARTDEV_3,
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.reg = USART3,
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#ifdef USE_DMA
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.rxDMAChannel = DMA_REQUEST_USART3_RX,
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.rxDMAResource = (dmaResource_t *)UART3_RX_DMA_CHANNEL,
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.txDMAChannel = DMA_REQUEST_USART3_TX,
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.txDMAResource = (dmaResource_t *)UART3_TX_DMA_CHANNEL,
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#endif
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.rxPins = {
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{ DEFIO_TAG_E(PB8), GPIO_AF7_USART3 },
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{ DEFIO_TAG_E(PB11), GPIO_AF7_USART3 },
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{ DEFIO_TAG_E(PC11), GPIO_AF7_USART3 },
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},
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.txPins = {
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{ DEFIO_TAG_E(PB9), GPIO_AF7_USART3 },
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{ DEFIO_TAG_E(PB10), GPIO_AF7_USART3 },
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{ DEFIO_TAG_E(PC10), GPIO_AF7_USART3 },
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},
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.rcc = RCC_APB11(USART3),
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.rxIrq = USART3_IRQn,
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.txPriority = NVIC_PRIO_SERIALUART3_TXDMA,
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.rxPriority = NVIC_PRIO_SERIALUART3,
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.txBuffer = uart3TxBuffer,
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.rxBuffer = uart3RxBuffer,
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.txBufferSize = sizeof(uart3TxBuffer),
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.rxBufferSize = sizeof(uart3RxBuffer),
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},
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#endif
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#ifdef USE_UART4
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{
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.device = UARTDEV_4,
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.reg = UART4,
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#ifdef USE_DMA
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.rxDMAChannel = DMA_REQUEST_UART4_RX,
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.rxDMAResource = (dmaResource_t *)UART4_RX_DMA_CHANNEL,
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.txDMAChannel = DMA_REQUEST_UART4_TX,
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.txDMAResource = (dmaResource_t *)UART4_TX_DMA_CHANNEL,
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#endif
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.rxPins = {
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{ DEFIO_TAG_E(PC11), GPIO_AF5_UART4 },
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},
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.txPins = {
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{ DEFIO_TAG_E(PC10), GPIO_AF5_UART4 },
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},
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.rcc = RCC_APB11(UART4),
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.rxIrq = UART4_IRQn,
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.txPriority = NVIC_PRIO_SERIALUART4_TXDMA,
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.rxPriority = NVIC_PRIO_SERIALUART4,
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.txBuffer = uart4TxBuffer,
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.rxBuffer = uart4RxBuffer,
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.txBufferSize = sizeof(uart4TxBuffer),
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.rxBufferSize = sizeof(uart4RxBuffer),
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},
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#endif
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#ifdef USE_UART5
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{
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.device = UARTDEV_5,
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.reg = UART5,
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#ifdef USE_DMA
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.rxDMAChannel = DMA_REQUEST_UART5_RX,
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.rxDMAResource = (dmaResource_t *)UART5_RX_DMA_CHANNEL,
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.txDMAChannel = DMA_REQUEST_UART5_TX,
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.txDMAResource = (dmaResource_t *)UART5_TX_DMA_CHANNEL,
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#endif
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.rxPins = {
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{ DEFIO_TAG_E(PD2), GPIO_AF5_UART5 },
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},
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.txPins = {
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{ DEFIO_TAG_E(PC12), GPIO_AF5_UART5 },
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},
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.rcc = RCC_APB11(UART5),
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.rxIrq = UART5_IRQn,
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.txPriority = NVIC_PRIO_SERIALUART5_TXDMA,
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.rxPriority = NVIC_PRIO_SERIALUART5,
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.txBuffer = uart5TxBuffer,
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.rxBuffer = uart5RxBuffer,
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.txBufferSize = sizeof(uart5TxBuffer),
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.rxBufferSize = sizeof(uart5RxBuffer),
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},
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#endif
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#ifdef USE_LPUART1
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{
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.device = LPUARTDEV_1,
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.reg = LPUART1,
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#ifdef USE_DMA
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.rxDMAChannel = DMA_REQUEST_LPUART1_RX,
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.rxDMAResource = (dmaResource_t *)LPUART1_RX_DMA_CHANNEL,
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.txDMAChannel = DMA_REQUEST_LPUART1_TX,
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.txDMAResource = (dmaResource_t *)LPUART1_TX_DMA_CHANNEL,
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#endif
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.rxPins = {
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{ DEFIO_TAG_E(PA3), GPIO_AF12_LPUART1 },
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{ DEFIO_TAG_E(PB10), GPIO_AF8_LPUART1 },
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{ DEFIO_TAG_E(PC0), GPIO_AF8_LPUART1 },
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},
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.txPins = {
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{ DEFIO_TAG_E(PA2), GPIO_AF12_LPUART1 },
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{ DEFIO_TAG_E(PB11), GPIO_AF8_LPUART1 },
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{ DEFIO_TAG_E(PC1), GPIO_AF8_LPUART1 },
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},
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.rcc = RCC_APB12(LPUART1),
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.rxIrq = LPUART1_IRQn,
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.txPriority = NVIC_PRIO_SERIALUART6_TXDMA,
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.rxPriority = NVIC_PRIO_SERIALUART6,
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.txBuffer = lpuart1TxBuffer,
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.rxBuffer = lpuart1RxBuffer,
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.txBufferSize = sizeof(lpuart1TxBuffer),
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.rxBufferSize = sizeof(lpuart1RxBuffer),
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},
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#endif
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};
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// XXX Should serialUART be consolidated?
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uartPort_t *serialUART(UARTDevice_e device, uint32_t baudRate, portMode_e mode, portOptions_e options)
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{
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uartDevice_t *uartdev = uartDevmap[device];
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if (!uartdev) {
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return NULL;
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}
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uartPort_t *s = &(uartdev->port);
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s->port.vTable = uartVTable;
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s->port.baudRate = baudRate;
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const uartHardware_t *hardware = uartdev->hardware;
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s->USARTx = hardware->reg;
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s->port.rxBuffer = hardware->rxBuffer;
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s->port.txBuffer = hardware->txBuffer;
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s->port.rxBufferSize = hardware->rxBufferSize;
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s->port.txBufferSize = hardware->txBufferSize;
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s->checkUsartTxOutput = checkUsartTxOutput;
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#ifdef USE_DMA
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uartConfigureDma(uartdev);
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#endif
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s->Handle.Instance = hardware->reg;
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if (hardware->rcc) {
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RCC_ClockCmd(hardware->rcc, ENABLE);
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}
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IO_t txIO = IOGetByTag(uartdev->tx.pin);
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IO_t rxIO = IOGetByTag(uartdev->rx.pin);
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uartdev->txPinState = TX_PIN_IGNORE;
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if ((options & SERIAL_BIDIR) && txIO) {
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ioConfig_t ioCfg = IO_CONFIG(
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((options & SERIAL_INVERTED) || (options & SERIAL_BIDIR_PP) || (options & SERIAL_BIDIR_PP_PD)) ? GPIO_MODE_AF_PP : GPIO_MODE_AF_OD,
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GPIO_SPEED_FREQ_HIGH,
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(options & SERIAL_INVERTED) ? GPIO_PULLDOWN : GPIO_PULLUP
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);
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IOInit(txIO, OWNER_SERIAL_TX, RESOURCE_INDEX(device));
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IOConfigGPIOAF(txIO, ioCfg, uartdev->tx.af);
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} else {
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if ((mode & MODE_TX) && txIO) {
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IOInit(txIO, OWNER_SERIAL_TX, RESOURCE_INDEX(device));
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if (options & SERIAL_CHECK_TX) {
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uartdev->txPinState = TX_PIN_ACTIVE;
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// Switch TX to an input with pullup so it's state can be monitored
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uartTxMonitor(s);
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} else {
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IOConfigGPIOAF(txIO, IOCFG_AF_PP, uartdev->tx.af);
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}
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}
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if ((mode & MODE_RX) && rxIO) {
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IOInit(rxIO, OWNER_SERIAL_RX, RESOURCE_INDEX(device));
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IOConfigGPIOAF(rxIO, IOCFG_AF_PP, uartdev->rx.af);
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}
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}
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#ifdef USE_DMA
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if (!s->rxDMAResource)
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#endif
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{
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HAL_NVIC_SetPriority(hardware->rxIrq, NVIC_PRIORITY_BASE(hardware->rxPriority), NVIC_PRIORITY_SUB(hardware->rxPriority));
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HAL_NVIC_EnableIRQ(hardware->rxIrq);
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}
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return s;
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}
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#endif // USE_UART
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