mirror of
https://github.com/betaflight/betaflight.git
synced 2025-07-15 12:25:20 +03:00
- Add UART DMA configurability - Consolidation of DMA settings code DMA setting code for all MCUs is now in serial_uart.c - Consolidation of UART buffer UART buffers are not embedded in uartDevice[] array anymore for all MCUs. - Consolidation of HAL DMA IRQ handler - Add missing defs for DMA on UART4 for F3
252 lines
5.6 KiB
C
252 lines
5.6 KiB
C
/*
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* This file is part of Cleanflight and Betaflight.
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*
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* Cleanflight and Betaflight are free software. You can redistribute
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* this software and/or modify this software under the terms of the
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* GNU General Public License as published by the Free Software
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* Foundation, either version 3 of the License, or (at your option)
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* any later version.
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*
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* Cleanflight and Betaflight are distributed in the hope that they
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* will be useful, but WITHOUT ANY WARRANTY; without even the implied
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* warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See the GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this software.
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*
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* If not, see <http://www.gnu.org/licenses/>.
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*/
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#pragma once
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// Configuration constants
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#if defined(STM32F1)
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#define UARTDEV_COUNT_MAX 3
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#define UARTHARDWARE_MAX_PINS 3
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#ifndef UART_RX_BUFFER_SIZE
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#define UART_RX_BUFFER_SIZE 128
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#endif
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#ifndef UART_TX_BUFFER_SIZE
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#define UART_TX_BUFFER_SIZE 256
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#endif
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#elif defined(STM32F3)
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#define UARTDEV_COUNT_MAX 5
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#define UARTHARDWARE_MAX_PINS 4
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#ifndef UART_RX_BUFFER_SIZE
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#define UART_RX_BUFFER_SIZE 128
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#endif
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#ifndef UART_TX_BUFFER_SIZE
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#define UART_TX_BUFFER_SIZE 256
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#endif
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#elif defined(STM32F4)
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#define UARTDEV_COUNT_MAX 6
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#define UARTHARDWARE_MAX_PINS 4
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#ifndef UART_RX_BUFFER_SIZE
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#define UART_RX_BUFFER_SIZE 128
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#endif
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#ifndef UART_TX_BUFFER_SIZE
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#define UART_TX_BUFFER_SIZE 256
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#endif
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#elif defined(STM32F7)
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#define UARTDEV_COUNT_MAX 8
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#define UARTHARDWARE_MAX_PINS 4
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#ifndef UART_RX_BUFFER_SIZE
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#define UART_RX_BUFFER_SIZE 128
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#endif
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#ifndef UART_TX_BUFFER_SIZE
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#define UART_TX_BUFFER_SIZE 256
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#endif
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#elif defined(STM32H7)
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#define UARTDEV_COUNT_MAX 8
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#define UARTHARDWARE_MAX_PINS 5
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#ifndef UART_RX_BUFFER_SIZE
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#define UART_RX_BUFFER_SIZE 128
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#endif
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#ifndef UART_TX_BUFFER_SIZE
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#define UART_TX_BUFFER_SIZE 256
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#endif
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#else
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#error unknown MCU family
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#endif
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// Count number of configured UARTs
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#ifdef USE_UART1
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#define UARTDEV_COUNT_1 1
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#else
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#define UARTDEV_COUNT_1 0
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#endif
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#ifdef USE_UART2
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#define UARTDEV_COUNT_2 1
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#else
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#define UARTDEV_COUNT_2 0
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#endif
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#ifdef USE_UART3
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#define UARTDEV_COUNT_3 1
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#else
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#define UARTDEV_COUNT_3 0
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#endif
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#ifdef USE_UART4
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#define UARTDEV_COUNT_4 1
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#else
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#define UARTDEV_COUNT_4 0
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#endif
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#ifdef USE_UART5
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#define UARTDEV_COUNT_5 1
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#else
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#define UARTDEV_COUNT_5 0
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#endif
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#ifdef USE_UART6
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#define UARTDEV_COUNT_6 1
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#else
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#define UARTDEV_COUNT_6 0
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#endif
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#ifdef USE_UART7
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#define UARTDEV_COUNT_7 1
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#else
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#define UARTDEV_COUNT_7 0
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#endif
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#ifdef USE_UART8
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#define UARTDEV_COUNT_8 1
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#else
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#define UARTDEV_COUNT_8 0
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#endif
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#define UARTDEV_COUNT (UARTDEV_COUNT_1 + UARTDEV_COUNT_2 + UARTDEV_COUNT_3 + UARTDEV_COUNT_4 + UARTDEV_COUNT_5 + UARTDEV_COUNT_6 + UARTDEV_COUNT_7 + UARTDEV_COUNT_8)
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typedef struct uartPinDef_s {
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ioTag_t pin;
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#if defined(STM32F7) || defined(STM32H7)
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uint8_t af;
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#endif
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} uartPinDef_t;
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typedef struct uartHardware_s {
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UARTDevice_e device; // XXX Not required for full allocation
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USART_TypeDef* reg;
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#ifdef USE_DMA
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dmaResource_t *txDMAResource;
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dmaResource_t *rxDMAResource;
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// For H7, {tx|rx}DMAChannel are DMAMUX input index for peripherals (DMA_REQUEST_xxx); RM0433 Table 110.
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// For F4 and F7, these are 32-bit channel identifiers (DMA_CHANNEL_x).
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uint32_t txDMAChannel;
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uint32_t rxDMAChannel;
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#endif // USE_DMA
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uartPinDef_t rxPins[UARTHARDWARE_MAX_PINS];
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uartPinDef_t txPins[UARTHARDWARE_MAX_PINS];
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#if defined(STM32F7) || defined(STM32H7)
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uint32_t rcc_ahb1;
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rccPeriphTag_t rcc_apb2;
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rccPeriphTag_t rcc_apb1;
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#else
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rccPeriphTag_t rcc;
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#endif
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#if !defined(STM32F7)
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uint8_t af;
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#endif
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#if defined(STM32F7) || defined(STM32H7)
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uint8_t txIrq;
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uint8_t rxIrq;
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#else
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uint8_t irqn;
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#endif
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uint8_t txPriority;
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uint8_t rxPriority;
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volatile uint8_t *txBuffer;
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volatile uint8_t *rxBuffer;
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uint16_t txBufferSize;
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uint16_t rxBufferSize;
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} uartHardware_t;
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extern const uartHardware_t uartHardware[];
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// uartDevice_t is an actual device instance.
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// XXX Instances are allocated for uarts defined by USE_UARTx atm.
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typedef struct uartDevice_s {
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uartPort_t port;
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const uartHardware_t *hardware;
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uartPinDef_t rx;
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uartPinDef_t tx;
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volatile uint8_t *rxBuffer;
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volatile uint8_t *txBuffer;
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} uartDevice_t;
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extern uartDevice_t *uartDevmap[];
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extern const struct serialPortVTable uartVTable[];
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void uartTryStartTxDMA(uartPort_t *s);
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uartPort_t *serialUART(UARTDevice_e device, uint32_t baudRate, portMode_e mode, portOptions_e options);
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void uartIrqHandler(uartPort_t *s);
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void uartReconfigure(uartPort_t *uartPort);
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void uartConfigureDma(uartDevice_t *uartdev);
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void uartDmaIrqHandler(dmaChannelDescriptor_t* descriptor);
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#if defined(STM32F3) || defined(STM32F7) || defined(STM32H7)
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#define UART_REG_RXD(base) ((base)->RDR)
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#define UART_REG_TXD(base) ((base)->TDR)
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#elif defined(STM32F1) || defined(STM32F4)
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#define UART_REG_RXD(base) ((base)->DR)
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#define UART_REG_TXD(base) ((base)->DR)
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#endif
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#define UART_BUFFER(type, n, rxtx) type volatile uint8_t uart ## n ## rxtx ## xBuffer[UART_ ## rxtx ## X_BUFFER_SIZE]
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#define UART_BUFFERS_EXTERN(n) \
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UART_BUFFER(extern, n, R); \
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UART_BUFFER(extern, n, T); struct dummy_s
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#ifdef USE_UART1
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UART_BUFFERS_EXTERN(1);
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#endif
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#ifdef USE_UART2
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UART_BUFFERS_EXTERN(2);
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#endif
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#ifdef USE_UART3
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UART_BUFFERS_EXTERN(3);
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#endif
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#ifdef USE_UART4
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UART_BUFFERS_EXTERN(4);
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#endif
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#ifdef USE_UART5
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UART_BUFFERS_EXTERN(5);
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#endif
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#ifdef USE_UART6
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UART_BUFFERS_EXTERN(6);
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#endif
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#ifdef USE_UART7
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UART_BUFFERS_EXTERN(7);
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#endif
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#ifdef USE_UART8
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UART_BUFFERS_EXTERN(8);
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#endif
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#undef UART_BUFFERS_EXTERN
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