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Merge remote-tracking branch 'origin/next' into

kilrah/bl_eeprom_save_load

Conflicts:
	radio/src/bootloader/boot.cpp
This commit is contained in:
bsongis 2014-04-09 10:05:42 +02:00
commit ab7218e5cf
46 changed files with 1731 additions and 1284 deletions

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@ -363,3 +363,7 @@ Harald Wilczak
Michel Baily
John Grepps
Anthony Burbidge
Sherba Baine
Gordon Evans
Fred Figge

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@ -969,7 +969,7 @@ QString MainWindow::FindTaranisPath()
QString vName=QString::fromUtf16 ( (const ushort *) szVolumeName) ;
if (vName.contains("TARANIS")) {
eepromfile=drive.absolutePath();
eepromfile.append("/TARANIS.BIN");
eepromfile.append("/EEPROM.BIN");
if (QFile::exists(eepromfile)) {
pathcount++;
path=eepromfile;
@ -985,7 +985,7 @@ QString MainWindow::FindTaranisPath()
drives.append(entry->me_devname);
eepromfile=entry->me_mountdir;
eepromfile.append("/TARANIS.BIN");
eepromfile.append("/EEPROM.BIN");
#if !defined __APPLE__ && !defined WIN32
QString fstype=entry->me_type;
qDebug() << fstype;

File diff suppressed because it is too large Load diff

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@ -19,3 +19,4 @@
/BMP
/traces
/MODELS
/FIRMWARES

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@ -635,7 +635,7 @@ ifeq ($(PCB), TARANIS)
EXTRAINCDIRS += targets/taranis/STM32_USB-Host-Device_Lib_V2.1.0/Libraries/STM32_USB_OTG_Driver/inc targets/taranis/STM32_USB-Host-Device_Lib_V2.1.0/Libraries/STM32_USB_Device_Library/Core/inc
EXTRAINCDIRS += targets/taranis/STM32_USB-Host-Device_Lib_V2.1.0/Libraries/STM32_USB_Device_Library/Class/msc/inc targets/taranis/STM32_USB-Host-Device_Lib_V2.1.0/Libraries/STM32_USB_Device_Library/Class/hid/inc
BOARDSRC = targets/taranis/board_taranis.cpp
EXTRABOARDSRC += targets/taranis/lcd_driver.cpp targets/taranis/aspi.c targets/taranis/i2c.c targets/taranis/delays.c
EXTRABOARDSRC += targets/taranis/lcd_driver.cpp targets/taranis/flash_driver.cpp targets/taranis/aspi.c targets/taranis/i2c.c targets/taranis/delays.c
SRC += CoOS/kernel/core.c CoOS/kernel/hook.c CoOS/kernel/task.c CoOS/kernel/event.c CoOS/kernel/time.c CoOS/kernel/timer.c CoOS/kernel/flag.c CoOS/kernel/mutex.c CoOS/kernel/serviceReq.c CoOS/portable/GCC/port.c CoOS/portable/arch.c
SRC += targets/taranis/pwr_driver.c targets/taranis/usb_driver.c
EEPROMSRC = eeprom_common.cpp eeprom_rlc.cpp eeprom_conversions.cpp

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@ -162,6 +162,7 @@ SRC = ../targets/taranis/STM32F2xx_StdPeriph_Lib_V1.1.0/Libraries/CMSIS/Device/
CPPSRC = ../targets/taranis/lcd_driver.cpp \
../targets/taranis/keys_driver.cpp \
../targets/taranis/flash_driver.cpp \
../targets/taranis/diskio.cpp \
../targets/taranis/usbd_usr.cpp \
../targets/taranis/usbd_storage_msd.cpp \

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@ -53,10 +53,6 @@
#include <stdlib.h>
#include <string.h>
#if defined(PCBTARANIS)
#include "stm32f2xx_flash.h"
#endif
#include "board_taranis.h"
#include "../pwr.h"
#include "../lcd.h"
@ -67,7 +63,7 @@
#include "../translations/en.h"
#if defined(PCBTARANIS)
#define BOOTLOADER_TITLE " OpenTX Boot Loader v1.0"
#define BOOTLOADER_TITLE " Taranis BootLoader - v1.0"
#define BOOT_KEY_UP KEY_PLUS
#define BOOT_KEY_DOWN KEY_MINUS
#define BOOT_KEY_LEFT KEY_MENU
@ -76,16 +72,13 @@
#define BOOT_KEY_EXIT KEY_EXIT
#define DISPLAY_CHAR_WIDTH 35
#elif defined(PCBSKY9X)
#define BOOTLOADER_TITLE "Boot Loader - Sky9x"
#define BOOTLOADER_TITLE "Sky9x Boot Loader - v1.0"
#endif
#define BOOTLOADER_SIZE 0x8000
#if defined(PCBTARANIS)
#define FIRMWARE_ADDRESS 0x08000000
#elif defined(PCBSKY9X)
#define FIRMWARE_ADDRESS 0x00400000
#endif
const uint8_t bootloaderVersion[] __attribute__ ((section(".version"), used)) =
{
'B', 'O', 'O', 'T', '1', '0'
};
// states
enum BootLoaderStates {
@ -131,7 +124,6 @@ uint32_t Valid;
uint32_t FlashSize;
uint32_t FlashBlocked = 1;
uint32_t LockBits;
uint32_t Block_buffer[1024];
@ -186,112 +178,6 @@ void delay2ms()
}
#endif
#if defined(PCBTARANIS)
uint32_t isFirmwareStart(uint32_t *block)
{
if ((block[0] & 0xFFFC0000) != 0x20000000) {
return 0;
}
if ((block[1] & 0xFFF00000) != 0x08000000) {
return 0;
}
if ((block[2] & 0xFFF00000) != 0x08000000) {
return 0;
}
return 1;
}
#elif defined(PCBSKY9X)
uint32_t isFirmwareStart( uint32_t *block )
{
if ((block[0] & 0xFFFE3000) != 0x20000000 ) {
return 0;
}
if ((block[1] & 0xFFF80000) != 0x00400000) {
return 0;
}
if ((block[2] & 0xFFF80000) != 0x00400000) {
return 0;
}
return 1;
}
#endif
#if defined(PCBSKY9X)
uint32_t (*IAP_Function)(uint32_t, uint32_t);
uint32_t program( uint32_t *address, uint32_t *buffer ) // size is 256 bytes
{
uint32_t FlashSectorNum;
uint32_t flash_cmd = 0;
uint32_t i;
// uint32_t flash_status = 0;
// uint32_t EFCIndex = 0; // 0:EEFC0, 1: EEFC1
/* Initialize the function pointer (retrieve function address from NMI vector) */
if ((uint32_t) address == FIRMWARE_START+BOOTLOADER_SIZE) {
if (isFirmwareStart(buffer))
FlashBlocked = 0;
else
FlashBlocked = 1;
}
if (FlashBlocked) {
return 1;
}
// Always initialise this here, setting a default doesn't seem to work
IAP_Function = (uint32_t (*)(uint32_t, uint32_t)) *(( uint32_t *)0x00800008);
FlashSectorNum = (uint32_t) address;
FlashSectorNum >>= 8;// page size is 256 bytes
FlashSectorNum &= 2047;// max page number
/* Send data to the sector here */
for ( i = 0; i < 64; i += 1 )
{
*address++ = *buffer++;
}
/* build the command to send to EEFC */
flash_cmd = (0x5A << 24) | (FlashSectorNum << 8) | 0x03; //AT91C_MC_FCMD_EWP ;
__disable_irq();
/* Call the IAP function with appropriate command */
i = IAP_Function( 0, flash_cmd );
__enable_irq();
return i;
}
uint32_t readLockBits()
{
// Always initialise this here, setting a default doesn't seem to work
IAP_Function = (uint32_t (*)(uint32_t, uint32_t)) *(( uint32_t *)0x00800008);
uint32_t flash_cmd = (0x5A << 24) | 0x0A;//AT91C_MC_FCMD_GLB ;
__disable_irq();
(void) IAP_Function( 0, flash_cmd );
__enable_irq();
return EFC->EEFC_FRR;
}
void clearLockBits()
{
uint32_t i;
uint32_t flash_cmd = 0;
// Always initialise this here, setting a default doesn't seem to work
IAP_Function = (uint32_t (*)(uint32_t, uint32_t)) *(( uint32_t *)0x00800008);
for ( i = 0; i < 16; i += 1 )
{
flash_cmd = (0x5A << 24) | ((128*i) << 8) | 0x09; //AT91C_MC_FCMD_CLB ;
__disable_irq();
/* Call the IAP function with appropriate command */
(void) IAP_Function( 0, flash_cmd );
__enable_irq();
}
}
#endif
void interrupt10ms(void)
{
Tenms |= 1; // 10 mS has passed
@ -385,116 +271,6 @@ void hw_delay(uint16_t time)
// wait
}
}
//After reset, write is not allowed in the Flash control register (FLASH_CR) to protect the
//Flash memory against possible unwanted operations due, for example, to electric
//disturbances. The following sequence is used to unlock this register:
//1. Write KEY1 = 0x45670123 in the Flash key register (FLASH_KEYR)
//2. Write KEY2 = 0xCDEF89AB in the Flash key register (FLASH_KEYR)
//Any wrong sequence will return a bus error and lock up the FLASH_CR register until the
//next reset.
//The FLASH_CR register can be locked again by software by setting the LOCK bit in the
//FLASH_CR register.
void unlockFlash()
{
FLASH->KEYR = 0x45670123;
FLASH->KEYR = 0xCDEF89AB;
}
void waitFlashIdle()
{
while (FLASH->SR & FLASH_FLAG_BSY) {
wdt_reset();
}
}
#define SECTOR_MASK ((uint32_t)0xFFFFFF07)
void eraseSector(uint32_t sector)
{
waitFlashIdle();
FLASH->CR &= CR_PSIZE_MASK;
FLASH->CR |= FLASH_PSIZE_WORD;
FLASH->CR &= SECTOR_MASK;
FLASH->CR |= FLASH_CR_SER | (sector << 3);
FLASH->CR |= FLASH_CR_STRT;
/* Wait for operation to be completed */
waitFlashIdle();
/* if the erase operation is completed, disable the SER Bit */
FLASH->CR &= (~FLASH_CR_SER);
FLASH->CR &= SECTOR_MASK;
}
uint32_t program(uint32_t *address, uint32_t *buffer) // size is 256 bytes
{
uint32_t i;
if ((uint32_t) address == 0x08008000) {
if (isFirmwareStart(buffer)) {
FlashBlocked = 0;
}
else {
FlashBlocked = 1;
}
}
if (FlashBlocked) {
return 1;
}
if ((uint32_t) address == 0x08008000) {
eraseSector(2);
}
if ((uint32_t) address == 0x0800C000) {
eraseSector(3);
}
if ((uint32_t) address == 0x08010000) {
eraseSector(4);
}
if ((uint32_t) address == 0x08020000) {
eraseSector(5);
}
if ((uint32_t) address == 0x08040000) {
eraseSector(6);
}
if ((uint32_t) address == 0x08060000) {
eraseSector(7);
}
// Now program the 256 bytes
for (i = 0; i < 64; i += 1) {
/* Device voltage range supposed to be [2.7V to 3.6V], the operation will
be done by word */
// Wait for last operation to be completed
waitFlashIdle();
FLASH->CR &= CR_PSIZE_MASK;
FLASH->CR |= FLASH_PSIZE_WORD;
FLASH->CR |= FLASH_CR_PG;
*address = *buffer;
/* Wait for operation to be completed */
waitFlashIdle();
FLASH->CR &= (~FLASH_CR_PG);
/* Check the written value */
if (*address != *buffer) {
/* Flash content doesn't match SRAM content */
return 2;
}
/* Increment FLASH destination address */
address += 1;
buffer += 1;
}
return 0;
}
#endif
uint8_t *cpystr(uint8_t *dest, uint8_t *source)
@ -590,7 +366,7 @@ int menuFlashFile(uint32_t index, uint8_t event)
fr = openFirmwareFile(index);
fr = f_close(&FlashFile);
Valid = 1;
if (isFirmwareStart(Block_buffer) == 0) {
if (!isFirmwareStart(Block_buffer)) {
Valid = 2;
}
}
@ -772,14 +548,10 @@ int main()
}
#if defined(PCBSKY9X)
usbMassStorage();
lcd_putc( 0, 6*FH, 'F' );
lcd_putc( 6, 6*FH, '0' + FlashBlocked );
lcd_putc( 0, 7*FH, 'E' );
lcd_putc( 6, 7*FH, '0' + EepromBlocked );
#endif
}
if ((state == ST_FLASH_MENU) || (state == ST_RESTORE_MENU)) {
if (state == ST_FLASH_MENU || state == ST_RESTORE_MENU) {
sdInit();
state == ST_RESTORE_MENU ? memoryType = MEM_EEPROM : memoryType = MEM_FLASH;
state = ST_DIR_CHECK;
@ -918,18 +690,26 @@ int main()
if (state == ST_FLASHING) {
// Commit to flashing
uint32_t blockOffset = 0;
lcd_putsLeft(4*FH, "\032Loading...");
lcd_putsLeft(4*FH, "\032Writing...");
if (firmwareAddress == FIRMWARE_ADDRESS + BOOTLOADER_SIZE) {
if (!isFirmwareStart(Block_buffer)) {
state = ST_FLASH_DONE;
}
}
while (BlockCount) {
program((uint32_t *) firmwareAddress, &Block_buffer[blockOffset]); // size is 256 bytes
blockOffset += 64; // 32-bit words (256 bytes)
firmwareAddress += 256;
if (BlockCount > 256) {
BlockCount -= 256;
writeFlash((uint32_t *)firmwareAddress, &Block_buffer[blockOffset]);
blockOffset += FLASH_PAGESIZE/4; // 32-bit words
firmwareAddress += FLASH_PAGESIZE;
if (BlockCount > FLASH_PAGESIZE) {
BlockCount -= FLASH_PAGESIZE;
}
else {
BlockCount = 0;
}
}
firmwareWritten += 4; // 4K blocks
lcd_rect( 3, 6*FH+4, 204, 7);
@ -947,7 +727,7 @@ int main()
}
if (state == ST_FLASH_DONE) {
lcd_putsLeft(4*FH, "\024Loading Complete");
lcd_putsLeft(4*FH, "\024Writing Complete");
if (event == EVT_KEY_FIRST(BOOT_KEY_EXIT) || event == EVT_KEY_BREAK(BOOT_KEY_MENU)) {
state = ST_START;
vpos = 0;

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@ -494,7 +494,7 @@ void RlcFile::nextWriteStep()
}
if (s_write_err == ERR_FULL) {
s_global_warning = STR_EEPROMOVERFLOW;
POPUP_WARNING(STR_EEPROMOVERFLOW);
m_write_step = 0;
m_write_len = 0;
m_cur_rlc_len = 0;

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@ -685,6 +685,46 @@ inline bool isFilenameLower(bool isfile, const char * fn, const char * line)
return (!isfile && line[SD_SCREEN_FILE_LENGTH+1]) || (isfile==(bool)line[SD_SCREEN_FILE_LENGTH+1] && strcasecmp(fn, line) < 0);
}
#if defined(PCBTARANIS)
void flashBootloader(const char * filename)
{
FIL file;
f_open(&file, filename, FA_READ);
uint8_t buffer[1024];
UINT count;
lcd_clear();
lcd_putsLeft(4*FH, STR_WRITING);
lcd_rect(3, 6*FH+4, 204, 7);
static uint8_t unlocked = 0;
if (!unlocked) {
unlocked = 1;
unlockFlash();
}
for (int i=0; i<BOOTLOADER_SIZE; i+=1024) {
watchdogSetTimeout(100/*1s*/);
if (f_read(&file, buffer, 1024, &count) != FR_OK || count != 1024) {
POPUP_WARNING(STR_SDCARD_ERROR);
break;
}
if (i==0 && !isBootloaderStart((uint32_t *)buffer)) {
POPUP_WARNING(STR_INCOMPATIBLE);
break;
}
for (int j=0; j<1024; j+=FLASH_PAGESIZE) {
writeFlash(CONVERT_UINT_PTR(FIRMWARE_ADDRESS+i+j), (uint32_t *)(buffer+j));
lcd_hline(5, 6*FH+6, (200*i)/BOOTLOADER_SIZE, FORCE);
lcd_hline(5, 6*FH+7, (200*i)/BOOTLOADER_SIZE, FORCE);
lcd_hline(5, 6*FH+8, (200*i)/BOOTLOADER_SIZE, FORCE);
lcdRefresh();
}
}
f_close(&file);
}
#endif
void onSdManagerMenu(const char *result)
{
TCHAR lfn[_MAX_LFN + 1];
@ -694,7 +734,7 @@ void onSdManagerMenu(const char *result)
pushMenu(menuGeneralSdManagerInfo);
}
else if (result == STR_SD_FORMAT) {
POPUP_CONFIRMATION(PSTR("Confirm Format?"));
POPUP_CONFIRMATION(STR_CONFIRM_FORMAT);
}
else if (result == STR_DELETE_FILE) {
f_getcwd(lfn, _MAX_LFN);
@ -733,6 +773,19 @@ void onSdManagerMenu(const char *result)
memcpy(modelHeaders[g_eeGeneral.currModel].bitmap, g_model.header.bitmap, sizeof(g_model.header.bitmap));
eeDirty(EE_MODEL);
}
else if (result == STR_VIEW_TEXT) {
f_getcwd(lfn, _MAX_LFN);
strcat(lfn, "/");
strcat(lfn, reusableBuffer.sdmanager.lines[index]);
pushMenuTextView(lfn);
}
else if (result == STR_FLASH_BOOTLOADER) {
f_getcwd(lfn, _MAX_LFN);
strcat(lfn, "/");
strcat(lfn, reusableBuffer.sdmanager.lines[index]);
flashBootloader(lfn);
}
#endif
#if defined(LUA)
else if (result == STR_EXECUTE_FILE) {
f_getcwd(lfn, _MAX_LFN);
@ -740,13 +793,6 @@ void onSdManagerMenu(const char *result)
strcat(lfn, reusableBuffer.sdmanager.lines[index]);
luaExec(lfn);
}
#endif
else if (result == STR_VIEW_TEXT) {
f_getcwd(lfn, _MAX_LFN);
strcat(lfn, "/");
strcat(lfn, reusableBuffer.sdmanager.lines[index]);
pushMenuTextView(lfn);
}
#endif
}
@ -847,6 +893,7 @@ void menuGeneralSdManager(uint8_t _event)
else */ if (!strcasecmp(ext, SOUNDS_EXT)) {
MENU_ADD_ITEM(STR_PLAY_FILE);
}
#endif
#if defined(PCBTARANIS)
else if (!strcasecmp(ext, BITMAPS_EXT) && !READ_ONLY()) {
MENU_ADD_ITEM(STR_ASSIGN_BITMAP);
@ -854,12 +901,14 @@ void menuGeneralSdManager(uint8_t _event)
else if (!strcasecmp(ext, TEXT_EXT)) {
MENU_ADD_ITEM(STR_VIEW_TEXT);
}
else if (!strcasecmp(ext, FIRMWARE_EXT) && !READ_ONLY()) {
MENU_ADD_ITEM(STR_FLASH_BOOTLOADER);
}
#endif
#if defined(LUA)
else if (!strcasecmp(ext, SCRIPTS_EXT)) {
MENU_ADD_ITEM(STR_EXECUTE_FILE);
}
#endif
#endif
if (!READ_ONLY()) {
MENU_ADD_ITEM(STR_DELETE_FILE);

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@ -1036,7 +1036,6 @@ uint8_t s_warning_info_len;
// uint8_t s_warning_info_att not needed now
uint8_t s_warning_type;
uint8_t s_warning_result = 0;
const pm_char * s_global_warning = NULL;
#if defined(CPUARM)
int16_t s_warning_input_value;

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@ -342,8 +342,6 @@ extern uint8_t s_warning_info_len;
extern uint8_t s_warning_result;
extern uint8_t s_warning_type;
extern const pm_char * s_global_warning;
#define WARNING_LINE_X 16
#define WARNING_LINE_Y 3*FH
#if LCD_W >= 212

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@ -499,13 +499,8 @@ void menuMainView(uint8_t event)
uint8_t view_base = view & 0x0f;
#endif
uint8_t _event = event;
if (s_global_warning) {
event = 0;
}
switch(event) {
switch(event)
{
case EVT_ENTRY:
killEvents(KEY_EXIT);
killEvents(KEY_UP);
@ -637,16 +632,13 @@ void menuMainView(uint8_t event)
return;
case EVT_KEY_FIRST(KEY_EXIT):
if (s_global_warning) {
s_global_warning = NULL;
}
#if defined(GVARS) && !defined(PCBSTD)
else if (s_gvar_timer > 0) {
if (s_gvar_timer > 0) {
s_gvar_timer = 0;
}
#endif
#if !defined(PCBTARANIS)
else if (view == VIEW_TIMER2) {
if (view == VIEW_TIMER2) {
resetTimer(1);
}
#endif
@ -871,15 +863,8 @@ void menuMainView(uint8_t event)
}
#endif
if (s_global_warning) {
s_warning = s_global_warning;
displayWarning(_event);
if (!s_warning) s_global_warning = NULL;
s_warning = NULL;
}
#if defined(GVARS) && !defined(PCBSTD)
else if (s_gvar_timer > 0) {
if (s_gvar_timer > 0) {
s_gvar_timer--;
#if LCD_W >= 212
lcd_filled_rect(BITMAP_X, BITMAP_Y, 64, 32, SOLID, ERASE);

View file

@ -383,6 +383,21 @@ void menuTelemetryFrsky(uint8_t event)
lcd_outdezNAtt(LCD_W, y, TELEMETRY_CELL_VOLTAGE(k), attr, 4);
y += 1*FH;
}
#if defined(PCBTARANIS)
if (frskyData.hub.cellsCount > 6) {
y = 1*FH;
for (uint8_t k=6; k<frskyData.hub.cellsCount && k<12; k++) {
#if defined(GAUGES)
uint8_t attr = (barsThresholds[THLD_CELL] && frskyData.hub.cellVolts[k] < barsThresholds[THLD_CELL]) ? BLINK|PREC2 : PREC2;
#else
uint8_t attr = PREC2;
#endif
lcd_outdezNAtt(LCD_W-3*FW-2, y, TELEMETRY_CELL_VOLTAGE(k), attr, 4);
y += 1*FH;
}
lcd_vline(LCD_W-6*FW-4, 8, 47);
} else
#endif
lcd_vline(LCD_W-3*FW-2, 8, 47);
}
#endif

View file

@ -1011,7 +1011,7 @@ void putsSwitches(xcoord_t x, uint8_t y, int8_t idx, LcdFlags att)
if (idx == SWSRC_OFF)
return lcd_putsiAtt(x, y, STR_OFFON, 0, att);
if (idx < 0) {
lcd_vlineStip(x-2, y, 8, 0x5E/*'!'*/);
lcd_putcAtt(x-2, y, '!', att);
idx = -idx;
}
lcd_putsiAtt(x, y, STR_VSWITCHES, idx-1, att);
@ -1021,7 +1021,7 @@ void putsSwitches(xcoord_t x, uint8_t y, int8_t idx, LcdFlags att)
void putsFlightPhase(xcoord_t x, uint8_t y, int8_t idx, LcdFlags att)
{
if (idx==0) { lcd_putsiAtt(x, y, STR_MMMINV, 0, att); return; }
if (idx < 0) { lcd_vlineStip(x-2, y, 8, 0x5E/*'!'*/); idx = -idx; }
if (idx < 0) { lcd_putcAtt(x-2, y, '!', att); idx = -idx; }
if (att & CONDENSED)
lcd_outdezNAtt(x+FW*1, y, idx-1, (att & ~CONDENSED), 1);
else
@ -1243,7 +1243,6 @@ void putsTelemetryChannel(xcoord_t x, uint8_t y, uint8_t channel, lcdint_t val,
case TELEM_ACCy-1:
case TELEM_ACCz-1:
case TELEM_VSPD-1:
case TELEM_ASPD-1:
putsTelemetryValue(x, y, val, UNIT_RAW, att|PREC2);
break;

View file

@ -142,7 +142,7 @@ const pm_char * openLogs()
f_puts(TELEMETRY_GPS_SPEED_UNIT, &g_oLogFile);
f_puts("),GPS Alt,Baro Alt(", &g_oLogFile);
f_puts(TELEMETRY_BARO_ALT_UNIT, &g_oLogFile);
f_puts("),Vertical Speed,Temp1,Temp2,RPM,Fuel,Cell volts,Cell 1,Cell 2,Cell 3,Cell 4,Cell 5,Cell 6,Current,Consumption,Vfas,AccelX,AccelY,AccelZ,", &g_oLogFile);
f_puts("),Vertical Speed,Temp1,Temp2,RPM,Fuel," TELEMETRY_CELLS_LABEL "Current,Consumption,Vfas,AccelX,AccelY,AccelZ,", &g_oLogFile);
}
#endif
@ -197,7 +197,7 @@ void writeLogs()
if (result != NULL) {
if (result != error_displayed) {
error_displayed = result;
s_global_warning = result;
POPUP_WARNING(result);
}
return;
}
@ -294,7 +294,7 @@ void writeLogs()
if (result<0 && !error_displayed) {
error_displayed = STR_SDCARD_ERROR;
s_global_warning = STR_SDCARD_ERROR;
POPUP_WARNING(STR_SDCARD_ERROR);
}
}
}

View file

@ -240,13 +240,15 @@
#if !defined(NOINLINE)
#define NOINLINE
#endif
#define CONVERT_PTR(x) ((uint32_t)(uint64_t)(x))
#define CONVERT_PTR_UINT(x) ((uint32_t)(uint64_t)(x))
#define CONVERT_UINT_PTR(x) ((uint32_t*)(uint64_t)(x))
char *convertSimuPath(const char *path);
#else
#define FORCEINLINE inline __attribute__ ((always_inline))
#define NOINLINE __attribute__ ((noinline))
#define SIMU_SLEEP(x)
#define CONVERT_PTR(x) ((uint32_t)(x))
#define CONVERT_PTR_UINT(x) ((uint32_t)(x))
#define CONVERT_UINT_PTR(x) ((uint32_t *)(x))
#define convertSimuPath(x) (x)
#endif

View file

@ -56,6 +56,7 @@
#define BITMAPS_EXT ".bmp"
#define SCRIPTS_EXT ".lua"
#define TEXT_EXT ".txt"
#define FIRMWARE_EXT ".bin"
extern FATFS g_FATFS_Obj;

View file

@ -672,5 +672,8 @@ void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState New
void RCC_LSEConfig(uint8_t RCC_LSE) { }
FlagStatus RCC_GetFlagStatus(uint8_t RCC_FLAG) { return RESET; }
ErrorStatus RTC_WaitForSynchro(void) { return SUCCESS; }
void unlockFlash() { }
void writeFlash(uint32_t *address, uint32_t *buffer) { SIMU_SLEEP(100); }
uint32_t isBootloaderStart(uint32_t *block) { return 1; }
#endif

View file

@ -111,7 +111,7 @@ extern "C" void DAC_IRQHandler()
{
AudioBuffer *nextBuffer = audioQueue.getNextFilledBuffer();
if (nextBuffer) {
DACC->DACC_TNPR = CONVERT_PTR(nextBuffer->data);
DACC->DACC_TNPR = CONVERT_PTR_UINT(nextBuffer->data);
DACC->DACC_TNCR = nextBuffer->size/2;
}
else {

View file

@ -43,6 +43,10 @@
extern uint16_t ResetReason;
#define BOOTLOADER_SIZE 0x8000
#define FIRMWARE_SIZE (256*1024)
#define FIRMWARE_ADDRESS 0x00400000
#if defined(REVA)
#define GPIO_BUTTON_MENU PIOB->PIO_PDSR
#define GPIO_BUTTON_EXIT PIOA->PIO_PDSR
@ -153,6 +157,10 @@ extern uint16_t sessionTimer;
void setSticksGain(uint8_t gains);
// Write Flash driver
#define FLASH_PAGESIZE 256
void writeFlash(uint32_t * address, uint32_t * buffer);
// Keys driver
extern uint32_t readKeys();
extern uint32_t readTrims();

View file

@ -0,0 +1,71 @@
#include "../../opentx.h"
uint32_t (*IAP_Function)(uint32_t, uint32_t);
void writeFlash(uint32_t *address, uint32_t *buffer) // size is 256 bytes
{
uint32_t FlashSectorNum;
uint32_t flash_cmd = 0;
// Always initialise this here, setting a default doesn't seem to work
IAP_Function = (uint32_t (*)(uint32_t, uint32_t)) *(( uint32_t *)0x00800008);
FlashSectorNum = (uint32_t) address;
FlashSectorNum >>= 8;// page size is 256 bytes
FlashSectorNum &= 2047;// max page number
/* Send data to the sector here */
for (int i=0; i<FLASH_PAGESIZE/4; i++) {
*address++ = *buffer++;
}
/* build the command to send to EEFC */
flash_cmd = (0x5A << 24) | (FlashSectorNum << 8) | 0x03; //AT91C_MC_FCMD_EWP ;
__disable_irq();
/* Call the IAP function with appropriate command */
i = IAP_Function(0, flash_cmd);
__enable_irq();
}
uint32_t readLockBits()
{
// Always initialise this here, setting a default doesn't seem to work
IAP_Function = (uint32_t (*)(uint32_t, uint32_t)) *(( uint32_t *)0x00800008);
uint32_t flash_cmd = (0x5A << 24) | 0x0A;//AT91C_MC_FCMD_GLB ;
__disable_irq();
(void) IAP_Function( 0, flash_cmd );
__enable_irq();
return EFC->EEFC_FRR;
}
void clearLockBits()
{
uint32_t i;
uint32_t flash_cmd = 0;
// Always initialise this here, setting a default doesn't seem to work
IAP_Function = (uint32_t (*)(uint32_t, uint32_t)) *(( uint32_t *)0x00800008);
for ( i = 0; i < 16; i += 1 )
{
flash_cmd = (0x5A << 24) | ((128*i) << 8) | 0x09; //AT91C_MC_FCMD_CLB ;
__disable_irq();
/* Call the IAP function with appropriate command */
(void) IAP_Function( 0, flash_cmd );
__enable_irq();
}
}
uint32_t isFirmwareStart(uint32_t *block)
{
if ((block[0] & 0xFFFE3000) != 0x20000000 ) {
return 0;
}
if ((block[1] & 0xFFF80000) != 0x00400000) {
return 0;
}
if ((block[2] & 0xFFF80000) != 0x00400000) {
return 0;
}
return 1;
}

View file

@ -167,7 +167,7 @@ extern "C" void PWM_IRQHandler(void)
else {
// Kick off serial output here
sscptr = SSC;
sscptr->SSC_TPR = CONVERT_PTR(pxxStream[0]);
sscptr->SSC_TPR = CONVERT_PTR_UINT(pxxStream[0]);
sscptr->SSC_TCR = (uint8_t *)pxxStreamPtr[0] - (uint8_t *)pxxStream[0];
sscptr->SSC_PTCR = SSC_PTCR_TXTEN; // Start transfers
}
@ -191,7 +191,7 @@ extern "C" void PWM_IRQHandler(void)
else {
// Kick off serial output here
sscptr = SSC;
sscptr->SSC_TPR = CONVERT_PTR(dsm2Stream);
sscptr->SSC_TPR = CONVERT_PTR_UINT(dsm2Stream);
sscptr->SSC_TCR = (uint8_t *)dsm2StreamPtr - (uint8_t *)dsm2Stream;
sscptr->SSC_PTCR = SSC_PTCR_TXTEN; // Start transfers
}

View file

@ -97,6 +97,7 @@ static int8_t SCSI_ReadFormatCapacity(uint8_t lun, uint8_t *params);
static int8_t SCSI_ReadCapacity10(uint8_t lun, uint8_t *params);
static int8_t SCSI_RequestSense (uint8_t lun, uint8_t *params);
static int8_t SCSI_StartStopUnit(uint8_t lun, uint8_t *params);
static int8_t SCSI_AllowRemoval(uint8_t lun, uint8_t *params);
static int8_t SCSI_ModeSense6 (uint8_t lun, uint8_t *params);
static int8_t SCSI_ModeSense10 (uint8_t lun, uint8_t *params);
static int8_t SCSI_Write10(uint8_t lun , uint8_t *params);
@ -146,7 +147,7 @@ int8_t SCSI_ProcessCmd(USB_OTG_CORE_HANDLE *pdev,
return SCSI_StartStopUnit(lun, params);
case SCSI_ALLOW_MEDIUM_REMOVAL:
return SCSI_StartStopUnit(lun, params);
return SCSI_AllowRemoval( lun, params);
case SCSI_MODE_SENSE6:
return SCSI_ModeSense6 (lun, params);
@ -453,6 +454,12 @@ static int8_t SCSI_StartStopUnit(uint8_t lun, uint8_t *params)
return 0;
}
static int8_t SCSI_AllowRemoval(uint8_t lun, uint8_t *params)
{
MSC_BOT_DataLen = 0;
return 0;
}
/**
* @brief SCSI_Read10
* Process Read10 command

View file

@ -99,8 +99,8 @@ void adcInit()
ADC->CCR = 0 ; //ADC_CCR_ADCPRE_0 ; // Clock div 2
DMA2_Stream0->CR = DMA_SxCR_PL | DMA_SxCR_MSIZE_0 | DMA_SxCR_PSIZE_0 | DMA_SxCR_MINC ;
DMA2_Stream0->PAR = CONVERT_PTR(&ADC1->DR);
DMA2_Stream0->M0AR = CONVERT_PTR(Analog_values);
DMA2_Stream0->PAR = CONVERT_PTR_UINT(&ADC1->DR);
DMA2_Stream0->M0AR = CONVERT_PTR_UINT(Analog_values);
DMA2_Stream0->FCR = DMA_SxFCR_DMDIS | DMA_SxFCR_FTH_0 ;
}
@ -111,7 +111,7 @@ void adcRead()
DMA2_Stream0->CR &= ~DMA_SxCR_EN ; // Disable DMA
ADC1->SR &= ~(uint32_t) ( ADC_SR_EOC | ADC_SR_STRT | ADC_SR_OVR ) ;
DMA2->LIFCR = DMA_LIFCR_CTCIF0 | DMA_LIFCR_CHTIF0 |DMA_LIFCR_CTEIF0 | DMA_LIFCR_CDMEIF0 | DMA_LIFCR_CFEIF0 ; // Write ones to clear bits
DMA2_Stream0->M0AR = CONVERT_PTR(Analog_values);
DMA2_Stream0->M0AR = CONVERT_PTR_UINT(Analog_values);
DMA2_Stream0->NDTR = NUMBER_ANALOG ;
DMA2_Stream0->CR |= DMA_SxCR_EN ; // Enable DMA
ADC1->CR2 |= (uint32_t)ADC_CR2_SWSTART ;

View file

@ -78,8 +78,8 @@ void dacInit()
DMA1->HIFCR = DMA_HIFCR_CTCIF5 | DMA_HIFCR_CHTIF5 | DMA_HIFCR_CTEIF5 | DMA_HIFCR_CDMEIF5 | DMA_HIFCR_CFEIF5 ; // Write ones to clear bits
DMA1_Stream5->CR = DMA_SxCR_CHSEL_0 | DMA_SxCR_CHSEL_1 | DMA_SxCR_CHSEL_2 | DMA_SxCR_PL_0 |
DMA_SxCR_MSIZE_0 | DMA_SxCR_PSIZE_0 | DMA_SxCR_MINC | DMA_SxCR_DIR_0 | DMA_SxCR_CIRC ;
DMA1_Stream5->PAR = CONVERT_PTR(&DAC->DHR12R1);
// DMA1_Stream5->M0AR = CONVERT_PTR(Sine_values);
DMA1_Stream5->PAR = CONVERT_PTR_UINT(&DAC->DHR12R1);
// DMA1_Stream5->M0AR = CONVERT_PTR_UINT(Sine_values);
DMA1_Stream5->FCR = 0x05 ; //DMA_SxFCR_DMDIS | DMA_SxFCR_FTH_0 ;
// DMA1_Stream5->NDTR = 100 ;
@ -99,7 +99,7 @@ bool dacQueue(AudioBuffer *buffer)
dacIdle = 0;
DMA1_Stream5->CR &= ~DMA_SxCR_EN ; // Disable DMA channel
DMA1->HIFCR = DMA_HIFCR_CTCIF5 | DMA_HIFCR_CHTIF5 | DMA_HIFCR_CTEIF5 | DMA_HIFCR_CDMEIF5 | DMA_HIFCR_CFEIF5 ; // Write ones to clear bits
DMA1_Stream5->M0AR = CONVERT_PTR(buffer->data);
DMA1_Stream5->M0AR = CONVERT_PTR_UINT(buffer->data);
DMA1_Stream5->NDTR = buffer->size;
DMA1_Stream5->CR |= DMA_SxCR_EN | DMA_SxCR_TCIE ; // Enable DMA channel and interrupt
DAC->SR = DAC_SR_DMAUDR1 ; // Write 1 to clear flag
@ -156,7 +156,7 @@ extern "C" void DMA1_Stream5_IRQHandler()
AudioBuffer *nextBuffer = audioQueue.getNextFilledBuffer();
if (nextBuffer) {
DMA1_Stream5->M0AR = CONVERT_PTR(nextBuffer->data);
DMA1_Stream5->M0AR = CONVERT_PTR_UINT(nextBuffer->data);
DMA1_Stream5->NDTR = nextBuffer->size;
DMA1->HIFCR = DMA_HIFCR_CTCIF5 | DMA_HIFCR_CHTIF5 | DMA_HIFCR_CTEIF5 | DMA_HIFCR_CDMEIF5 | DMA_HIFCR_CFEIF5 ; // Write ones to clear bits
DMA1_Stream5->CR |= DMA_SxCR_EN | DMA_SxCR_TCIE ; // Enable DMA channel

View file

@ -51,6 +51,7 @@ extern "C" {
#include "STM32F2xx_StdPeriph_Lib_V1.1.0/Libraries/STM32F2xx_StdPeriph_Driver/inc/stm32f2xx_dma.h"
#include "STM32F2xx_StdPeriph_Lib_V1.1.0/Libraries/STM32F2xx_StdPeriph_Driver/inc/stm32f2xx_usart.h"
#include "STM32F2xx_StdPeriph_Lib_V1.1.0/Libraries/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h"
#if !defined(SIMU)
#include "STM32_USB-Host-Device_Lib_V2.1.0/Libraries/STM32_USB_Device_Library/Class/msc/inc/usbd_msc_core.h"
#include "STM32_USB-Host-Device_Lib_V2.1.0/Libraries/STM32_USB_Device_Library/Class/hid/inc/usbd_hid_core.h"
@ -72,6 +73,10 @@ extern "C" {
#include "audio_driver.h"
#endif
#define FLASHSIZE 0x80000
#define BOOTLOADER_SIZE 0x8000
#define FIRMWARE_ADDRESS 0x08000000
#define PERI1_FREQUENCY 30000000
#define PERI2_FREQUENCY 60000000
#define TIMER_MULT_APB1 2
@ -136,6 +141,13 @@ void delay_01us(uint16_t nb);
#define SD_CARD_PRESENT() (~SD_PRESENT_GPIO->IDR & SD_PRESENT_GPIO_Pin)
#endif
// Flash Write driver
#define FLASH_PAGESIZE 256
void unlockFlash();
void writeFlash(uint32_t * address, uint32_t * buffer);
uint32_t isFirmwareStart(uint32_t *block);
uint32_t isBootloaderStart(uint32_t *block);
// Pulses driver
void init_no_pulses(uint32_t port);
void disable_no_pulses(uint32_t port);

View file

@ -0,0 +1,123 @@
#include "../../opentx.h"
#include "stm32f2xx_flash.h"
//After reset, write is not allowed in the Flash control register (FLASH_CR) to protect the
//Flash memory against possible unwanted operations due, for example, to electric
//disturbances. The following sequence is used to unlock this register:
//1. Write KEY1 = 0x45670123 in the Flash key register (FLASH_KEYR)
//2. Write KEY2 = 0xCDEF89AB in the Flash key register (FLASH_KEYR)
//Any wrong sequence will return a bus error and lock up the FLASH_CR register until the
//next reset.
//The FLASH_CR register can be locked again by software by setting the LOCK bit in the
//FLASH_CR register.
void unlockFlash()
{
FLASH->KEYR = 0x45670123;
FLASH->KEYR = 0xCDEF89AB;
}
void waitFlashIdle()
{
while (FLASH->SR & FLASH_FLAG_BSY) {
wdt_reset();
}
}
#define SECTOR_MASK ((uint32_t)0xFFFFFF07)
void eraseSector(uint32_t sector)
{
waitFlashIdle();
FLASH->CR &= CR_PSIZE_MASK;
FLASH->CR |= FLASH_PSIZE_WORD;
FLASH->CR &= SECTOR_MASK;
FLASH->CR |= FLASH_CR_SER | (sector << 3);
FLASH->CR |= FLASH_CR_STRT;
/* Wait for operation to be completed */
waitFlashIdle();
/* if the erase operation is completed, disable the SER Bit */
FLASH->CR &= (~FLASH_CR_SER);
FLASH->CR &= SECTOR_MASK;
}
void writeFlash(uint32_t *address, uint32_t *buffer) // page size is 256 bytes
{
if ((uint32_t) address == 0x08000000) {
eraseSector(0);
}
else if ((uint32_t) address == 0x08004000) {
eraseSector(1);
}
else if ((uint32_t) address == 0x08008000) {
eraseSector(2);
}
else if ((uint32_t) address == 0x0800C000) {
eraseSector(3);
}
else if ((uint32_t) address == 0x08010000) {
eraseSector(4);
}
else if ((uint32_t) address == 0x08020000) {
eraseSector(5);
}
else if ((uint32_t) address == 0x08040000) {
eraseSector(6);
}
else if ((uint32_t) address == 0x08060000) {
eraseSector(7);
}
for (uint32_t i=0; i<FLASH_PAGESIZE/4; i++) {
/* Device voltage range supposed to be [2.7V to 3.6V], the operation will
be done by word */
// Wait for last operation to be completed
waitFlashIdle();
FLASH->CR &= CR_PSIZE_MASK;
FLASH->CR |= FLASH_PSIZE_WORD;
FLASH->CR |= FLASH_CR_PG;
*address = *buffer;
/* Wait for operation to be completed */
waitFlashIdle();
FLASH->CR &= (~FLASH_CR_PG);
/* Check the written value */
if (*address != *buffer) {
/* Flash content doesn't match SRAM content */
return;
}
/* Increment FLASH destination address */
address += 1;
buffer += 1;
}
}
uint32_t isFirmwareStart(uint32_t *block)
{
if ((block[0] & 0xFFFC0000) != 0x20000000) {
return 0;
}
if ((block[1] & 0xFFF00000) != 0x08000000) {
return 0;
}
if ((block[2] & 0xFFF00000) != 0x08000000) {
return 0;
}
return 1;
}
uint32_t isBootloaderStart(uint32_t *block)
{
for (int i=0; i<256; i++) {
if (block[i] == 0x544F4F42/*BOOT*/) {
return 1;
}
}
return 0;
}

View file

@ -259,8 +259,8 @@ static void init_pa10_pxx()
DMA2->HIFCR = DMA_HIFCR_CTCIF6 | DMA_HIFCR_CHTIF6 | DMA_HIFCR_CTEIF6 | DMA_HIFCR_CDMEIF6 | DMA_HIFCR_CFEIF6 ; // Write ones to clear bits
DMA2_Stream6->CR = DMA_SxCR_CHSEL_1 | DMA_SxCR_CHSEL_2 | DMA_SxCR_PL_0 | DMA_SxCR_MSIZE_0
| DMA_SxCR_PSIZE_0 | DMA_SxCR_MINC | DMA_SxCR_DIR_0 | DMA_SxCR_PFCTRL ;
DMA2_Stream6->PAR = CONVERT_PTR(&TIM1->DMAR);
DMA2_Stream6->M0AR = CONVERT_PTR(&pxxStream[INTERNAL_MODULE][1]);
DMA2_Stream6->PAR = CONVERT_PTR_UINT(&TIM1->DMAR);
DMA2_Stream6->M0AR = CONVERT_PTR_UINT(&pxxStream[INTERNAL_MODULE][1]);
// DMA2_Stream2->FCR = 0x05 ; //DMA_SxFCR_DMDIS | DMA_SxFCR_FTH_0 ;
// DMA2_Stream2->NDTR = 100 ;
DMA2_Stream6->CR |= DMA_SxCR_EN ; // Enable DMA
@ -344,7 +344,7 @@ extern "C" void TIM1_CC_IRQHandler()
if (s_current_protocol[INTERNAL_MODULE] == PROTO_PXX) {
DMA2_Stream6->CR &= ~DMA_SxCR_EN ; // Disable DMA
DMA2->HIFCR = DMA_HIFCR_CTCIF6 | DMA_HIFCR_CHTIF6 | DMA_HIFCR_CTEIF6 | DMA_HIFCR_CDMEIF6 | DMA_HIFCR_CFEIF6 ; // Write ones to clear bits
DMA2_Stream6->M0AR = CONVERT_PTR(&pxxStream[INTERNAL_MODULE][1]);
DMA2_Stream6->M0AR = CONVERT_PTR_UINT(&pxxStream[INTERNAL_MODULE][1]);
DMA2_Stream6->CR |= DMA_SxCR_EN ; // Enable DMA
TIM1->CCR3 = pxxStream[INTERNAL_MODULE][0];
TIM1->DIER |= TIM_DIER_CC2IE ; // Enable this interrupt
@ -422,8 +422,8 @@ static void init_pa7_pxx()
DMA2->LIFCR = DMA_LIFCR_CTCIF2 | DMA_LIFCR_CHTIF2 | DMA_LIFCR_CTEIF2 | DMA_LIFCR_CDMEIF2 | DMA_LIFCR_CFEIF2 ; // Write ones to clear bits
DMA2_Stream2->CR = DMA_SxCR_CHSEL_0 | DMA_SxCR_CHSEL_1 | DMA_SxCR_CHSEL_2 | DMA_SxCR_PL_0 | DMA_SxCR_MSIZE_0
| DMA_SxCR_PSIZE_0 | DMA_SxCR_MINC | DMA_SxCR_DIR_0 | DMA_SxCR_PFCTRL ;
DMA2_Stream2->PAR = CONVERT_PTR(&TIM8->DMAR);
DMA2_Stream2->M0AR = CONVERT_PTR(&pxxStream[EXTERNAL_MODULE][1]);
DMA2_Stream2->PAR = CONVERT_PTR_UINT(&TIM8->DMAR);
DMA2_Stream2->M0AR = CONVERT_PTR_UINT(&pxxStream[EXTERNAL_MODULE][1]);
// DMA2_Stream2->FCR = 0x05 ; //DMA_SxFCR_DMDIS | DMA_SxFCR_FTH_0 ;
// DMA2_Stream2->NDTR = 100 ;
DMA2_Stream2->CR |= DMA_SxCR_EN ; // Enable DMA
@ -496,8 +496,8 @@ static void init_pa7_dsm2()
DMA2->LIFCR = DMA_LIFCR_CTCIF2 | DMA_LIFCR_CHTIF2 | DMA_LIFCR_CTEIF2 | DMA_LIFCR_CDMEIF2 | DMA_LIFCR_CFEIF2 ; // Write ones to clear bits
DMA2_Stream2->CR = DMA_SxCR_CHSEL_0 | DMA_SxCR_CHSEL_1 | DMA_SxCR_CHSEL_2 | DMA_SxCR_PL_0 | DMA_SxCR_MSIZE_0
| DMA_SxCR_PSIZE_0 | DMA_SxCR_MINC | DMA_SxCR_DIR_0 | DMA_SxCR_PFCTRL ;
DMA2_Stream2->PAR = CONVERT_PTR(&TIM8->DMAR);
DMA2_Stream2->M0AR = CONVERT_PTR(&dsm2Stream[1]);
DMA2_Stream2->PAR = CONVERT_PTR_UINT(&TIM8->DMAR);
DMA2_Stream2->M0AR = CONVERT_PTR_UINT(&dsm2Stream[1]);
// DMA2_Stream2->FCR = 0x05 ; //DMA_SxFCR_DMDIS | DMA_SxFCR_FTH_0 ;
// DMA2_Stream2->NDTR = 100 ;
DMA2_Stream2->CR |= DMA_SxCR_EN ; // Enable DMA
@ -586,7 +586,7 @@ extern "C" void TIM8_CC_IRQHandler()
if (s_current_protocol[EXTERNAL_MODULE] == PROTO_PXX) {
DMA2_Stream2->CR &= ~DMA_SxCR_EN ; // Disable DMA
DMA2->LIFCR = DMA_LIFCR_CTCIF2 | DMA_LIFCR_CHTIF2 | DMA_LIFCR_CTEIF2 | DMA_LIFCR_CDMEIF2 | DMA_LIFCR_CFEIF2 ; // Write ones to clear bits
DMA2_Stream2->M0AR = CONVERT_PTR(&pxxStream[EXTERNAL_MODULE][1]);
DMA2_Stream2->M0AR = CONVERT_PTR_UINT(&pxxStream[EXTERNAL_MODULE][1]);
DMA2_Stream2->CR |= DMA_SxCR_EN ; // Enable DMA
TIM8->CCR1 = pxxStream[EXTERNAL_MODULE][0];
TIM8->DIER |= TIM_DIER_CC2IE ; // Enable this interrupt
@ -595,7 +595,7 @@ extern "C" void TIM8_CC_IRQHandler()
else if (s_current_protocol[EXTERNAL_MODULE] >= PROTO_DSM2_LP45 && s_current_protocol[EXTERNAL_MODULE] <= PROTO_DSM2_DSMX) {
DMA2_Stream2->CR &= ~DMA_SxCR_EN ; // Disable DMA
DMA2->LIFCR = DMA_LIFCR_CTCIF2 | DMA_LIFCR_CHTIF2 | DMA_LIFCR_CTEIF2 | DMA_LIFCR_CDMEIF2 | DMA_LIFCR_CFEIF2 ; // Write ones to clear bits
DMA2_Stream2->M0AR = CONVERT_PTR(&dsm2Stream[1]);
DMA2_Stream2->M0AR = CONVERT_PTR_UINT(&dsm2Stream[1]);
DMA2_Stream2->CR |= DMA_SxCR_EN ; // Enable DMA
TIM8->CCR1 = dsm2Stream[0];
TIM8->DIER |= TIM_DIER_CC2IE ; // Enable this interrupt

View file

@ -44,6 +44,8 @@ SECTIONS
{
. = ALIGN(4);
KEEP(*(.isr_vector)) /* Startup code */
*(.version)
. = ALIGN(4); /* Align the start of the text part */
*(.text) /* .text sections (code) */
*(.text*) /* .text* sections (code) */
*(.rodata) /* .rodata sections (constants, strings, etc.) */

View file

@ -139,7 +139,7 @@ int8_t STORAGE_GetCapacity (uint8_t lun, uint32_t *block_num, uint32_t *block_si
{
if (lun == 1) {
*block_size = BLOCKSIZE;
*block_num = EESIZE/BLOCKSIZE + 3 ;
*block_num = 3 + EESIZE/BLOCKSIZE + FLASHSIZE/BLOCKSIZE;
}
else {
if (!SD_CARD_PRESENT())
@ -282,12 +282,12 @@ const char g_FATboot[BLOCKSIZE] =
0xeb, 0x3c, 0x90, // Jump instruction.
0x39, 0x58, 0x20, 0x54, 0x45, 0x41, 0x4D, 0x00, // OEM Name
0x00, 0x02, // Bytes per sector
0x01, // Sectors per FS cluster.
0x08, // Sectors per FS cluster.
0x01, 0x00, // Reserved sector count
0x01, // Number of FATs
0x10, 0x00, // Number of root directory entries
(EESIZE/BLOCKSIZE)+3, 0x00, // Total sectors = 131
3+(EESIZE/BLOCKSIZE), (FLASHSIZE/BLOCKSIZE)>>8, // Total sectors
0xf8, // Media descriptor
0x01, 0x00, // Sectors per FAT table
0x20, 0x00, // Sectors per track
@ -339,7 +339,7 @@ const char g_FATboot[BLOCKSIZE] =
const char g_FAT[BLOCKSIZE] =
{
0xF8, 0xFF, 0xFF, 0x03, 0x40, 0x00, 0x05, 0x60, 0x00, 0x07, 0x80, 0x00, 0x09, 0xA0, 0x00, 0x0B,
0xC0, 0x00, 0x0D, 0xE0, 0x00, 0x0F, 0x00, 0x01, 0x11, 0x20, 0x01, 0x13, 0x40, 0x01, 0x15, 0x60,
0xC0, 0x00, 0x0D, 0xE0, 0x00, 0x0F, 0x00, 0x01, 0x11, 0xF0, 0xFF, 0x13, 0x40, 0x01, 0x15, 0x60,
0x01, 0x17, 0x80, 0x01, 0x19, 0xA0, 0x01, 0x1B, 0xC0, 0x01, 0x1D, 0xE0, 0x01, 0x1F, 0x00, 0x02,
0x21, 0x20, 0x02, 0x23, 0x40, 0x02, 0x25, 0x60, 0x02, 0x27, 0x80, 0x02, 0x29, 0xA0, 0x02, 0x2B,
0xC0, 0x02, 0x2D, 0xE0, 0x02, 0x2F, 0x00, 0x03, 0x31, 0x20, 0x03, 0x33, 0x40, 0x03, 0x35, 0x60,
@ -350,7 +350,8 @@ const char g_FAT[BLOCKSIZE] =
0x61, 0x20, 0x06, 0x63, 0x40, 0x06, 0x65, 0x60, 0x06, 0x67, 0x80, 0x06, 0x69, 0xA0, 0x06, 0x6B,
0xC0, 0x06, 0x6D, 0xE0, 0x06, 0x6F, 0x00, 0x07, 0x71, 0x20, 0x07, 0x73, 0x40, 0x07, 0x75, 0x60,
0x07, 0x77, 0x80, 0x07, 0x79, 0xA0, 0x07, 0x7B, 0xC0, 0x07, 0x7D, 0xE0, 0x07, 0x7F, 0x00, 0x08,
0x81, 0xF0, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x81, 0x20, 0x08, 0x83, 0x40, 0x08, 0x85, 0x60, 0x08, 0x87, 0x80, 0x08, 0x89, 0xA0, 0x08, 0x8B,
0xC0, 0x08, 0x8D, 0xE0, 0x08, 0x8F, 0x00, 0x09, 0x91, 0xF0, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
@ -373,13 +374,19 @@ const char g_FAT[BLOCKSIZE] =
#else
const char g_FAT[BLOCKSIZE] =
{
0xF8, 0xFF, 0xFF, 0x03, 0x40, 0x00, 0x05, 0x60, 0x00, 0x07, 0x80, 0x00, 0x09, 0xA0, 0x00, 0x0B,
0xF8, 0xFF, 0xFF, 0x03, 0x40, 0x00, 0x05, 0x60, 0x00, 0x07, 0x80, 0x00, 0x09, 0xF0, 0xFF, 0x0B,
0xC0, 0x00, 0x0D, 0xE0, 0x00, 0x0F, 0x00, 0x01, 0x11, 0x20, 0x01, 0x13, 0x40, 0x01, 0x15, 0x60,
0x01, 0x17, 0x80, 0x01, 0x19, 0xA0, 0x01, 0x1B, 0xC0, 0x01, 0x1D, 0xE0, 0x01, 0x1F, 0x00, 0x02,
0x21, 0x20, 0x02, 0x23, 0x40, 0x02, 0x25, 0x60, 0x02, 0x27, 0x80, 0x02, 0x29, 0xA0, 0x02, 0x2B,
0xC0, 0x02, 0x2D, 0xE0, 0x02, 0x2F, 0x00, 0x03, 0x31, 0x20, 0x03, 0x33, 0x40, 0x03, 0x35, 0x60,
0x03, 0x37, 0x80, 0x03, 0x39, 0xA0, 0x03, 0x3B, 0xC0, 0x03, 0x3D, 0xE0, 0x03, 0x3F, 0x00, 0x04,
0x41, 0xF0, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x41, 0x20, 0x04, 0x43, 0x40, 0x04, 0x45, 0x60, 0x04, 0x47, 0x80, 0x04, 0x49, 0xA0, 0x04, 0x4B,
0xC0, 0x04, 0x4D, 0xE0, 0x04, 0x4F, 0x00, 0x05, 0x51, 0x20, 0x05, 0x53, 0x40, 0x05, 0x55, 0x60,
0x05, 0x57, 0x80, 0x05, 0x59, 0xA0, 0x05, 0x5B, 0xC0, 0x05, 0x5D, 0xE0, 0x05, 0x5F, 0x00, 0x06,
0x61, 0x20, 0x06, 0x63, 0x40, 0x06, 0x65, 0x60, 0x06, 0x67, 0x80, 0x06, 0x69, 0xA0, 0x06, 0x6B,
0xC0, 0x06, 0x6D, 0xE0, 0x06, 0x6F, 0x00, 0x07, 0x71, 0x20, 0x07, 0x73, 0x40, 0x07, 0x75, 0x60,
0x07, 0x77, 0x80, 0x07, 0x79, 0xA0, 0x07, 0x7B, 0xC0, 0x07, 0x7D, 0xE0, 0x07, 0x7F, 0x00, 0x08,
0x81, 0x20, 0x08, 0x83, 0x40, 0x08, 0x85, 0x60, 0x08, 0x87, 0x80, 0x08, 0x89, 0xF0, 0xFF, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
@ -399,12 +406,6 @@ const char g_FAT[BLOCKSIZE] =
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
};
#endif
@ -454,7 +455,7 @@ const FATDirEntry_t g_DIRroot[16] =
0x00000000
},
{
{ 'T', 'A', 'R', 'A', 'N', 'I', 'S', ' '},
{ 'E', 'E', 'P', 'R', 'O', 'M', ' ', ' '},
{ 'B', 'I', 'N'},
0x24, // Archive, hidden, system
0x00,
@ -469,19 +470,19 @@ const FATDirEntry_t g_DIRroot[16] =
EESIZE
},
{
{ '\x00', ' ', ' ', ' ', ' ', ' ', ' ', ' '},
{ ' ', ' ', ' '},
0x00,
0x00,
{ 'F', 'I', 'R', 'M', 'W', 'A', 'R', 'E'},
{ 'B', 'I', 'N'},
0x24, // Archive, hidden, system
0x00,
0x3E,
0xA301,
0x3D55,
0x3D55,
0x0000,
0x0000,
0x0000,
0x0000,
0x0000,
0x0000,
0x0000,
0x00000000
0xA302,
0x3D55,
0x0002 + (EESIZE/BLOCKSIZE)/8,
FLASHSIZE
},
{
{ '\x00', ' ', ' ', ' ', ' ', ' ', ' ', ' '},
@ -695,24 +696,33 @@ int32_t fat12Read( uint8_t *buffer, uint16_t sector, uint16_t count )
else if (sector == 2) {
memcpy(buffer, g_DIRroot, BLOCKSIZE ) ;
}
else {
else if (sector < 3 + (EESIZE/BLOCKSIZE)) {
eeprom_read_block (buffer, (sector-3)*BLOCKSIZE, BLOCKSIZE);
}
else if (sector < 3 + (EESIZE/BLOCKSIZE) + (FLASHSIZE/BLOCKSIZE)) {
uint32_t address;
address = sector - 3 - (EESIZE/BLOCKSIZE);
address *= BLOCKSIZE;
address += FIRMWARE_ADDRESS;
memcpy(buffer, (uint8_t *)address, BLOCKSIZE);
}
buffer += BLOCKSIZE ;
sector++ ;
count-- ;
}
return 0 ;
}
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
int32_t fat12Write(const uint8_t *buffer, uint16_t sector, uint32_t count )
{
static int offset = 0;
TRACE("FAT12 Write(sector=%d, count=%d)", sector, count);
if (sector < 3) {
// reserved, read-only
}
else if (sector < 3 + (EESIZE/BLOCKSIZE)) {
while (count) {
const EeFs * test = (const EeFs *)buffer;
if (offset == 0 && test->version==EEFS_VERS && test->mySize==sizeof(eeFs) && test->bs==BS) {
@ -730,9 +740,26 @@ int32_t fat12Write(const uint8_t *buffer, uint16_t sector, uint32_t count )
offset = 0;
}
}
}
else if (sector < 3 + (EESIZE/BLOCKSIZE) + (FLASHSIZE/BLOCKSIZE)) {
// firmware
uint32_t address;
address = sector - 3 - (EESIZE/BLOCKSIZE);
address *= BLOCKSIZE;
address += FIRMWARE_ADDRESS;
while (count) {
for (uint32_t i=0; i<BLOCKSIZE/FLASH_PAGESIZE; i++) {
if (address >= FIRMWARE_ADDRESS+BOOTLOADER_SIZE/*protect bootloader*/ && address <= FIRMWARE_ADDRESS+FLASHSIZE-FLASH_PAGESIZE) {
writeFlash((uint32_t *)address, (uint32_t *)buffer);
}
address += FLASH_PAGESIZE;
buffer += FLASH_PAGESIZE;
}
count--;
}
}
return 0 ;
}
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

View file

@ -248,8 +248,15 @@ void resetTelemetry();
#define TELEMETRY_GPS_SPEED_UNIT (IS_IMPERIAL_ENABLE() ? SPEED_UNIT_IMP : SPEED_UNIT_METR)
#define TELEMETRY_GPS_SPEED_FORMAT "%d,"
#define TELEMETRY_GPS_SPEED_ARGS getConvertedTelemetryValue(frskyData.hub.gpsSpeed_bp, UNIT_KTS),
#define TELEMETRY_CELLS_FORMAT "%d.%d,%d.%02d,%d.%02d,%d.%02d,%d.%02d,%d.%02d,%d.%02d,"
#if defined(CPUARM)
#define TELEMETRY_CELLS_ARGS frskyData.hub.cellsSum / 10, frskyData.hub.cellsSum % 10, frskyData.hub.cellVolts[0]*2/100, frskyData.hub.cellVolts[0]*2%100, frskyData.hub.cellVolts[1]*2/100, frskyData.hub.cellVolts[1]*2%100, frskyData.hub.cellVolts[2]*2/100, frskyData.hub.cellVolts[2]*2%100, frskyData.hub.cellVolts[3]*2/100, frskyData.hub.cellVolts[3]*2%100, frskyData.hub.cellVolts[4]*2/100, frskyData.hub.cellVolts[4]*2%100, frskyData.hub.cellVolts[5]*2/100, frskyData.hub.cellVolts[5]*2%100, frskyData.hub.cellVolts[6]*2/100, frskyData.hub.cellVolts[6]*2%100, frskyData.hub.cellVolts[7]*2/100, frskyData.hub.cellVolts[7]*2%100, frskyData.hub.cellVolts[8]*2/100, frskyData.hub.cellVolts[8]*2%100, frskyData.hub.cellVolts[9]*2/100, frskyData.hub.cellVolts[9]*2%100, frskyData.hub.cellVolts[10]*2/100, frskyData.hub.cellVolts[10]*2%100, frskyData.hub.cellVolts[11]*2/100, frskyData.hub.cellVolts[11]*2%100,
#define TELEMETRY_CELLS_FORMAT "%d.%d,%d.%02d,%d.%02d,%d.%02d,%d.%02d,%d.%02d,%d.%02d,%d.%02d,%d.%02d,%d.%02d,%d.%02d,%d.%02d,%d.%02d,"
#define TELEMETRY_CELLS_LABEL "Cell volts,Cell 1,Cell 2,Cell 3,Cell 4,Cell 5,Cell 6,Cell 7,Cell 8,Cell 9,Cell 10,Cell 11,Cell 12,"
#else
#define TELEMETRY_CELLS_ARGS frskyData.hub.cellsSum / 10, frskyData.hub.cellsSum % 10, frskyData.hub.cellVolts[0]*2/100, frskyData.hub.cellVolts[0]*2%100, frskyData.hub.cellVolts[1]*2/100, frskyData.hub.cellVolts[1]*2%100, frskyData.hub.cellVolts[2]*2/100, frskyData.hub.cellVolts[2]*2%100, frskyData.hub.cellVolts[3]*2/100, frskyData.hub.cellVolts[3]*2%100, frskyData.hub.cellVolts[4]*2/100, frskyData.hub.cellVolts[4]*2%100, frskyData.hub.cellVolts[5]*2/100, frskyData.hub.cellVolts[5]*2%100,
#define TELEMETRY_CELLS_FORMAT "%d.%d,%d.%02d,%d.%02d,%d.%02d,%d.%02d,%d.%02d,%d.%02d,"
#define TELEMETRY_CELLS_LABEL "Cell volts,Cell 1,Cell 2,Cell 3,Cell 4,Cell 5,Cell 6,"
#endif
#define TELEMETRY_CURRENT_FORMAT "%d.%02d,"
#define TELEMETRY_CURRENT_ARGS frskyData.hub.current / 100, frskyData.hub.current % 100,
#define TELEMETRY_VFAS_FORMAT "%d.%d,"

View file

@ -677,7 +677,7 @@ void telemetryWakeup()
if (alarmsCheckStep == 0) {
if ((IS_MODULE_XJT(0) || IS_MODULE_XJT(1)) && frskyData.swr.value > 0x33) {
AUDIO_SWR_RED();
s_global_warning = STR_ANTENNAPROBLEM;
POPUP_WARNING(STR_ANTENNAPROBLEM);
alarmsCheckTime = get_tmr10ms() + 300; /* next check in 3seconds */
}
}

View file

@ -207,8 +207,15 @@ void resetTelemetry();
#define TELEMETRY_GPS_SPEED_UNIT (IS_IMPERIAL_ENABLE() ? SPEED_UNIT_IMP : SPEED_UNIT_METR)
#define TELEMETRY_GPS_SPEED_FORMAT "%d,"
#define TELEMETRY_GPS_SPEED_ARGS getConvertedTelemetryValue(frskyData.hub.gpsSpeed_bp, UNIT_KTS),
#define TELEMETRY_CELLS_FORMAT "%d.%d,%d.%02d,%d.%02d,%d.%02d,%d.%02d,%d.%02d,%d.%02d,"
#if defined(CPUARM)
#define TELEMETRY_CELLS_ARGS frskyData.hub.cellsSum / 10, frskyData.hub.cellsSum % 10, TELEMETRY_CELL_VOLTAGE(0)/100, TELEMETRY_CELL_VOLTAGE(0)%100, TELEMETRY_CELL_VOLTAGE(1)/100, TELEMETRY_CELL_VOLTAGE(1)%100, TELEMETRY_CELL_VOLTAGE(2)/100, TELEMETRY_CELL_VOLTAGE(2)%100, TELEMETRY_CELL_VOLTAGE(3)/100, TELEMETRY_CELL_VOLTAGE(3)%100, TELEMETRY_CELL_VOLTAGE(4)/100, TELEMETRY_CELL_VOLTAGE(4)%100, TELEMETRY_CELL_VOLTAGE(5)/100, TELEMETRY_CELL_VOLTAGE(5)%100, TELEMETRY_CELL_VOLTAGE(6)/100, TELEMETRY_CELL_VOLTAGE(6)%100, TELEMETRY_CELL_VOLTAGE(7)/100, TELEMETRY_CELL_VOLTAGE(7)%100, TELEMETRY_CELL_VOLTAGE(8)/100, TELEMETRY_CELL_VOLTAGE(8)%100, TELEMETRY_CELL_VOLTAGE(9)/100, TELEMETRY_CELL_VOLTAGE(9)%100, TELEMETRY_CELL_VOLTAGE(10)/100, TELEMETRY_CELL_VOLTAGE(10)%100, TELEMETRY_CELL_VOLTAGE(11)/100, TELEMETRY_CELL_VOLTAGE(11)%100,
#define TELEMETRY_CELLS_FORMAT "%d.%d,%d.%02d,%d.%02d,%d.%02d,%d.%02d,%d.%02d,%d.%02d,%d.%02d,%d.%02d,%d.%02d,%d.%02d,%d.%02d,%d.%02d,"
#define TELEMETRY_CELLS_LABEL "Cell volts,Cell 1,Cell 2,Cell 3,Cell 4,Cell 5,Cell 6,Cell 7,Cell 8,Cell 9,Cell 10,Cell 11,Cell 12,"
#else
#define TELEMETRY_CELLS_ARGS frskyData.hub.cellsSum / 10, frskyData.hub.cellsSum % 10, TELEMETRY_CELL_VOLTAGE(0)/100, TELEMETRY_CELL_VOLTAGE(0)%100, TELEMETRY_CELL_VOLTAGE(1)/100, TELEMETRY_CELL_VOLTAGE(1)%100, TELEMETRY_CELL_VOLTAGE(2)/100, TELEMETRY_CELL_VOLTAGE(2)%100, TELEMETRY_CELL_VOLTAGE(3)/100, TELEMETRY_CELL_VOLTAGE(3)%100, TELEMETRY_CELL_VOLTAGE(4)/100, TELEMETRY_CELL_VOLTAGE(4)%100, TELEMETRY_CELL_VOLTAGE(5)/100, TELEMETRY_CELL_VOLTAGE(5)%100,
#define TELEMETRY_CELLS_FORMAT "%d.%d,%d.%02d,%d.%02d,%d.%02d,%d.%02d,%d.%02d,%d.%02d,"
#define TELEMETRY_CELLS_LABEL "Cell volts,Cell 1,Cell 2,Cell 3,Cell 4,Cell 5,Cell 6,"
#endif
#define TELEMETRY_CURRENT_FORMAT "%d.%d,"
#define TELEMETRY_CURRENT_ARGS frskyData.hub.current / 10, frskyData.hub.current % 10,
#define TELEMETRY_VFAS_FORMAT "%d.%d,"

View file

@ -465,6 +465,9 @@ const pm_char STR_DATE[] PROGMEM = TR_DATE;
const pm_char STR_CHANNELS_MONITOR[] PROGMEM = TR_CHANNELS_MONITOR;
const pm_char STR_PATH_TOO_LONG[] PROGMEM = TR_PATH_TOO_LONG;
const pm_char STR_VIEW_TEXT[] PROGMEM = TR_VIEW_TEXT;
const pm_char STR_FLASH_BOOTLOADER[] PROGMEM = TR_FLASH_BOOTLOADER;
const pm_char STR_WRITING[] PROGMEM = TR_WRITING;
const pm_char STR_CONFIRM_FORMAT[] PROGMEM = TR_CONFIRM_FORMAT;
#if LCD_W >= 212
const pm_char STR_MODELNAME[] PROGMEM = TR_MODELNAME;

View file

@ -616,6 +616,9 @@ extern const pm_char STR_DATE[];
extern const pm_char STR_CHANNELS_MONITOR[];
extern const pm_char STR_PATH_TOO_LONG[];
extern const pm_char STR_VIEW_TEXT[];
extern const pm_char STR_FLASH_BOOTLOADER[];
extern const pm_char STR_WRITING[];
extern const pm_char STR_CONFIRM_FORMAT[];
#if defined(VOICE) && defined(CPUARM)
struct LanguagePack {

View file

@ -712,6 +712,9 @@
#define TR_CHANNELS_MONITOR "MONITOR KANÁLU"
#define TR_PATH_TOO_LONG "Cesta je moc dlouhá"
#define TR_VIEW_TEXT "Zobrazit text"
#define TR_FLASH_BOOTLOADER "Flash BootLoader"
#define TR_WRITING "\032Writing..."
#define TR_CONFIRM_FORMAT "Confirm Format?"
#define TR_INTERNALRF "Vnitřní RF modul"
#define TR_EXTERNALRF "Externí RF modul"
#define TR_FAILSAFE "Mód Failsafe"

View file

@ -712,6 +712,9 @@
#define TR_CHANNELS_MONITOR "Kanal Monitor"
#define TR_PATH_TOO_LONG "Path too long"
#define TR_VIEW_TEXT "View text"
#define TR_FLASH_BOOTLOADER "Flash BootLoader"
#define TR_WRITING "\032Writing..."
#define TR_CONFIRM_FORMAT "Confirm Format?"
#define TR_INTERNALRF "----Internes HF Modul----------"
#define TR_EXTERNALRF "----Externes HF Modul----------"
#define TR_FAILSAFE "Failsafe Mode"

View file

@ -716,6 +716,9 @@
#define TR_CHANNELS_MONITOR "CHANNEL MONITOR"
#define TR_PATH_TOO_LONG "Path too long"
#define TR_VIEW_TEXT "View text"
#define TR_FLASH_BOOTLOADER "Flash BootLoader"
#define TR_WRITING "\032Writing..."
#define TR_CONFIRM_FORMAT "Confirm Format?"
#define TR_INTERNALRF "Internal RF"
#define TR_EXTERNALRF "External RF"
#define TR_FAILSAFE INDENT "Failsafe mode"

View file

@ -712,6 +712,9 @@
#define TR_CHANNELS_MONITOR "MONITOR CANALES"
#define TR_PATH_TOO_LONG "Path too long"
#define TR_VIEW_TEXT "View text"
#define TR_FLASH_BOOTLOADER "Flash BootLoader"
#define TR_WRITING "\032Writing..."
#define TR_CONFIRM_FORMAT "Confirm Format?"
#define TR_INTERNALRF "Interna RF"
#define TR_EXTERNALRF "Externa RF"
#define TR_FAILSAFE INDENT"Modo sgdad."

View file

@ -712,6 +712,9 @@
#define TR_CHANNELS_MONITOR "CHANNEL MONITOR"
#define TR_PATH_TOO_LONG "Path too long"
#define TR_VIEW_TEXT "View text"
#define TR_FLASH_BOOTLOADER "Flash BootLoader"
#define TR_WRITING "\032Writing..."
#define TR_CONFIRM_FORMAT "Confirm Format?"
#define TR_INTERNALRF "Internal RF"
#define TR_EXTERNALRF "External RF"
#define TR_FAILSAFE INDENT "Failsafe mode"

View file

@ -712,6 +712,9 @@
#define TR_CHANNELS_MONITOR "MONITEUR CANAUX"
#define TR_PATH_TOO_LONG "Chemin trop long"
#define TR_VIEW_TEXT "Voir texte"
#define TR_FLASH_BOOTLOADER "Flash BootLoader"
#define TR_WRITING "\032Writing..."
#define TR_CONFIRM_FORMAT "Confirm Format?"
#define TR_INTERNALRF "HF interne"
#define TR_EXTERNALRF "HF externe"
#define TR_FAILSAFE INDENT "Type failsafe"

View file

@ -712,6 +712,9 @@
#define TR_CHANNELS_MONITOR "CHANNELS MONITOR"
#define TR_PATH_TOO_LONG "Path too long"
#define TR_VIEW_TEXT "View text"
#define TR_FLASH_BOOTLOADER "Flash BootLoader"
#define TR_WRITING "\032Writing..."
#define TR_CONFIRM_FORMAT "Confirm Format?"
#define TR_INTERNALRF "Modulo Interno"
#define TR_EXTERNALRF "Modulo esterno"
#define TR_FAILSAFE "Modo failsafe"

View file

@ -72,7 +72,7 @@
#define TR_UART3MODES "Wyłącz\0 ""S-Port Mirror\0 ""Debug\0 "
#define LEN_POTTYPES "\017"
#define TR_POTTYPES "None\0 ""Potencjometr\0 ""Przeł.Wielopoz."
#define TR_POTTYPES "Brak\0 ""Potencjometr\0 ""Przeł.Wielopoz."
#define LEN_DATETIME "\006"
#define TR_DATETIME "DATA:\0""CZAS:\0"
@ -99,7 +99,7 @@
#define TR_VBEEPCOUNTDOWN "Cichy\0 ""Pikanie""Dźwięki"
#define LEN_CURVE_TYPES "\010"
#define TR_CURVE_TYPES "Standard""Custom\0"
#define TR_CURVE_TYPES "Standard""Własny\0"
#define LEN_RETA123 "\001"
@ -246,7 +246,7 @@
#define TR_CFN_TEST
#endif
#define TR_CFN_RESERVE "[reserve]\0 "
#define TR_CFN_RESERVE "[rezerwa]\0 "
#if defined(CPUARM)
#define TR_VFSWFUNC "Bezp.\0 ""Trener \0 ""Inst-Trim ""Reset ""Set \0 " TR_ADJUST_GVAR "Głośność\0 " TR_CFN_RESERVE TR_CFN_RESERVE TR_CFN_RESERVE TR_SOUND TR_PLAY_TRACK TR_PLAY_VALUE TR_CFN_RESERVE TR_CFN_RESERVE TR_CFN_RESERVE TR_CFN_BG_MUSIC TR_VVARIO TR_HAPTIC TR_SDCLOGS "Podświetl. " TR_CFN_TEST
@ -650,8 +650,8 @@
#define TR_BACKUP_MODEL "Zbackupuj model"
#define TR_DELETE_MODEL "Skasuj model"
#define TR_RESTORE_MODEL "Odtwórz model"
#define TR_SDCARD_ERROR "Błąd SD karty"
#define TR_NO_SDCARD "Brak SD karta"
#define TR_SDCARD_ERROR "Błąd karty SD"
#define TR_NO_SDCARD "Brak karty SD"
#define TR_INCOMPATIBLE "Niekompatybilne"
#define TR_WARNING "UWAGA"
#define TR_EEPROMWARN "EEPROM"
@ -712,6 +712,9 @@
#define TR_CHANNELS_MONITOR "MONITOR KANAŁÓW"
#define TR_PATH_TOO_LONG "Ścieżka za długa"
#define TR_VIEW_TEXT "Pokaż tekst"
#define TR_FLASH_BOOTLOADER "Flash BootLoader"
#define TR_WRITING "\032Writing..."
#define TR_CONFIRM_FORMAT "Confirm Format?"
#define TR_INTERNALRF "Wewnętrzny moduł RF"
#define TR_EXTERNALRF "Zewnętrzny moduł RF"
#define TR_FAILSAFE "Tryb Failsafe"
@ -723,7 +726,7 @@
#define TR_INSERT_BEFORE "Wstaw przed"
#define TR_INSERT_AFTER "Wstaw za"
#define TR_COPY "Kopiuj"
#define TR_MOVE "Przemieść"
#define TR_MOVE "Przenieś"
#define TR_PASTE "Wklej"
#define TR_DELETE "Kasuj"
#define TR_INSERT "Wstaw"

View file

@ -712,6 +712,9 @@
#define TR_CHANNELS_MONITOR "CHANNELS MONITOR"
#define TR_PATH_TOO_LONG "Path too long"
#define TR_VIEW_TEXT "View text"
#define TR_FLASH_BOOTLOADER "Flash BootLoader"
#define TR_WRITING "\032Writing..."
#define TR_CONFIRM_FORMAT "Confirm Format?"
#define TR_INTERNALRF "Internal RF"
#define TR_EXTERNALRF "External RF"
#define TR_FAILSAFE "Failsafe mode"

View file

@ -712,6 +712,9 @@
#define TR_CHANNELS_MONITOR "Kanalöversikt"
#define TR_PATH_TOO_LONG "För lång sökväg"
#define TR_VIEW_TEXT "Visa Text"
#define TR_FLASH_BOOTLOADER "Flash BootLoader"
#define TR_WRITING "\032Writing..."
#define TR_CONFIRM_FORMAT "Confirm Format?"
#define TR_INTERNALRF "Intern Radio"
#define TR_EXTERNALRF "Extern Radiomodul"
#define TR_FAILSAFE "Failsafeläge"

50
radio/util/fat12.py Executable file
View file

@ -0,0 +1,50 @@
#!/bin/env python
curr = 0
idx = 0
byte = 0
def push4bits(val):
global curr, idx, byte
val = val & 0x0f
curr += val << idx
idx += 4
if idx == 8:
print "0x%02X," % curr,
idx = 0
curr = 0
byte += 1
if byte % 16 == 0:
print
cluster = 0
def pushCluster(val):
global cluster
push4bits(val)
push4bits(val >> 4)
push4bits(val >> 8)
cluster += 1
def pushFile(size):
sectors = size / 512
count = sectors / 8
for i in range(count-1):
pushCluster(cluster+1)
pushCluster(0xFFF)
def pushDisk(eeprom, flash):
global curr, idx, byte, cluster
curr = idx = byte = cluster = 0
print "Disk with %dk EEPROM and %dk FLASH:" % (eeprom, flash)
pushCluster(0xFF8)
pushCluster(0xFFF)
pushFile(eeprom*1024)
pushFile(flash*1024)
while byte < 512:
push4bits(0)
print
pushDisk(32, 512)
pushDisk(64, 512)