Mirror/inav
1
0
Fork 0
mirror of https://github.com/iNavFlight/inav.git synced 2025-07-23 08:15:26 +03:00
Code Issues Wiki Activity

[SPI] Lazy SPI init; Per-device SPI settings; Allow SDCARD/SPIFLASH bus sharing (init time)

Browse source
This commit is contained in:
Konstantin Sharlaimov (DigitalEntity) 2019-04-10 23:08:58 +02:00
parent 547858a800
commit 1873c20e74
34 changed files with 88 additions and 180 deletions
Download patch file Download diff file Expand all files Collapse all files

4
src/main/drivers/bus.c
View file

@ -90,7 +90,9 @@ static bool busDevInit_SPI(busDevice_t * dev, const busDeviceDescriptor_t * desc
dev->irqPin = IOGetByTag(descriptor->irqPin);
dev->busdev.spi.spiBus = descriptor->busdev.spi.spiBus;
dev->busdev.spi.csnPin = IOGetByTag(descriptor->busdev.spi.csnPin);
if (dev->busdev.spi.csnPin) {
if (dev->busdev.spi.csnPin && spiBusInitHost(dev)) {
// Init CSN pin
IOInit(dev->busdev.spi.csnPin, owner, RESOURCE_SPI_CS, 0);
IOConfigGPIO(dev->busdev.spi.csnPin, SPI_IO_CS_CFG);
IOHi(dev->busdev.spi.csnPin);

1
src/main/drivers/bus.h
View file

@ -269,6 +269,7 @@ bool i2cBusWriteRegister(const busDevice_t * dev, uint8_t reg, uint8_t data);
bool i2cBusReadBuffer(const busDevice_t * dev, uint8_t reg, uint8_t * data, uint8_t length);
bool i2cBusReadRegister(const busDevice_t * dev, uint8_t reg, uint8_t * data);
bool spiBusInitHost(const busDevice_t * dev);
bool spiBusIsBusy(const busDevice_t * dev);
void spiBusSetSpeed(const busDevice_t * dev, busSpeed_e speed);
bool spiBusTransfer(const busDevice_t * dev, uint8_t * rxBuf, const uint8_t * txBuf, int length);

6
src/main/drivers/bus_busdev_spi.c
View file

@ -29,6 +29,12 @@
#include "drivers/bus_spi.h"
#include "drivers/time.h"
bool spiBusInitHost(const busDevice_t * dev)
{
const bool spiLeadingEdge = (dev->flags & DEVFLAGS_SPI_MODE_0);
return spiInitDevice(dev->busdev.spi.spiBus, spiLeadingEdge);
}
void spiBusSelectDevice(const busDevice_t * dev)
{
IOLo(dev->busdev.spi.csnPin);

106
src/main/drivers/bus_spi.c
View file

@ -72,22 +72,6 @@
#define SPI3_NSS_PIN NONE
#endif
#ifdef SPI1_CLOCK_LEADING_EDGE
# define SPI1_LEADING_EDGE true
#else
# define SPI1_LEADING_EDGE false
#endif
#ifdef SPI2_CLOCK_LEADING_EDGE
# define SPI2_LEADING_EDGE true
#else
# define SPI2_LEADING_EDGE false
#endif
#ifdef SPI3_CLOCK_LEADING_EDGE
# define SPI3_LEADING_EDGE true
#else
# define SPI3_LEADING_EDGE false
#endif
#if defined(STM32F3)
static const uint16_t spiDivisorMapFast[] = {
SPI_BaudRatePrescaler_256, // SPI_CLOCK_INITIALIZATON 281.25 KBits/s
@ -106,9 +90,22 @@ static const uint16_t spiDivisorMapSlow[] = {
};
static spiDevice_t spiHardwareMap[] = {
{ .dev = SPI1, .nss = IO_TAG(SPI1_NSS_PIN), .sck = IO_TAG(SPI1_SCK_PIN), .miso = IO_TAG(SPI1_MISO_PIN), .mosi = IO_TAG(SPI1_MOSI_PIN), .rcc = RCC_APB2(SPI1), .af = GPIO_AF_SPI1, .leadingEdge = SPI1_LEADING_EDGE, .divisorMap = spiDivisorMapFast },
{ .dev = SPI2, .nss = IO_TAG(SPI2_NSS_PIN), .sck = IO_TAG(SPI2_SCK_PIN), .miso = IO_TAG(SPI2_MISO_PIN), .mosi = IO_TAG(SPI2_MOSI_PIN), .rcc = RCC_APB1(SPI2), .af = GPIO_AF_SPI2, .leadingEdge = SPI2_LEADING_EDGE, .divisorMap = spiDivisorMapSlow },
{ .dev = SPI3, .nss = IO_TAG(SPI3_NSS_PIN), .sck = IO_TAG(SPI3_SCK_PIN), .miso = IO_TAG(SPI3_MISO_PIN), .mosi = IO_TAG(SPI3_MOSI_PIN), .rcc = RCC_APB1(SPI3), .af = GPIO_AF_SPI3, .leadingEdge = SPI3_LEADING_EDGE, .divisorMap = spiDivisorMapSlow }
#ifdef USE_SPI_DEVICE_1
{ .dev = SPI1, .nss = IO_TAG(SPI1_NSS_PIN), .sck = IO_TAG(SPI1_SCK_PIN), .miso = IO_TAG(SPI1_MISO_PIN), .mosi = IO_TAG(SPI1_MOSI_PIN), .rcc = RCC_APB2(SPI1), .af = GPIO_AF_SPI1, .divisorMap = spiDivisorMapFast },
#else
{ .dev = NULL }, // No SPI1
#endif
#ifdef USE_SPI_DEVICE_2
{ .dev = SPI2, .nss = IO_TAG(SPI2_NSS_PIN), .sck = IO_TAG(SPI2_SCK_PIN), .miso = IO_TAG(SPI2_MISO_PIN), .mosi = IO_TAG(SPI2_MOSI_PIN), .rcc = RCC_APB1(SPI2), .af = GPIO_AF_SPI2, .divisorMap = spiDivisorMapSlow },
#else
{ .dev = NULL }, // No SPI2
#endif
#ifdef USE_SPI_DEVICE_3
{ .dev = SPI3, .nss = IO_TAG(SPI3_NSS_PIN), .sck = IO_TAG(SPI3_SCK_PIN), .miso = IO_TAG(SPI3_MISO_PIN), .mosi = IO_TAG(SPI3_MOSI_PIN), .rcc = RCC_APB1(SPI3), .af = GPIO_AF_SPI3, .divisorMap = spiDivisorMapSlow },
#else
{ .dev = NULL }, // No SPI3
#endif
{ .dev = NULL }, // No SPI4
};
#elif defined(STM32F4)
static const uint16_t spiDivisorMapFast[] = {
@ -128,9 +125,22 @@ static const uint16_t spiDivisorMapSlow[] = {
};
static spiDevice_t spiHardwareMap[] = {
{ .dev = SPI1, .nss = IO_TAG(SPI1_NSS_PIN), .sck = IO_TAG(SPI1_SCK_PIN), .miso = IO_TAG(SPI1_MISO_PIN), .mosi = IO_TAG(SPI1_MOSI_PIN), .rcc = RCC_APB2(SPI1), .af = GPIO_AF_SPI1, .leadingEdge = SPI1_LEADING_EDGE, .divisorMap = spiDivisorMapFast },
{ .dev = SPI2, .nss = IO_TAG(SPI2_NSS_PIN), .sck = IO_TAG(SPI2_SCK_PIN), .miso = IO_TAG(SPI2_MISO_PIN), .mosi = IO_TAG(SPI2_MOSI_PIN), .rcc = RCC_APB1(SPI2), .af = GPIO_AF_SPI2, .leadingEdge = SPI2_LEADING_EDGE, .divisorMap = spiDivisorMapSlow },
{ .dev = SPI3, .nss = IO_TAG(SPI3_NSS_PIN), .sck = IO_TAG(SPI3_SCK_PIN), .miso = IO_TAG(SPI3_MISO_PIN), .mosi = IO_TAG(SPI3_MOSI_PIN), .rcc = RCC_APB1(SPI3), .af = GPIO_AF_SPI3, .leadingEdge = SPI3_LEADING_EDGE, .divisorMap = spiDivisorMapSlow }
#ifdef USE_SPI_DEVICE_1
{ .dev = SPI1, .nss = IO_TAG(SPI1_NSS_PIN), .sck = IO_TAG(SPI1_SCK_PIN), .miso = IO_TAG(SPI1_MISO_PIN), .mosi = IO_TAG(SPI1_MOSI_PIN), .rcc = RCC_APB2(SPI1), .af = GPIO_AF_SPI1, .divisorMap = spiDivisorMapFast },
#else
{ .dev = NULL }, // No SPI1
#endif
#ifdef USE_SPI_DEVICE_2
{ .dev = SPI2, .nss = IO_TAG(SPI2_NSS_PIN), .sck = IO_TAG(SPI2_SCK_PIN), .miso = IO_TAG(SPI2_MISO_PIN), .mosi = IO_TAG(SPI2_MOSI_PIN), .rcc = RCC_APB1(SPI2), .af = GPIO_AF_SPI2, .divisorMap = spiDivisorMapSlow },
#else
{ .dev = NULL }, // No SPI2
#endif
#ifdef USE_SPI_DEVICE_3
{ .dev = SPI3, .nss = IO_TAG(SPI3_NSS_PIN), .sck = IO_TAG(SPI3_SCK_PIN), .miso = IO_TAG(SPI3_MISO_PIN), .mosi = IO_TAG(SPI3_MOSI_PIN), .rcc = RCC_APB1(SPI3), .af = GPIO_AF_SPI3, .divisorMap = spiDivisorMapSlow },
#else
{ .dev = NULL }, // No SPI3
#endif
{ .dev = NULL }, // No SPI4
};
#else
#error "Invalid CPU"
@ -150,10 +160,18 @@ SPIDevice spiDeviceByInstance(SPI_TypeDef *instance)
return SPIINVALID;
}
void spiInitDevice(SPIDevice device)
bool spiInitDevice(SPIDevice device, bool leadingEdge)
{
spiDevice_t *spi = &(spiHardwareMap[device]);
if (!spi->dev) {
return false;
}
if (spi->initDone) {
return true;
}
// Enable SPI clock
RCC_ClockCmd(spi->rcc, ENABLE);
RCC_ResetCmd(spi->rcc, ENABLE);
@ -163,7 +181,7 @@ void spiInitDevice(SPIDevice device)
IOInit(IOGetByTag(spi->mosi), OWNER_SPI, RESOURCE_SPI_MOSI, device + 1);
#if defined(STM32F3) || defined(STM32F4)
if (spi->leadingEdge) {
if (leadingEdge) {
IOConfigGPIOAF(IOGetByTag(spi->sck), SPI_IO_AF_SCK_CFG, spi->af);
IOConfigGPIOAF(IOGetByTag(spi->miso), SPI_IO_AF_MISO_CFG, spi->af);
IOConfigGPIOAF(IOGetByTag(spi->mosi), SPI_IO_AF_CFG, spi->af);
@ -190,7 +208,7 @@ void spiInitDevice(SPIDevice device)
spiInit.SPI_CRCPolynomial = 7;
spiInit.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_8;
if (spi->leadingEdge) {
if (leadingEdge) {
// SPI_MODE0
spiInit.SPI_CPOL = SPI_CPOL_Low;
spiInit.SPI_CPHA = SPI_CPHA_1Edge;
@ -212,43 +230,9 @@ void spiInitDevice(SPIDevice device)
// Drive NSS high to disable connected SPI device.
IOHi(IOGetByTag(spi->nss));
}
}
bool spiInit(SPIDevice device)
{
switch (device) {
case SPIINVALID:
return false;
case SPIDEV_1:
#ifdef USE_SPI_DEVICE_1
spiInitDevice(device);
return true;
#else
break;
#endif
case SPIDEV_2:
#ifdef USE_SPI_DEVICE_2
spiInitDevice(device);
return true;
#else
break;
#endif
case SPIDEV_3:
#if defined(USE_SPI_DEVICE_3) && (defined(STM32F303xC) || defined(STM32F4))
spiInitDevice(device);
return true;
#else
break;
#endif
case SPIDEV_4:
#if defined(USE_SPI_DEVICE_4)
spiInitDevice(device);
return true;
#else
break;
#endif
}
return false;
spi->initDone = true;
return true;
}
uint32_t spiTimeoutUserCallback(SPI_TypeDef *instance)

4
src/main/drivers/bus_spi.h
View file

@ -70,12 +70,12 @@ typedef struct SPIDevice_s {
ioTag_t miso;
rccPeriphTag_t rcc;
uint8_t af;
bool leadingEdge;
const uint16_t * divisorMap;
volatile uint16_t errorCount;
bool initDone;
} spiDevice_t;
bool spiInit(SPIDevice device);
bool spiInitDevice(SPIDevice device, bool leadingEdge);
bool spiIsBusBusy(SPI_TypeDef *instance);
void spiSetSpeed(SPI_TypeDef *instance, SPIClockSpeed_e speed);
uint8_t spiTransferByte(SPI_TypeDef *instance, uint8_t in);

98
src/main/drivers/bus_spi_hal.c
View file

@ -68,27 +68,6 @@
#define SPI4_NSS_PIN NONE
#endif
#ifdef SPI1_CLOCK_LEADING_EDGE
# define SPI1_LEADING_EDGE true
#else
# define SPI1_LEADING_EDGE false
#endif
#ifdef SPI2_CLOCK_LEADING_EDGE
# define SPI2_LEADING_EDGE true
#else
# define SPI2_LEADING_EDGE false
#endif
#ifdef SPI3_CLOCK_LEADING_EDGE
# define SPI3_LEADING_EDGE true
#else
# define SPI3_LEADING_EDGE false
#endif
#ifdef SPI4_CLOCK_LEADING_EDGE
# define SPI4_LEADING_EDGE true
#else
# define SPI4_LEADING_EDGE false
#endif
static const uint16_t spiDivisorMapFast[] = {
LL_SPI_BAUDRATEPRESCALER_DIV256, // SPI_CLOCK_INITIALIZATON 421.875 KBits/s
LL_SPI_BAUDRATEPRESCALER_DIV32, // SPI_CLOCK_SLOW 843.75 KBits/s
@ -105,10 +84,26 @@ static const uint16_t spiDivisorMapSlow[] = {
};
static spiDevice_t spiHardwareMap[] = {
{ .dev = SPI1, .nss = IO_TAG(SPI1_NSS_PIN), .sck = IO_TAG(SPI1_SCK_PIN), .miso = IO_TAG(SPI1_MISO_PIN), .mosi = IO_TAG(SPI1_MOSI_PIN), .rcc = RCC_APB2(SPI1), .af = GPIO_AF5_SPI1, .leadingEdge = SPI1_LEADING_EDGE, .divisorMap = spiDivisorMapFast },
{ .dev = SPI2, .nss = IO_TAG(SPI2_NSS_PIN), .sck = IO_TAG(SPI2_SCK_PIN), .miso = IO_TAG(SPI2_MISO_PIN), .mosi = IO_TAG(SPI2_MOSI_PIN), .rcc = RCC_APB1(SPI2), .af = GPIO_AF5_SPI2, .leadingEdge = SPI2_LEADING_EDGE, .divisorMap = spiDivisorMapSlow },
{ .dev = SPI3, .nss = IO_TAG(SPI3_NSS_PIN), .sck = IO_TAG(SPI3_SCK_PIN), .miso = IO_TAG(SPI3_MISO_PIN), .mosi = IO_TAG(SPI3_MOSI_PIN), .rcc = RCC_APB1(SPI3), .af = GPIO_AF6_SPI3, .leadingEdge = SPI3_LEADING_EDGE, .divisorMap = spiDivisorMapSlow },
{ .dev = SPI4, .nss = IO_TAG(SPI4_NSS_PIN), .sck = IO_TAG(SPI4_SCK_PIN), .miso = IO_TAG(SPI4_MISO_PIN), .mosi = IO_TAG(SPI4_MOSI_PIN), .rcc = RCC_APB2(SPI4), .af = GPIO_AF5_SPI4, .leadingEdge = SPI4_LEADING_EDGE, .divisorMap = spiDivisorMapSlow }
#ifdef USE_SPI_DEVICE_1
{ .dev = SPI1, .nss = IO_TAG(SPI1_NSS_PIN), .sck = IO_TAG(SPI1_SCK_PIN), .miso = IO_TAG(SPI1_MISO_PIN), .mosi = IO_TAG(SPI1_MOSI_PIN), .rcc = RCC_APB2(SPI1), .af = GPIO_AF5_SPI1, .divisorMap = spiDivisorMapFast },
#else
{ .dev = NULL }, // No SPI1
#endif
#ifdef USE_SPI_DEVICE_2
{ .dev = SPI2, .nss = IO_TAG(SPI2_NSS_PIN), .sck = IO_TAG(SPI2_SCK_PIN), .miso = IO_TAG(SPI2_MISO_PIN), .mosi = IO_TAG(SPI2_MOSI_PIN), .rcc = RCC_APB1(SPI2), .af = GPIO_AF5_SPI2, .divisorMap = spiDivisorMapSlow },
#else
{ .dev = NULL }, // No SPI2
#endif
#ifdef USE_SPI_DEVICE_3
{ .dev = SPI3, .nss = IO_TAG(SPI3_NSS_PIN), .sck = IO_TAG(SPI3_SCK_PIN), .miso = IO_TAG(SPI3_MISO_PIN), .mosi = IO_TAG(SPI3_MOSI_PIN), .rcc = RCC_APB1(SPI3), .af = GPIO_AF6_SPI3, .divisorMap = spiDivisorMapSlow },
#else
{ .dev = NULL }, // No SPI3
#endif
#ifdef USE_SPI_DEVICE_4
{ .dev = SPI4, .nss = IO_TAG(SPI4_NSS_PIN), .sck = IO_TAG(SPI4_SCK_PIN), .miso = IO_TAG(SPI4_MISO_PIN), .mosi = IO_TAG(SPI4_MOSI_PIN), .rcc = RCC_APB2(SPI4), .af = GPIO_AF5_SPI4, .divisorMap = spiDivisorMapSlow }
#else
{ .dev = NULL } // No SPI4
#endif
};
SPIDevice spiDeviceByInstance(SPI_TypeDef *instance)
@ -138,12 +133,16 @@ void spiTimeoutUserCallback(SPI_TypeDef *instance)
spiHardwareMap[device].errorCount++;
}
void spiInitDevice(SPIDevice device)
bool spiInitDevice(SPIDevice device, bool leadingEdge)
{
spiDevice_t *spi = &(spiHardwareMap[device]);
if (!spi->dev) {
return;
return false;
}
if (spi->initDone) {
return true;
}
// Enable SPI clock
@ -154,7 +153,7 @@ void spiInitDevice(SPIDevice device)
IOInit(IOGetByTag(spi->miso), OWNER_SPI, RESOURCE_SPI_MISO, device + 1);
IOInit(IOGetByTag(spi->mosi), OWNER_SPI, RESOURCE_SPI_MOSI, device + 1);
if (spi->leadingEdge == true) {
if (leadingEdge) {
IOConfigGPIOAF(IOGetByTag(spi->sck), SPI_IO_AF_SCK_CFG_LOW, spi->af);
} else {
IOConfigGPIOAF(IOGetByTag(spi->sck), SPI_IO_AF_SCK_CFG_HIGH, spi->af);
@ -175,8 +174,8 @@ void spiInitDevice(SPIDevice device)
.TransferDirection = SPI_DIRECTION_2LINES,
.Mode = SPI_MODE_MASTER,
.DataWidth = SPI_DATASIZE_8BIT,
.ClockPolarity = spi->leadingEdge ? SPI_POLARITY_LOW : SPI_POLARITY_HIGH,
.ClockPhase = spi->leadingEdge ? SPI_PHASE_1EDGE : SPI_PHASE_2EDGE,
.ClockPolarity = leadingEdge ? SPI_POLARITY_LOW : SPI_POLARITY_HIGH,
.ClockPhase = leadingEdge ? SPI_PHASE_1EDGE : SPI_PHASE_2EDGE,
.NSS = SPI_NSS_SOFT,
.BaudRate = SPI_BAUDRATEPRESCALER_8,
.BitOrder = SPI_FIRSTBIT_MSB,
@ -193,44 +192,9 @@ void spiInitDevice(SPIDevice device)
if (spi->nss) {
IOHi(IOGetByTag(spi->nss));
}
}
bool spiInit(SPIDevice device)
{
switch (device)
{
case SPIINVALID:
return false;
case SPIDEV_1:
#if defined(USE_SPI_DEVICE_1)
spiInitDevice(device);
return true;
#else
break;
#endif
case SPIDEV_2:
#if defined(USE_SPI_DEVICE_2)
spiInitDevice(device);
return true;
#else
break;
#endif
case SPIDEV_3:
#if defined(USE_SPI_DEVICE_3)
spiInitDevice(device);
return true;
#else
break;
#endif
case SPIDEV_4:
#if defined(USE_SPI_DEVICE_4)
spiInitDevice(device);
return true;
#else
break;
#endif
}
return false;
spi->initDone = true;
return true;
}
uint8_t spiTransferByte(SPI_TypeDef *instance, uint8_t txByte)

21
src/main/fc/fc_init.c
View file

@ -381,27 +381,6 @@ void init(void)
// Initialize buses
busInit();
#ifdef USE_SPI
#ifdef USE_SPI_DEVICE_1
spiInit(SPIDEV_1);
#endif
#ifdef USE_SPI_DEVICE_2
spiInit(SPIDEV_2);
#endif
#ifdef USE_SPI_DEVICE_3
#ifdef ALIENFLIGHTF3
if (hardwareRevision == AFF3_REV_2) {
spiInit(SPIDEV_3);
}
#else
spiInit(SPIDEV_3);
#endif
#endif
#ifdef USE_SPI_DEVICE_4
spiInit(SPIDEV_4);
#endif
#endif
#ifdef USE_HARDWARE_REVISION_DETECTION
updateHardwareRevision();
#endif

1
src/main/target/ALIENFLIGHTF4/target.h
View file

@ -126,7 +126,6 @@
#define SPI2_SCK_PIN PB13
#define SPI2_MISO_PIN PC2
#define SPI2_MOSI_PIN PC3
#define SPI2_CLOCK_LEADING_EDGE
#define SPI3_NSS_PIN PA15
#define SPI3_SCK_PIN PB3

1
src/main/target/ALIENFLIGHTNGF7/target.h
View file

@ -134,7 +134,6 @@
#define SPI2_SCK_PIN PB13
#define SPI2_MISO_PIN PC2
#define SPI2_MOSI_PIN PC3
#define SPI2_CLOCK_LEADING_EDGE
#define SPI3_NSS_PIN PA15
#define SPI3_SCK_PIN PB3

1
src/main/target/ANYFCF7/target.h
View file

@ -129,7 +129,6 @@
#define SPI4_SCK_PIN PE12
#define SPI4_MISO_PIN PE13
#define SPI4_MOSI_PIN PE14
#define SPI4_CLOCK_LEADING_EDGE
#define USE_OSD
#define USE_MAX7456

1
src/main/target/BEEROTORF4/target.h
View file

@ -117,7 +117,6 @@
#define SPI2_SCK_PIN PB13
#define SPI2_MISO_PIN PB14
#define SPI2_MOSI_PIN PB15
#define SPI2_CLOCK_LEADING_EDGE
//MAX7456 / SPI RX
#define USE_SPI_DEVICE_3

1
src/main/target/BETAFLIGHTF3/target.h
View file

@ -83,7 +83,6 @@
#define SPI2_SCK_PIN PB13
#define SPI2_MISO_PIN PB14
#define SPI2_MOSI_PIN PB15
#define SPI2_CLOCK_LEADING_EDGE
#define USE_OSD
#define USE_MAX7456

1
src/main/target/BLUEJAYF4/target.h
View file

@ -121,7 +121,6 @@
#define SPI3_SCK_PIN PC10
#define SPI3_MISO_PIN PC11
#define SPI3_MOSI_PIN PC12
#define SPI3_CLOCK_LEADING_EDGE
#define USE_I2C
#define USE_I2C_DEVICE_1

1
src/main/target/F4BY/target.h
View file

@ -108,7 +108,6 @@
#define SPI2_SCK_PIN PB13
#define SPI2_MISO_PIN PB14
#define SPI2_MOSI_PIN PB15
#define SPI2_CLOCK_LEADING_EDGE
#define USE_SPI_DEVICE_3
#define SPI3_NSS_PIN PA15

1
src/main/target/FISHDRONEF4/target.h
View file

@ -94,7 +94,6 @@
#define SPI3_MISO_PIN PB4
#define SPI3_MOSI_PIN PB5
#define SPI3_NSS_PIN PB6
#define SPI3_CLOCK_LEADING_EDGE
#define USE_SDCARD
#define USE_SDCARD_SPI

1
src/main/target/FRSKYF3/target.h
View file

@ -82,7 +82,6 @@
#define SPI1_SCK_PIN PA5
#define SPI1_MISO_PIN PA6
#define SPI1_MOSI_PIN PA7
#define SPI1_CLOCK_LEADING_EDGE
#define USE_SDCARD
#define USE_SDCARD_SPI

1
src/main/target/FRSKYF4/target.h
View file

@ -84,7 +84,6 @@
#define SPI2_SCK_PIN PB13
#define SPI2_MISO_PIN PB14
#define SPI2_MOSI_PIN PB15
#define SPI2_CLOCK_LEADING_EDGE
#define USE_SPI_DEVICE_3
#define SPI3_NSS_PIN PA15

1
src/main/target/FURYF3/target.h
View file

@ -92,7 +92,6 @@
#ifdef USE_SDCARD
#define USE_SDCARD_SPI
#define SPI2_CLOCK_LEADING_EDGE
#define SDCARD_DETECT_INVERTED
#define SDCARD_DETECT_PIN PB2

1
src/main/target/FURYF4OSD/target.h
View file

@ -60,7 +60,6 @@
#define SPI3_SCK_PIN PC10
#define SPI3_MISO_PIN PC11
#define SPI3_MOSI_PIN PC12
#define SPI3_CLOCK_LEADING_EDGE
// *************** M25P256 flash ********************
#define USE_FLASHFS

1
src/main/target/KAKUTEF7/target.h
View file

@ -84,7 +84,6 @@
#define SPI1_SCK_PIN PA5
#define SPI1_MISO_PIN PA6
#define SPI1_MOSI_PIN PA7
#define SPI1_CLOCK_LEADING_EDGE
#define SPI2_NSS_PIN PB12
#define SPI2_SCK_PIN PB13

1
src/main/target/KROOZX/target.h
View file

@ -136,7 +136,6 @@
#define SPI3_SCK_PIN PB3
#define SPI3_MISO_PIN PB4
#define SPI3_MOSI_PIN PB5
#define SPI3_CLOCK_LEADING_EDGE
#define ENABLE_BLACKBOX_LOGGING_ON_SDCARD_BY_DEFAULT

1
src/main/target/MATEKF405/target.h
View file

@ -69,7 +69,6 @@
#define SPI3_SCK_PIN PB3
#define SPI3_MISO_PIN PB4
#define SPI3_MOSI_PIN PB5
#define SPI3_CLOCK_LEADING_EDGE
#define ENABLE_BLACKBOX_LOGGING_ON_SDCARD_BY_DEFAULT

1
src/main/target/MATEKF405SE/target.h
View file

@ -104,7 +104,6 @@
#define SPI3_SCK_PIN PB3
#define SPI3_MISO_PIN PB4
#define SPI3_MOSI_PIN PB5
#define SPI3_CLOCK_LEADING_EDGE
#define ENABLE_BLACKBOX_LOGGING_ON_SDCARD_BY_DEFAULT

1
src/main/target/MATEKF722/target.h
View file

@ -85,7 +85,6 @@
#define SPI3_SCK_PIN PB3
#define SPI3_MISO_PIN PB4
#define SPI3_MOSI_PIN PB5
#define SPI3_CLOCK_LEADING_EDGE
#define ENABLE_BLACKBOX_LOGGING_ON_SDCARD_BY_DEFAULT

1
src/main/target/MATEKF722SE/target.h
View file

@ -122,7 +122,6 @@
# define SDCARD_SPI_BUS BUS_SPI3
# define SDCARD_CS_PIN PD2
# define ENABLE_BLACKBOX_LOGGING_ON_SDCARD_BY_DEFAULT
# define SPI3_CLOCK_LEADING_EDGE // TODO(digitalentity): implement DEVFLAGS_SPI_MODE_0 flag in SPI drivers
#endif
// *************** UART *****************************

1
src/main/target/OMNIBUS/target.h
View file

@ -96,7 +96,6 @@
#define SPI2_SCK_PIN PB13
#define SPI2_MISO_PIN PB14
#define SPI2_MOSI_PIN PB15
#define SPI2_CLOCK_LEADING_EDGE
//#define USE_RX_SPI
#define RX_SPI_INSTANCE SPI2

1
src/main/target/OMNIBUSF4/target.h
View file

@ -180,7 +180,6 @@
#if defined(OMNIBUSF4PRO) || defined(OMNIBUSF4V3)
#define USE_SPI_DEVICE_2
#define SPI2_CLOCK_LEADING_EDGE
#define SPI2_NSS_PIN PB12
#define SPI2_SCK_PIN PB13
#define SPI2_MISO_PIN PB14

2
src/main/target/OMNIBUSF7/target.h
View file

@ -136,8 +136,6 @@
#define SPI4_SCK_PIN PE2
#define SPI4_MISO_PIN PE5
#define SPI4_MOSI_PIN PE6
#define SPI4_CLOCK_LEADING_EDGE
#define USE_OSD
#define USE_MAX7456

1
src/main/target/SPRACINGF3EVO/target.h
View file

@ -109,7 +109,6 @@
#define SPI2_SCK_PIN PB13
#define SPI2_MISO_PIN PB14
#define SPI2_MOSI_PIN PB15
#define SPI2_CLOCK_LEADING_EDGE
#define USE_SDCARD
#define USE_SDCARD_SPI

1
src/main/target/SPRACINGF3MINI/target.h
View file

@ -101,7 +101,6 @@
#define SPI2_SCK_PIN PB13
#define SPI2_MISO_PIN PB14
#define SPI2_MOSI_PIN PB15
#define SPI2_CLOCK_LEADING_EDGE
#define USE_SDCARD
#define USE_SDCARD_SPI

1
src/main/target/SPRACINGF3NEO/target.h
View file

@ -101,7 +101,6 @@
#define SPI2_SCK_PIN PB13
#define SPI2_MISO_PIN PB14
#define SPI2_MOSI_PIN PB15
#define SPI2_CLOCK_LEADING_EDGE
#define SPI3_NSS_PIN PA15
#define SPI3_SCK_PIN PB3

1
src/main/target/SPRACINGF4EVO/target.h
View file

@ -120,7 +120,6 @@
#define SPI2_SCK_PIN PB13
#define SPI2_MISO_PIN PB14
#define SPI2_MOSI_PIN PB15
#define SPI2_CLOCK_LEADING_EDGE
#define SPI3_NSS_PIN PA15 // NC
#define SPI3_SCK_PIN PB3 // NC

1
src/main/target/SPRACINGF7DUAL/target.h
View file

@ -153,7 +153,6 @@
#define SPI3_SCK_PIN PB3
#define SPI3_MISO_PIN PB4
#define SPI3_MOSI_PIN PB5
#define SPI3_CLOCK_LEADING_EDGE
#define SDCARD_SPI_BUS BUS_SPI3
#define SDCARD_CS_PIN PC3

1
src/main/target/YUPIF4/target.h
View file

@ -139,7 +139,6 @@
#define SPI3_SCK_PIN PC10
#define SPI3_MISO_PIN PC11
#define SPI3_MOSI_PIN PC12
#define SPI3_CLOCK_LEADING_EDGE
// ADC inputs
#define BOARD_HAS_VOLTAGE_DIVIDER