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[STARTUP/BL] Use a function per MCU family to define the BL address

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This way we avoid having to define it in all the LD scripts.
Instead, a new systemBootloaderAddress() function returns the
address where the bootloader is mapped for the current MCU.
This commit is contained in:
Alberto García Hierro 2020-03-24 21:49:08 +00:00 • committed by Michel Pastor
parent 5b64d8c455
commit 188de6443f
20 changed files with 27 additions and 65 deletions
Download patch file Download diff file Expand all files Collapse all files

17
src/main/drivers/system.c
View file

@ -102,28 +102,25 @@ void systemResetToBootloader(void)
typedef void resetHandler_t(void); typedef void resetHandler_t(void);
typedef struct isrVector_s { typedef struct isrVector_s {
__I uint32_t stackEnd; uint32_t stackEnd;
resetHandler_t *resetHandler; resetHandler_t *resetHandler;
} isrVector_t; } isrVector_t;
#pragma GCC push_options
#pragma GCC optimize ("O0")
void checkForBootLoaderRequest(void) void checkForBootLoaderRequest(void)
{ {
uint32_t bootloaderRequest = persistentObjectRead(PERSISTENT_OBJECT_RESET_REASON); uint32_t bootloaderRequest = persistentObjectRead(PERSISTENT_OBJECT_RESET_REASON);
if (bootloaderRequest != RESET_BOOTLOADER_REQUEST_ROM) { if (bootloaderRequest != RESET_BOOTLOADER_REQUEST_ROM) {
return; return;
} }
persistentObjectWrite(PERSISTENT_OBJECT_RESET_REASON, RESET_NONE); persistentObjectWrite(PERSISTENT_OBJECT_RESET_REASON, RESET_NONE);
extern isrVector_t system_isr_vector_table_base; volatile isrVector_t *bootloaderVector = (isrVector_t *)systemBootloaderAddress();
__set_MSP(bootloaderVector->stackEnd);
__set_MSP(system_isr_vector_table_base.stackEnd); bootloaderVector->resetHandler();
system_isr_vector_table_base.resetHandler();
while (1); while (1);
} }
#pragma GCC pop_options
// SysTick // SysTick

1
src/main/drivers/system.h
View file

@ -39,6 +39,7 @@ void failureMode(failureMode_e mode);
// bootloader/IAP // bootloader/IAP
void systemReset(void); void systemReset(void);
void systemResetToBootloader(void); void systemResetToBootloader(void);
uint32_t systemBootloaderAddress(void);
bool isMPUSoftReset(void); bool isMPUSoftReset(void);
void cycleCounterInit(void); void cycleCounterInit(void);
void checkForBootLoaderRequest(void); void checkForBootLoaderRequest(void);

5
src/main/drivers/system_stm32f30x.c
View file

@ -61,6 +61,11 @@ bool isMPUSoftReset(void)
return false; return false;
} }
uint32_t systemBootloaderAddress(void)
{
return 0x1FFFD800;
}
static void systemTimekeepingSetup(void) static void systemTimekeepingSetup(void)
{ {
RCC_ClocksTypeDef clocks; RCC_ClocksTypeDef clocks;

5
src/main/drivers/system_stm32f4xx.c
View file

@ -138,6 +138,11 @@ bool isMPUSoftReset(void)
return false; return false;
} }
uint32_t systemBootloaderAddress(void)
{
return 0x1FFF0000;
}
void systemClockSetup(uint8_t cpuUnderclock) void systemClockSetup(uint8_t cpuUnderclock)
{ {
(void)cpuUnderclock; (void)cpuUnderclock;

5
src/main/drivers/system_stm32f7xx.c
View file

@ -61,6 +61,11 @@ bool isMPUSoftReset(void)
return false; return false;
} }
uint32_t systemBootloaderAddress(void)
{
return 0x1FF00000;
}
void systemClockSetup(uint8_t cpuUnderclock) void systemClockSetup(uint8_t cpuUnderclock)
{ {
(void)cpuUnderclock; (void)cpuUnderclock;

9
src/main/target/link/stm32_flash.ld
View file

@ -30,15 +30,6 @@ SECTIONS
. = ALIGN(4); . = ALIGN(4);
} >FLASH } >FLASH
/* System memory (read-only bootloader) interrupt vector */
.system_isr_vector (NOLOAD) :
{
. = ALIGN(4);
PROVIDE (system_isr_vector_table_base = .);
KEEP(*(.system_isr_vector)) /* Bootloader code */
. = ALIGN(4);
} >SYSTEM_MEMORY
/* The program code and other data goes into FLASH */ /* The program code and other data goes into FLASH */
.text : .text :
{ {

2
src/main/target/link/stm32_flash_f303_128k.ld
View file

@ -19,8 +19,6 @@ MEMORY
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 126K FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 126K
FLASH_CONFIG (r) : ORIGIN = 0x0801F800, LENGTH = 2K FLASH_CONFIG (r) : ORIGIN = 0x0801F800, LENGTH = 2K
SYSTEM_MEMORY (rx): ORIGIN = 0x1FFFD800, LENGTH = 8K
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 40K RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 40K
CCM (xrw) : ORIGIN = 0x10000000, LENGTH = 8K CCM (xrw) : ORIGIN = 0x10000000, LENGTH = 8K
MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K

2
src/main/target/link/stm32_flash_f303_256k.ld
View file

@ -19,8 +19,6 @@ MEMORY
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 250K FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 250K
FLASH_CONFIG (r) : ORIGIN = 0x0803E800, LENGTH = 6K FLASH_CONFIG (r) : ORIGIN = 0x0803E800, LENGTH = 6K
SYSTEM_MEMORY (rx): ORIGIN = 0x1FFFD800, LENGTH = 8K
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 40K RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 40K
CCM (xrw) : ORIGIN = 0x10000000, LENGTH = 8K CCM (xrw) : ORIGIN = 0x10000000, LENGTH = 8K
MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K

2
src/main/target/link/stm32_flash_f405.ld
View file

@ -28,8 +28,6 @@ MEMORY
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 896K FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 896K
FLASH_CONFIG (r) : ORIGIN = 0x080E0000, LENGTH = 128K FLASH_CONFIG (r) : ORIGIN = 0x080E0000, LENGTH = 128K
SYSTEM_MEMORY (rx): ORIGIN = 0x1FFF0000, LENGTH = 29K
RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 128K RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 128K
CCM (rwx) : ORIGIN = 0x10000000, LENGTH = 64K CCM (rwx) : ORIGIN = 0x10000000, LENGTH = 64K
BACKUP_SRAM (rwx) : ORIGIN = 0x40024000, LENGTH = 4K BACKUP_SRAM (rwx) : ORIGIN = 0x40024000, LENGTH = 4K

4
src/main/target/link/stm32_flash_f405_opbl.ld
View file

@ -29,8 +29,6 @@ MEMORY
FLASH (rx) : ORIGIN = 0x08004000, LENGTH = 880K FLASH (rx) : ORIGIN = 0x08004000, LENGTH = 880K
FLASH_CONFIG (r): ORIGIN = 0x080E0000, LENGTH = 128K FLASH_CONFIG (r): ORIGIN = 0x080E0000, LENGTH = 128K
SYSTEM_MEMORY (rx): ORIGIN = 0x1FFF0000, LENGTH = 29K
RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 128K RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 128K
CCM (rwx) : ORIGIN = 0x10000000, LENGTH = 64K CCM (rwx) : ORIGIN = 0x10000000, LENGTH = 64K
MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K
@ -39,4 +37,4 @@ MEMORY
REGION_ALIAS("STACKRAM", CCM) REGION_ALIAS("STACKRAM", CCM)
REGION_ALIAS("FASTRAM", CCM) REGION_ALIAS("FASTRAM", CCM)
INCLUDE "stm32_flash.ld" INCLUDE "stm32_flash.ld"

2
src/main/target/link/stm32_flash_f411.ld
View file

@ -30,8 +30,6 @@ MEMORY
FLASH_CONFIG (r) : ORIGIN = 0x08004000, LENGTH = 16K FLASH_CONFIG (r) : ORIGIN = 0x08004000, LENGTH = 16K
FLASH1 (rx) : ORIGIN = 0x08008000, LENGTH = 480K FLASH1 (rx) : ORIGIN = 0x08008000, LENGTH = 480K
SYSTEM_MEMORY (rx): ORIGIN = 0x1FFF0000, LENGTH = 29K
RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 128K RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 128K
MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K
} }

4
src/main/target/link/stm32_flash_f411_opbl.ld
View file

@ -29,8 +29,6 @@ MEMORY
FLASH (rx) : ORIGIN = 0x08004000, LENGTH = 368K FLASH (rx) : ORIGIN = 0x08004000, LENGTH = 368K
FLASH_CONFIG (r) : ORIGIN = 0x08060000, LENGTH = 128K FLASH_CONFIG (r) : ORIGIN = 0x08060000, LENGTH = 128K
SYSTEM_MEMORY (rx): ORIGIN = 0x1FFF0000, LENGTH = 29K
RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 128K RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 128K
CCM (xrw) : ORIGIN = 0x10000000, LENGTH = 64K CCM (xrw) : ORIGIN = 0x10000000, LENGTH = 64K
MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K
@ -39,4 +37,4 @@ MEMORY
REGION_ALIAS("STACKRAM", CCM) REGION_ALIAS("STACKRAM", CCM)
REGION_ALIAS("FASTRAM", CCM) REGION_ALIAS("FASTRAM", CCM)
INCLUDE "stm32_flash.ld" INCLUDE "stm32_flash.ld"

2
src/main/target/link/stm32_flash_f427.ld
View file

@ -48,8 +48,6 @@ MEMORY
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 896K FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 896K
FLASH_CONFIG (r) : ORIGIN = 0x080E0000, LENGTH = 128K FLASH_CONFIG (r) : ORIGIN = 0x080E0000, LENGTH = 128K
SYSTEM_MEMORY (rx): ORIGIN = 0x1FFF0000, LENGTH = 29K
RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 128K RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 128K
CCM (rwx) : ORIGIN = 0x10000000, LENGTH = 64K CCM (rwx) : ORIGIN = 0x10000000, LENGTH = 64K
MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K

4
src/main/target/link/stm32_flash_f446.ld
View file

@ -30,8 +30,6 @@ MEMORY
FLASH_CONFIG (r) : ORIGIN = 0x08004000, LENGTH = 16K FLASH_CONFIG (r) : ORIGIN = 0x08004000, LENGTH = 16K
FLASH1 (rx) : ORIGIN = 0x08008000, LENGTH = 480K FLASH1 (rx) : ORIGIN = 0x08008000, LENGTH = 480K
SYSTEM_MEMORY (rx): ORIGIN = 0x1FFF0000, LENGTH = 29K
RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 128K RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 128K
MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K
} }
@ -39,4 +37,4 @@ MEMORY
REGION_ALIAS("STACKRAM", RAM) REGION_ALIAS("STACKRAM", RAM)
REGION_ALIAS("FASTRAM", RAM) REGION_ALIAS("FASTRAM", RAM)
INCLUDE "stm32_flash_split.ld" INCLUDE "stm32_flash_split.ld"

2
src/main/target/link/stm32_flash_f722.ld
View file

@ -37,8 +37,6 @@ MEMORY
FLASH_CONFIG (r) : ORIGIN = 0x08004000, LENGTH = 16K FLASH_CONFIG (r) : ORIGIN = 0x08004000, LENGTH = 16K
FLASH1 (rx) : ORIGIN = 0x08008000, LENGTH = 480K FLASH1 (rx) : ORIGIN = 0x08008000, LENGTH = 480K
SYSTEM_MEMORY (rx) : ORIGIN = 0x1FF00000, LENGTH = 59K
TCM (rwx) : ORIGIN = 0x20000000, LENGTH = 64K TCM (rwx) : ORIGIN = 0x20000000, LENGTH = 64K
RAM (rwx) : ORIGIN = 0x20010000, LENGTH = 192K RAM (rwx) : ORIGIN = 0x20010000, LENGTH = 192K
MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K

2
src/main/target/link/stm32_flash_f745.ld
View file

@ -37,8 +37,6 @@ MEMORY
FLASH_CONFIG (r) : ORIGIN = 0x08008000, LENGTH = 32K FLASH_CONFIG (r) : ORIGIN = 0x08008000, LENGTH = 32K
FLASH1 (rx) : ORIGIN = 0x08010000, LENGTH = 960K FLASH1 (rx) : ORIGIN = 0x08010000, LENGTH = 960K
SYSTEM_MEMORY (rx) : ORIGIN = 0x1FF00000, LENGTH = 60K
TCM (rwx) : ORIGIN = 0x20000000, LENGTH = 64K TCM (rwx) : ORIGIN = 0x20000000, LENGTH = 64K
RAM (rwx) : ORIGIN = 0x20010000, LENGTH = 256K RAM (rwx) : ORIGIN = 0x20010000, LENGTH = 256K
MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K

2
src/main/target/link/stm32_flash_f746.ld
View file

@ -36,8 +36,6 @@ MEMORY
FLASH_CONFIG (r) : ORIGIN = 0x08008000, LENGTH = 32K FLASH_CONFIG (r) : ORIGIN = 0x08008000, LENGTH = 32K
FLASH1 (rx) : ORIGIN = 0x08010000, LENGTH = 960K FLASH1 (rx) : ORIGIN = 0x08010000, LENGTH = 960K
SYSTEM_MEMORY (rx) : ORIGIN = 0x1FF00000, LENGTH = 60K
TCM (rwx) : ORIGIN = 0x20000000, LENGTH = 64K TCM (rwx) : ORIGIN = 0x20000000, LENGTH = 64K
RAM (rwx) : ORIGIN = 0x20010000, LENGTH = 256K RAM (rwx) : ORIGIN = 0x20010000, LENGTH = 256K
MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K

4
src/main/target/link/stm32_flash_f765.ld
View file

@ -38,8 +38,6 @@ MEMORY
AXIM_FLASH_CFG (r) : ORIGIN = 0x08008000, LENGTH = 32K AXIM_FLASH_CFG (r) : ORIGIN = 0x08008000, LENGTH = 32K
AXIM_FLASH1 (rx) : ORIGIN = 0x08010000, LENGTH = 1984K AXIM_FLASH1 (rx) : ORIGIN = 0x08010000, LENGTH = 1984K
SYSTEM_MEMORY (rx) : ORIGIN = 0x1FF00000, LENGTH = 59K
DTCM_RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 128K DTCM_RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 128K
SRAM1 (rwx) : ORIGIN = 0x20020000, LENGTH = 368K SRAM1 (rwx) : ORIGIN = 0x20020000, LENGTH = 368K
SRAM2 (rwx) : ORIGIN = 0x2007C000, LENGTH = 16K SRAM2 (rwx) : ORIGIN = 0x2007C000, LENGTH = 16K
@ -54,4 +52,4 @@ REGION_ALIAS("STACKRAM", DTCM_RAM)
REGION_ALIAS("FASTRAM", DTCM_RAM) REGION_ALIAS("FASTRAM", DTCM_RAM)
REGION_ALIAS("RAM", SRAM1) REGION_ALIAS("RAM", SRAM1)
INCLUDE "stm32_flash_f7_split.ld" INCLUDE "stm32_flash_f7_split.ld"

9
src/main/target/link/stm32_flash_f7_split.ld
View file

@ -67,15 +67,6 @@ SECTIONS
__exidx_end = .; __exidx_end = .;
} >FLASH } >FLASH
/* System memory (read-only bootloader) interrupt vector */
.system_isr_vector (NOLOAD) :
{
. = ALIGN(4);
PROVIDE (system_isr_vector_table_base = .);
KEEP(*(.system_isr_vector)) /* Bootloader code */
. = ALIGN(4);
} >SYSTEM_MEMORY
.busdev_registry : .busdev_registry :
{ {
PROVIDE_HIDDEN (__busdev_registry_start = .); PROVIDE_HIDDEN (__busdev_registry_start = .);

9
src/main/target/link/stm32_flash_split.ld
View file

@ -30,15 +30,6 @@ SECTIONS
. = ALIGN(4); . = ALIGN(4);
} >FLASH } >FLASH
/* System memory (read-only bootloader) interrupt vector */
.system_isr_vector (NOLOAD) :
{
. = ALIGN(4);
PROVIDE (system_isr_vector_table_base = .);
KEEP(*(.system_isr_vector)) /* Bootloader code */
. = ALIGN(4);
} >SYSTEM_MEMORY
/* The program code and other data goes into FLASH */ /* The program code and other data goes into FLASH */
.text : .text :
{ {