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Code Issues Wiki Activity

Got NRF24 working on CJMCU

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This commit is contained in:
Martin Budden 2016-07-22 21:59:27 +01:00
parent a8308803b2
commit 29b270908f
7 changed files with 77 additions and 46 deletions
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4
Makefile
View file

@ -409,10 +409,10 @@ COMMON_SRC = \
rx/msp.c \
rx/nrf24.c \
rx/nrf24_cx10.c \
rx/nrf24_ref.c \
rx/nrf24_h8_3d.c \
rx/nrf24_syma.c \
rx/nrf24_v202.c \
rx/nrf24_h8_3d.c \
rx/nrf24_ref.c \
rx/pwm.c \
rx/rx.c \
rx/sbus.c \

45
src/main/drivers/bus_spi.c
View file

@ -62,7 +62,6 @@ void initSpi1(void)
RCC_APB2PeriphClockCmd(RCC_APB2Periph_SPI1, ENABLE);
RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, ENABLE);
#ifdef STM32F303xC
GPIO_InitTypeDef GPIO_InitStructure;
@ -71,9 +70,11 @@ void initSpi1(void)
GPIO_PinAFConfig(SPI1_GPIO, SPI1_SCK_PIN_SOURCE, GPIO_AF_5);
GPIO_PinAFConfig(SPI1_GPIO, SPI1_MISO_PIN_SOURCE, GPIO_AF_5);
GPIO_PinAFConfig(SPI1_GPIO, SPI1_MOSI_PIN_SOURCE, GPIO_AF_5);
#ifdef SPI1_NSS_PIN_SOURCE
GPIO_PinAFConfig(SPI1_GPIO, SPI1_NSS_PIN_SOURCE, GPIO_AF_5);
#endif
// Init pins
GPIO_InitStructure.GPIO_Pin = SPI1_SCK_PIN | SPI1_MISO_PIN | SPI1_MOSI_PIN;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
@ -91,20 +92,22 @@ void initSpi1(void)
GPIO_Init(SPI1_GPIO, &GPIO_InitStructure);
#endif
#endif
#ifdef STM32F10X
gpio_config_t gpio;
// MOSI + SCK as output
gpio.mode = Mode_AF_PP;
gpio.pin = SPI1_MOSI_PIN | SPI1_SCK_PIN;
gpio.speed = Speed_50MHz;
gpioInit(GPIOA, &gpio);
// MISO as input
gpio.pin = SPI1_MISO_PIN;
gpio.mode = Mode_IN_FLOATING;
gpioInit(GPIOA, &gpio);
#ifdef SPI1_NSS_PIN
// NSS as gpio slave select
gpio.pin = SPI1_NSS_PIN;
@ -113,7 +116,7 @@ void initSpi1(void)
#endif
#endif
// Init SPI hardware
// Init SPI1 hardware
SPI_I2S_DeInit(SPI1);
spi.SPI_Mode = SPI_Mode_Master;
@ -122,9 +125,15 @@ void initSpi1(void)
spi.SPI_NSS = SPI_NSS_Soft;
spi.SPI_FirstBit = SPI_FirstBit_MSB;
spi.SPI_CRCPolynomial = 7;
spi.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_8;
#if (defined(USE_SDCARD_SPI1) || defined(USE_NRF24_SPI1))
spi.SPI_CPOL = SPI_CPOL_Low;
spi.SPI_CPHA = SPI_CPHA_1Edge;
#else
spi.SPI_CPOL = SPI_CPOL_High;
spi.SPI_CPHA = SPI_CPHA_2Edge;
spi.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_8;
#endif
#ifdef STM32F303xC
// Configure for 8-bit reads.
@ -133,6 +142,11 @@ void initSpi1(void)
SPI_Init(SPI1, &spi);
SPI_Cmd(SPI1, ENABLE);
#ifdef SPI1_NSS_PIN
// Drive NSS high to disable connected SPI device.
GPIO_SetBits(SPI1_GPIO, SPI1_NSS_PIN);
#endif
}
#endif
@ -166,7 +180,6 @@ void initSpi2(void)
RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI2, ENABLE);
RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, ENABLE);
#ifdef STM32F303xC
GPIO_InitTypeDef GPIO_InitStructure;
@ -175,6 +188,7 @@ void initSpi2(void)
GPIO_PinAFConfig(SPI2_GPIO, SPI2_SCK_PIN_SOURCE, GPIO_AF_5);
GPIO_PinAFConfig(SPI2_GPIO, SPI2_MISO_PIN_SOURCE, GPIO_AF_5);
GPIO_PinAFConfig(SPI2_GPIO, SPI2_MOSI_PIN_SOURCE, GPIO_AF_5);
#ifdef SPI2_NSS_PIN_SOURCE
GPIO_PinAFConfig(SPI2_GPIO, SPI2_NSS_PIN_SOURCE, GPIO_AF_5);
#endif
@ -195,7 +209,6 @@ void initSpi2(void)
GPIO_Init(SPI2_GPIO, &GPIO_InitStructure);
#endif
#endif
#ifdef STM32F10X
@ -206,6 +219,7 @@ void initSpi2(void)
gpio.pin = SPI2_SCK_PIN | SPI2_MOSI_PIN;
gpio.speed = Speed_50MHz;
gpioInit(SPI2_GPIO, &gpio);
// MISO as input
gpio.pin = SPI2_MISO_PIN;
gpio.mode = Mode_IN_FLOATING;
@ -222,27 +236,34 @@ void initSpi2(void)
// Init SPI2 hardware
SPI_I2S_DeInit(SPI2);
spi.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
spi.SPI_Mode = SPI_Mode_Master;
spi.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
spi.SPI_DataSize = SPI_DataSize_8b;
spi.SPI_CPOL = SPI_CPOL_High;
spi.SPI_CPHA = SPI_CPHA_2Edge;
spi.SPI_NSS = SPI_NSS_Soft;
spi.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_8;
spi.SPI_FirstBit = SPI_FirstBit_MSB;
spi.SPI_CRCPolynomial = 7;
spi.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_8;
#ifdef USE_SDCARD_SPI2
spi.SPI_CPOL = SPI_CPOL_Low;
spi.SPI_CPHA = SPI_CPHA_1Edge;
#else
spi.SPI_CPOL = SPI_CPOL_High;
spi.SPI_CPHA = SPI_CPHA_2Edge;
#endif
#ifdef STM32F303xC
// Configure for 8-bit reads.
SPI_RxFIFOThresholdConfig(SPI2, SPI_RxFIFOThreshold_QF);
#endif
SPI_Init(SPI2, &spi);
SPI_Cmd(SPI2, ENABLE);
#ifdef SPI2_NSS_PIN
// Drive NSS high to disable connected SPI device.
GPIO_SetBits(SPI2_GPIO, SPI2_NSS_PIN);
#endif
}
#endif

3
src/main/drivers/pwm_rx.c
View file

@ -20,11 +20,10 @@
#include <platform.h>
#include "platform.h"
#include "build_config.h"
#ifndef SKIP_RX_PWM_PPM
#include "build_config.h"
#include "debug.h"
#include "common/utils.h"

1
src/main/io/serial_cli.c
View file

@ -393,6 +393,7 @@ static const char * const lookupTableNRF24RX[] = {
"CX10A",
"H8_3D",
"H8_3D_DEV",
"REF"
};
#endif

3
src/main/rx/nrf24.c
View file

@ -19,9 +19,10 @@
#include <stdint.h>
#include <platform.h>
#include "build_config.h"
#ifdef USE_RX_NRF24
#include "build_config.h"
#include "drivers/rx_nrf24l01.h"
#include "rx/rx.h"
#include "rx/nrf24.h"

31
src/main/rx/nrf24_ref.c
View file

@ -20,10 +20,11 @@
#include <string.h>
#include "platform.h"
#include "build_config.h"
#ifdef USE_RX_REF
#include "build_config.h"
#include "drivers/rx_nrf24l01.h"
#include "drivers/system.h"
@ -93,7 +94,6 @@ STATIC_UNIT_TESTED uint8_t refRfChannelIndex;
STATIC_UNIT_TESTED uint8_t refRfChannels[REF_RF_CHANNEL_COUNT];
#define REF_RF_BIND_CHANNEL 0x4c
//static uint32_t packetCount = 0;
static uint32_t timeOfLastHop;
static const uint32_t hopTimeout = 5000; // 5ms
@ -167,22 +167,23 @@ static void refHopToNextChannel(void)
}
// The hopping channels are determined by the low bits of rxTxAddr
STATIC_UNIT_TESTED void refSetHoppingChannels(uint32_t addr)
STATIC_UNIT_TESTED void refSetHoppingChannels(uint8_t addr)
{
addr = addr & 0x1f;
const uint32_t inc = (addr << 24) | (addr << 16) | (addr << 8) | addr;
uint32_t * const prfChannels = (uint32_t *)refRfChannels;
*prfChannels = 0x10314259 + inc;
addr &= 0x07;
refRfChannels[0] = 0x10 + addr;
refRfChannels[1] = 0x1C + addr;
refRfChannels[2] = 0x28 + addr;
refRfChannels[3] = 0x34 + addr;
}
void refSetBound(const uint8_t* rxTxAddr)
void refSetBound(void)
{
protocolState = STATE_DATA;
NRF24L01_WriteRegisterMulti(NRF24L01_0A_RX_ADDR_P0, rxTxAddr, RX_TX_ADDR_LEN);
refSetHoppingChannels(rxTxAddr[0]);
timeOfLastHop = micros();
refRfChannelIndex = 0;
NRF24L01_SetChannel(refRfChannels[0]);
NRF24L01_WriteRegisterMulti(NRF24L01_0A_RX_ADDR_P0, rxTxAddr, RX_TX_ADDR_LEN);
}
/*
@ -200,7 +201,7 @@ nrf24_received_t refDataReceived(uint8_t *payload)
if (bindPacket) {
ret = NRF24_RECEIVED_BIND;
// got a bind packet, so set the hopping channels and the rxTxAddr and start listening for data
refSetBound(rxTxAddr);
refSetBound();
}
}
break;
@ -222,23 +223,24 @@ nrf24_received_t refDataReceived(uint8_t *payload)
void refNrf24Init(nrf24_protocol_t protocol, const uint8_t* nrf24_id)
{
UNUSED(protocol);
UNUSED(nrf24_id);
NRF24L01_Initialize(BV(NRF24L01_00_CONFIG_EN_CRC) | BV( NRF24L01_00_CONFIG_CRCO)); // sets PWR_UP, EN_CRC, CRCO - 2 byte CRC
NRF24L01_WriteReg(NRF24L01_01_EN_AA, 0x00); // No auto acknowledgment
NRF24L01_WriteReg(NRF24L01_02_EN_RXADDR, BV(NRF24L01_02_EN_RXADDR_ERX_P0));
NRF24L01_WriteReg(NRF24L01_03_SETUP_AW, NRF24L01_03_SETUP_AW_5BYTES); // 5-byte RX/TX address
if ((nrf24_id[0] | nrf24_id[1] | nrf24_id[2] | nrf24_id[3] | nrf24_id[4]) == 0) {
//if ((nrf24_id != NULL) && ((nrf24_id[0] | nrf24_id[1] | nrf24_id[2] | nrf24_id[3] | nrf24_id[4]) == 0)) {
protocolState = STATE_BIND;
NRF24L01_SetChannel(REF_RF_BIND_CHANNEL);
} else {
/*} else {
rxTxAddr[0] = nrf24_id[0];
rxTxAddr[1] = nrf24_id[1];
rxTxAddr[2] = nrf24_id[2];
rxTxAddr[3] = nrf24_id[3];
rxTxAddr[4] = nrf24_id[4];
refSetBound(nrf24_id);
}
}*/
NRF24L01_WriteReg(NRF24L01_06_RF_SETUP, NRF24L01_06_RF_SETUP_RF_DR_250Kbps | NRF24L01_06_RF_SETUP_RF_PWR_n12dbm);
// RX_ADDR for pipes P1-P5 are left at default values
NRF24L01_WriteRegisterMulti(NRF24L01_0A_RX_ADDR_P0, rxTxAddr, RX_TX_ADDR_LEN);
@ -253,7 +255,8 @@ void refNrf24Init(nrf24_protocol_t protocol, const uint8_t* nrf24_id)
void refInit(const rxConfig_t *rxConfig, rxRuntimeConfig_t *rxRuntimeConfig)
{
rxRuntimeConfig->channelCount = RC_CHANNEL_COUNT;
refNrf24Init((nrf24_protocol_t)rxConfig->nrf24rx_protocol, rxConfig->nrf24rx_id);
//refNrf24Init((nrf24_protocol_t)rxConfig->nrf24rx_protocol, rxConfig->nrf24rx_address);
refNrf24Init((nrf24_protocol_t)rxConfig->nrf24rx_protocol, NULL);
}
#endif

24
src/main/target/CJMCU/target.h
View file

@ -47,6 +47,9 @@
#define USE_SPI
#define USE_SPI_DEVICE_1
#define USE_RX_NRF24
#ifdef USE_RX_NRF24
#define NRF24_SPI_INSTANCE SPI1
#define USE_NRF24_SPI1
@ -62,21 +65,26 @@
#define NRF24_IRQ_GPIO_CLK_PERIPHERAL RCC_APB2Periph_GPIOA
#define USE_RX_NRF24
#define USE_RX_V202
#define USE_RX_SYMA
#define USE_RX_CX10
#define USE_RX_REF
#define USE_RX_SYMA
#define USE_RX_V202
#define NRF24_DEFAULT_PROTOCOL NRF24RX_SYMA_X5C
//#define NRF24_DEFAULT_PROTOCOL NRF24RX_REF
#define DEFAULT_RX_FEATURE FEATURE_RX_NRF24
//#define DEFAULT_RX_FEATURE FEATURE_RX_PPM
#define DEFAULT_FEATURES FEATURE_MOTOR_STOP
#define SKIP_RX_PWM_PPM
#else
#define DEFAULT_RX_FEATURE FEATURE_RX_PPM
#undef SKIP_RX_MSP
#define SPEKTRUM_BIND
// USART2, PA3
// SART2, PA3
#define BIND_PORT GPIOA
#define BIND_PIN Pin_3
#endif //USE_RX_NRF24
#define DEFAULT_FEATURES FEATURE_MOTOR_STOP
// Since the CJMCU PCB has holes for 4 motors in each corner we can save same flash space by disabling support for other mixers.
#define USE_QUAD_MIXER_ONLY
@ -84,13 +92,11 @@
#if (FLASH_SIZE <= 64)
//#define SKIP_TASK_STATISTICS
#define SKIP_RX_PWM_PPM
#define SKIP_CLI_COMMAND_HELP
//#define SKIP_CLI_COMMAND_HELP
#undef SERIAL_RX
#undef BLACKBOX
#endif
#undef SKIP_RX_MSP
// IO - assuming all IOs on 48pin package TODO
#define TARGET_IO_PORTA 0xffff