mirror of
https://github.com/iNavFlight/inav.git
synced 2025-07-26 09:45:33 +03:00
F7 Changes needed for current codebase
This commit is contained in:
Sami Korhonen
parent
76a47c114f
commit
619713f583
28 changed files with 568 additions and 40 deletions
118
Makefile
118
Makefile
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@ -83,23 +83,27 @@ endif
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-include $(ROOT)/src/main/target/$(BASE_TARGET)/target.mk
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F4_TARGETS = $(F405_TARGETS) $(F411_TARGETS)
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F7_TARGETS = $(F7X5XE_TARGETS) $(F7X5XG_TARGETS) $(F7X5XI_TARGETS)
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ifeq ($(filter $(TARGET),$(VALID_TARGETS)),)
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$(error Target '$(TARGET)' is not valid, must be one of $(VALID_TARGETS). Have you prepared a valid target.mk?)
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endif
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ifeq ($(filter $(TARGET),$(F1_TARGETS) $(F3_TARGETS) $(F4_TARGETS)),)
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$(error Target '$(TARGET)' has not specified a valid STM group, must be one of F1, F3, F405, or F411. Have you prepared a valid target.mk?)
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ifeq ($(filter $(TARGET),$(F1_TARGETS) $(F3_TARGETS) $(F4_TARGETS) $(F7_TARGETS)),)
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$(error Target '$(TARGET)' has not specified a valid STM group, must be one of F1, F3, F405, F411 or F7x5. Have you prepared a valid target.mk?)
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endif
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128K_TARGETS = $(F1_TARGETS)
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256K_TARGETS = $(F3_TARGETS)
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512K_TARGETS = $(F411_TARGETS)
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1024K_TARGETS = $(F405_TARGETS)
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512K_TARGETS = $(F411_TARGETS) $(F7X5XE_TARGETS)
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1024K_TARGETS = $(F405_TARGETS) $(F7X5XG_TARGETS)
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2048K_TARGETS = $(F7X5XI_TARGETS)
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# Configure default flash sizes for the targets (largest size specified gets hit first) if flash not specified already.
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ifeq ($(FLASH_SIZE),)
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ifeq ($(TARGET),$(filter $(TARGET),$(1024K_TARGETS)))
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ifeq ($(TARGET),$(filter $(TARGET),$(2048K_TARGETS)))
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FLASH_SIZE = 2048
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else ifeq ($(TARGET),$(filter $(TARGET),$(1024K_TARGETS)))
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FLASH_SIZE = 1024
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else ifeq ($(TARGET),$(filter $(TARGET),$(512K_TARGETS)))
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FLASH_SIZE = 512
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@ -120,6 +124,10 @@ else
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STM32F30x_COMMON_SRC = startup_stm32f30x_md_gcc.S
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endif
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ifeq ($(DEBUG_HARDFAULTS),F7)
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CFLAGS += -DDEBUG_HARDFAULTS
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endif
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REVISION = $(shell git log -1 --format="%h")
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FC_VER_MAJOR := $(shell grep " FC_VERSION_MAJOR" src/main/build/version.h | awk '{print $$3}' )
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@ -276,6 +284,69 @@ DEVICE_FLAGS += -DHSE_VALUE=$(HSE_VALUE)
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TARGET_FLAGS = -D$(TARGET)
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# End F4 targets
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#
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# Start F7 targets
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else ifeq ($(TARGET),$(filter $(TARGET), $(F7_TARGETS)))
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#STDPERIPH
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STDPERIPH_DIR = $(ROOT)/lib/main/STM32F7xx_HAL_Driver
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STDPERIPH_SRC = $(notdir $(wildcard $(STDPERIPH_DIR)/Src/*.c))
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EXCLUDES = stm32f7xx_hal_timebase_rtc_wakeup_template.c \
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stm32f7xx_hal_timebase_rtc_alarm_template.c \
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stm32f7xx_hal_timebase_tim_template.c
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STDPERIPH_SRC := $(filter-out ${EXCLUDES}, $(STDPERIPH_SRC))
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#USB
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USBCORE_DIR = $(ROOT)/lib/main/Middlewares/ST/STM32_USB_Device_Library/Core
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USBCORE_SRC = $(notdir $(wildcard $(USBCORE_DIR)/Src/*.c))
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EXCLUDES = usbd_conf_template.c
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USBCORE_SRC := $(filter-out ${EXCLUDES}, $(USBCORE_SRC))
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USBCDC_DIR = $(ROOT)/lib/main/Middlewares/ST/STM32_USB_Device_Library/Class/CDC
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USBCDC_SRC = $(notdir $(wildcard $(USBCDC_DIR)/Src/*.c))
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EXCLUDES = usbd_cdc_if_template.c
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USBCDC_SRC := $(filter-out ${EXCLUDES}, $(USBCDC_SRC))
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VPATH := $(VPATH):$(USBCDC_DIR)/Src:$(USBCORE_DIR)/Src
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DEVICE_STDPERIPH_SRC := $(STDPERIPH_SRC) \
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$(USBCORE_SRC) \
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$(USBCDC_SRC)
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#CMSIS
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VPATH := $(VPATH):$(CMSIS_DIR)/CM7/Include:$(CMSIS_DIR)/CM7/Device/ST/STM32F7xx
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VPATH := $(VPATH):$(STDPERIPH_DIR)/Src
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CMSIS_SRC = $(notdir $(wildcard $(CMSIS_DIR)/CM7/Include/*.c \
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$(CMSIS_DIR)/CM7/Device/ST/STM32F7xx/*.c))
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INCLUDE_DIRS := $(INCLUDE_DIRS) \
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$(STDPERIPH_DIR)/Inc \
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$(USBCORE_DIR)/Inc \
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$(USBCDC_DIR)/Inc \
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$(CMSIS_DIR)/CM7/Include \
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$(CMSIS_DIR)/CM7/Device/ST/STM32F7xx/Include \
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$(ROOT)/src/main/vcp_hal
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ifneq ($(filter SDCARD,$(FEATURES)),)
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INCLUDE_DIRS := $(INCLUDE_DIRS) \
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$(FATFS_DIR)
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VPATH := $(VPATH):$(FATFS_DIR)
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endif
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#Flags
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ARCH_FLAGS = -mthumb -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-sp-d16 -fsingle-precision-constant -Wdouble-promotion
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ifeq ($(TARGET),$(filter $(TARGET),$(F7X5XG_TARGETS)))
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DEVICE_FLAGS = -DSTM32F745xx -DUSE_HAL_DRIVER -D__FPU_PRESENT
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LD_SCRIPT = $(LINKER_DIR)/stm32_flash_f745.ld
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else
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$(error Unknown MCU for F7 target)
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endif
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DEVICE_FLAGS += -DHSE_VALUE=$(HSE_VALUE)
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TARGET_FLAGS = -D$(TARGET)
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# End F7 targets
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#
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# Start F1 targets
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else
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@ -506,6 +577,12 @@ VCP_SRC = \
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vcpf4/usbd_usr.c \
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vcpf4/usbd_cdc_vcp.c \
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drivers/serial_usb_vcp.c
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else ifeq ($(TARGET),$(filter $(TARGET),$(F7_TARGETS)))
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VCP_SRC = \
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vcp_hal/usbd_desc.c \
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vcp_hal/usbd_conf.c \
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vcp_hal/usbd_cdc_interface.c \
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drivers/serial_usb_vcp_hal.c
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else
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VCP_SRC = \
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vcp/hw_config.c \
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@ -558,9 +635,34 @@ STM32F4xx_COMMON_SRC = \
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drivers/timer_stm32f4xx.c \
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drivers/dma_stm32f4xx.c
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STM32F7xx_COMMON_SRC = \
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startup_stm32f745xx.s \
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target/system_stm32f7xx.c \
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drivers/accgyro_mpu.c \
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drivers/adc_stm32f7xx.c \
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drivers/bus_i2c_hal.c \
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drivers/dma_stm32f7xx.c \
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drivers/gpio_stm32f7xx.c \
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drivers/inverter.c \
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drivers/bus_spi_hal.c \
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drivers/timer_hal.c \
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drivers/timer_stm32f7xx.c \
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drivers/pwm_output_hal.c \
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drivers/system_stm32f7xx.c \
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drivers/serial_uart_stm32f7xx.c \
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drivers/serial_uart_hal.c
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F7EXCLUDES = drivers/bus_spi.c \
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drivers/bus_i2c.c \
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drivers/timer.c \
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drivers/pwm_output.c \
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drivers/serial_uart.c
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# check if target.mk supplied
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ifeq ($(TARGET),$(filter $(TARGET),$(F4_TARGETS)))
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TARGET_SRC := $(STM32F4xx_COMMON_SRC) $(TARGET_SRC)
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else ifeq ($(TARGET),$(filter $(TARGET),$(F7_TARGETS)))
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TARGET_SRC := $(STM32F7xx_COMMON_SRC) $(TARGET_SRC)
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else ifeq ($(TARGET),$(filter $(TARGET),$(F3_TARGETS)))
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TARGET_SRC := $(STM32F30x_COMMON_SRC) $(TARGET_SRC)
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else ifeq ($(TARGET),$(filter $(TARGET),$(F1_TARGETS)))
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@ -573,13 +675,17 @@ TARGET_SRC += \
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io/flashfs.c
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endif
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ifeq ($(TARGET),$(filter $(TARGET),$(F4_TARGETS) $(F3_TARGETS)))
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ifeq ($(TARGET),$(filter $(TARGET),$(F7_TARGETS) $(F4_TARGETS) $(F3_TARGETS)))
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TARGET_SRC += $(HIGHEND_SRC)
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else ifneq ($(filter HIGHEND,$(FEATURES)),)
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TARGET_SRC += $(HIGHEND_SRC)
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endif
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TARGET_SRC += $(COMMON_SRC)
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#excludes
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ifeq ($(TARGET),$(filter $(TARGET),$(F7_TARGETS)))
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TARGET_SRC := $(filter-out ${F7EXCLUDES}, $(TARGET_SRC))
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endif
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ifneq ($(filter SDCARD,$(FEATURES)),)
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TARGET_SRC += \
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@ -31,7 +31,7 @@ __attribute__( ( always_inline ) ) static inline void __set_BASEPRI_MAX_nb(uint3
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__ASM volatile ("\tMSR basepri_max, %0\n" : : "r" (basePri) );
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}
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#ifndef STM32F4 /* already defined in /lib/main/CMSIS/CM4/CoreSupport/core_cmFunc.h for F4 targets */
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#if !defined(STM32F4) && !defined(STM32F7) /* already defined in /lib/main/CMSIS/CM4/CoreSupport/core_cmFunc.h for F4 targets */
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__attribute__( ( always_inline ) ) static inline void __set_BASEPRI_MAX(uint32_t basePri)
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{
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__ASM volatile ("\tMSR basepri_max, %0\n" : : "r" (basePri) : "memory" );
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@ -74,6 +74,8 @@
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#define FLASH_PAGE_SIZE ((uint32_t)0x20000) // 128K sectors
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#elif defined(STM32F411xE)
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#define FLASH_PAGE_SIZE ((uint32_t)0x20000) // 128K sectors
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#elif defined(STM32F745xx)
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#define FLASH_PAGE_SIZE ((uint32_t)0x40000) // 256K sectors
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#else
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#error "Flash page size not defined for target."
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#endif
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@ -168,6 +170,70 @@ static uint32_t getFLASHSectorForEEPROM(void)
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}
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#endif
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#if defined(STM32F7)
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// FIXME: HAL for now this will only work for F4/F7 as flash layout is different
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void writeEEPROM(void)
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{
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// Generate compile time error if the config does not fit in the reserved area of flash.
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BUILD_BUG_ON(sizeof(master_t) > ((uint32_t)&__config_end - (uint32_t)&__config_start));
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HAL_StatusTypeDef status;
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uint32_t wordOffset;
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int8_t attemptsRemaining = 3;
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suspendRxSignal();
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// prepare checksum/version constants
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masterConfig.version = EEPROM_CONF_VERSION;
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masterConfig.size = sizeof(master_t);
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masterConfig.magic_be = 0xBE;
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masterConfig.magic_ef = 0xEF;
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masterConfig.chk = 0; // erase checksum before recalculating
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masterConfig.chk = calculateChecksum((const uint8_t *) &masterConfig, sizeof(master_t));
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// write it
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/* Unlock the Flash to enable the flash control register access *************/
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HAL_FLASH_Unlock();
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while (attemptsRemaining--)
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{
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/* Fill EraseInit structure*/
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FLASH_EraseInitTypeDef EraseInitStruct = {0};
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EraseInitStruct.TypeErase = FLASH_TYPEERASE_SECTORS;
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EraseInitStruct.VoltageRange = FLASH_VOLTAGE_RANGE_3; // 2.7-3.6V
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EraseInitStruct.Sector = (FLASH_SECTOR_TOTAL-1);
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EraseInitStruct.NbSectors = 1;
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uint32_t SECTORError;
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status = HAL_FLASHEx_Erase(&EraseInitStruct, &SECTORError);
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if (status != HAL_OK)
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{
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continue;
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}
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else
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{
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for (wordOffset = 0; wordOffset < sizeof(master_t); wordOffset += 4)
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{
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status = HAL_FLASH_Program(FLASH_TYPEPROGRAM_WORD, (uint32_t)&__config_start + wordOffset, *(uint32_t *) ((char *) &masterConfig + wordOffset));
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if(status != HAL_OK)
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{
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break;
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}
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}
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}
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if (status == HAL_OK) {
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break;
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}
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}
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HAL_FLASH_Lock();
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// Flash write failed - just die now
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if (status != HAL_OK || !isEEPROMContentValid()) {
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failureMode(FAILURE_FLASH_WRITE_FAILED);
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}
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resumeRxSignal();
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}
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#else
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void writeEEPROM(void)
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{
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// Generate compile time error if the config does not fit in the reserved area of flash.
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@ -229,6 +295,7 @@ void writeEEPROM(void)
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resumeRxSignal();
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}
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#endif
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void readEEPROM(void)
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{
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@ -20,7 +20,7 @@
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#include "io_types.h"
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#include "rcc_types.h"
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#if defined(STM32F4)
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#if defined(STM32F4) || defined(STM32F7)
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#define ADC_TAG_MAP_COUNT 16
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#elif defined(STM32F3)
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#define ADC_TAG_MAP_COUNT 39
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@ -34,7 +34,7 @@ typedef enum ADCDevice {
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#if defined(STM32F3)
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ADCDEV_2,
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ADCDEV_MAX = ADCDEV_2,
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#elif defined(STM32F4)
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#elif defined(STM32F4) || defined(STM32F7)
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ADCDEV_2,
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ADCDEV_3,
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ADCDEV_MAX = ADCDEV_3,
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@ -52,7 +52,7 @@ typedef struct adcDevice_s {
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ADC_TypeDef* ADCx;
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rccPeriphTag_t rccADC;
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rccPeriphTag_t rccDMA;
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#if defined(STM32F4)
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#if defined(STM32F4) || defined(STM32F7)
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DMA_Stream_TypeDef* DMAy_Streamx;
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uint32_t channel;
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#else
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@ -33,7 +33,8 @@ typedef enum I2CDevice {
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I2CDEV_1 = 0,
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I2CDEV_2,
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I2CDEV_3,
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I2CDEV_MAX = I2CDEV_3,
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I2CDEV_4,
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I2CDEV_MAX = I2CDEV_4,
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} I2CDevice;
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typedef struct i2cDevice_s {
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@ -46,6 +47,9 @@ typedef struct i2cDevice_s {
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uint8_t ev_irq;
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uint8_t er_irq;
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#endif
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#if defined(STM32F7)
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uint8_t af;
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#endif
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} i2cDevice_t;
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typedef struct i2cState_s {
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@ -25,6 +25,11 @@
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#define SPI_IO_AF_SCK_CFG IO_CONFIG(GPIO_Mode_AF, GPIO_Speed_50MHz, GPIO_OType_PP, GPIO_PuPd_DOWN)
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#define SPI_IO_AF_MISO_CFG IO_CONFIG(GPIO_Mode_AF, GPIO_Speed_50MHz, GPIO_OType_PP, GPIO_PuPd_UP)
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#define SPI_IO_CS_CFG IO_CONFIG(GPIO_Mode_OUT, GPIO_Speed_50MHz, GPIO_OType_PP, GPIO_PuPd_NOPULL)
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#elif defined(STM32F7)
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#define SPI_IO_AF_CFG IO_CONFIG(GPIO_MODE_AF_PP, GPIO_SPEED_FREQ_VERY_HIGH, GPIO_NOPULL)
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#define SPI_IO_AF_SCK_CFG IO_CONFIG(GPIO_MODE_AF_PP, GPIO_SPEED_FREQ_VERY_HIGH, GPIO_PULLDOWN)
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#define SPI_IO_AF_MISO_CFG IO_CONFIG(GPIO_MODE_AF_PP, GPIO_SPEED_FREQ_VERY_HIGH, GPIO_PULLUP)
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#define SPI_IO_CS_CFG IO_CONFIG(GPIO_MODE_OUTPUT_PP, GPIO_SPEED_FREQ_VERY_HIGH, GPIO_NOPULL)
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#elif defined(STM32F1)
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#define SPI_IO_AF_SCK_CFG IO_CONFIG(GPIO_Mode_AF_PP, GPIO_Speed_50MHz)
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#define SPI_IO_AF_MOSI_CFG IO_CONFIG(GPIO_Mode_AF_PP, GPIO_Speed_50MHz)
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@ -42,6 +47,11 @@ typedef enum {
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SPI_CLOCK_STANDARD = 8, //10.50000 MHz
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SPI_CLOCK_FAST = 4, //21.00000 MHz
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SPI_CLOCK_ULTRAFAST = 2, //42.00000 MHz
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#elif defined(STM32F7)
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SPI_CLOCK_SLOW = 256, //00.42188 MHz
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SPI_CLOCK_STANDARD = 16, //06.57500 MHz
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SPI_CLOCK_FAST = 4, //27.00000 MHz
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SPI_CLOCK_ULTRAFAST = 2, //54.00000 MHz
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#else
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SPI_CLOCK_SLOW = 128, //00.56250 MHz
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SPI_CLOCK_STANDARD = 4, //09.00000 MHz
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@ -55,7 +65,8 @@ typedef enum SPIDevice {
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SPIDEV_1 = 0,
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SPIDEV_2,
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SPIDEV_3,
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SPIDEV_MAX = SPIDEV_3,
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SPIDEV_4,
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SPIDEV_MAX = SPIDEV_4,
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} SPIDevice;
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typedef struct SPIDevice_s {
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@ -69,6 +80,11 @@ typedef struct SPIDevice_s {
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volatile uint16_t errorCount;
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bool sdcard;
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bool nrf24l01;
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#if defined(STM32F7)
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SPI_HandleTypeDef hspi;
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DMA_HandleTypeDef hdma;
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uint8_t dmaIrqHandler;
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#endif
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} spiDevice_t;
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bool spiInit(SPIDevice device);
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@ -82,3 +98,7 @@ uint16_t spiGetErrorCounter(SPI_TypeDef *instance);
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void spiResetErrorCounter(SPI_TypeDef *instance);
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SPIDevice spiDeviceByInstance(SPI_TypeDef *instance);
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#if defined(USE_HAL_DRIVER)
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SPI_HandleTypeDef* spiHandleByInstance(SPI_TypeDef *instance);
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DMA_HandleTypeDef* spiSetDMATransmit(DMA_Stream_TypeDef *Stream, uint32_t Channel, SPI_TypeDef *Instance, uint8_t *pData, uint16_t Size);
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#endif
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@ -19,7 +19,7 @@
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struct dmaChannelDescriptor_s;
|
||||
typedef void (*dmaCallbackHandlerFuncPtr)(struct dmaChannelDescriptor_s *channelDescriptor);
|
||||
|
||||
#ifdef STM32F4
|
||||
#if defined(STM32F4) || defined(STM32F7)
|
||||
|
||||
typedef enum {
|
||||
DMA1_ST0_HANDLER = 0,
|
||||
|
|
@ -108,7 +108,7 @@ typedef struct dmaChannelDescriptor_s {
|
|||
|
||||
#endif
|
||||
|
||||
#ifdef STM32F4
|
||||
#if defined(STM32F4) || defined(STM32F7)
|
||||
dmaHandlerIdentifier_e dmaFindHandlerIdentifier(DMA_Stream_TypeDef* stream);
|
||||
#else
|
||||
dmaHandlerIdentifier_e dmaFindHandlerIdentifier(DMA_Channel_TypeDef* channel);
|
||||
|
|
|
|||
|
|
@ -23,7 +23,7 @@ extiChannelRec_t extiChannelRecs[16];
|
|||
static const uint8_t extiGroups[16] = { 0, 1, 2, 3, 4, 5, 5, 5, 5, 5, 6, 6, 6, 6, 6, 6 };
|
||||
static uint8_t extiGroupPriority[EXTI_IRQ_GROUPS];
|
||||
|
||||
#if defined(STM32F1) || defined(STM32F4)
|
||||
#if defined(STM32F1) || defined(STM32F4) || defined(STM32F7)
|
||||
static const uint8_t extiGroupIRQn[EXTI_IRQ_GROUPS] = {
|
||||
EXTI0_IRQn,
|
||||
EXTI1_IRQn,
|
||||
|
|
@ -67,6 +67,38 @@ void EXTIHandlerInit(extiCallbackRec_t *self, extiHandlerCallback *fn)
|
|||
self->fn = fn;
|
||||
}
|
||||
|
||||
#if defined(STM32F7)
|
||||
void EXTIConfig(IO_t io, extiCallbackRec_t *cb, int irqPriority, ioConfig_t config)
|
||||
{
|
||||
(void)config;
|
||||
int chIdx;
|
||||
chIdx = IO_GPIOPinIdx(io);
|
||||
if(chIdx < 0)
|
||||
return;
|
||||
extiChannelRec_t *rec = &extiChannelRecs[chIdx];
|
||||
int group = extiGroups[chIdx];
|
||||
|
||||
GPIO_InitTypeDef init = {
|
||||
.Pin = IO_Pin(io),
|
||||
.Mode = GPIO_MODE_IT_RISING,
|
||||
.Speed = GPIO_SPEED_FREQ_LOW,
|
||||
.Pull = GPIO_NOPULL,
|
||||
};
|
||||
HAL_GPIO_Init(IO_GPIO(io), &init);
|
||||
|
||||
rec->handler = cb;
|
||||
//uint32_t extiLine = IO_EXTI_Line(io);
|
||||
|
||||
//EXTI_ClearITPendingBit(extiLine);
|
||||
|
||||
if(extiGroupPriority[group] > irqPriority) {
|
||||
extiGroupPriority[group] = irqPriority;
|
||||
HAL_NVIC_SetPriority(extiGroupIRQn[group], NVIC_PRIORITY_BASE(irqPriority), NVIC_PRIORITY_SUB(irqPriority));
|
||||
HAL_NVIC_EnableIRQ(extiGroupIRQn[group]);
|
||||
}
|
||||
}
|
||||
#else
|
||||
|
||||
void EXTIConfig(IO_t io, extiCallbackRec_t *cb, int irqPriority, EXTITrigger_TypeDef trigger)
|
||||
{
|
||||
int chIdx;
|
||||
|
|
@ -112,6 +144,7 @@ void EXTIConfig(IO_t io, extiCallbackRec_t *cb, int irqPriority, EXTITrigger_Typ
|
|||
NVIC_Init(&NVIC_InitStructure);
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
void EXTIRelease(IO_t io)
|
||||
{
|
||||
|
|
@ -132,7 +165,7 @@ void EXTIRelease(IO_t io)
|
|||
|
||||
void EXTIEnable(IO_t io, bool enable)
|
||||
{
|
||||
#if defined(STM32F1) || defined(STM32F4)
|
||||
#if defined(STM32F1) || defined(STM32F4) || defined(STM32F7)
|
||||
uint32_t extiLine = IO_EXTI_Line(io);
|
||||
if(!extiLine)
|
||||
return;
|
||||
|
|
@ -177,7 +210,7 @@ void EXTI_IRQHandler(void)
|
|||
|
||||
_EXTI_IRQ_HANDLER(EXTI0_IRQHandler);
|
||||
_EXTI_IRQ_HANDLER(EXTI1_IRQHandler);
|
||||
#if defined(STM32F1)
|
||||
#if defined(STM32F1) || defined(STM32F7)
|
||||
_EXTI_IRQ_HANDLER(EXTI2_IRQHandler);
|
||||
#elif defined(STM32F3) || defined(STM32F4)
|
||||
_EXTI_IRQ_HANDLER(EXTI2_TS_IRQHandler);
|
||||
|
|
|
|||
|
|
@ -35,6 +35,10 @@ struct extiCallbackRec_s {
|
|||
void EXTIInit(void);
|
||||
|
||||
void EXTIHandlerInit(extiCallbackRec_t *cb, extiHandlerCallback *fn);
|
||||
#if defined(STM32F7)
|
||||
void EXTIConfig(IO_t io, extiCallbackRec_t *cb, int irqPriority, ioConfig_t config);
|
||||
#else
|
||||
void EXTIConfig(IO_t io, extiCallbackRec_t *cb, int irqPriority, EXTITrigger_TypeDef trigger);
|
||||
#endif
|
||||
void EXTIRelease(IO_t io);
|
||||
void EXTIEnable(IO_t io, bool enable);
|
||||
|
|
|
|||
|
|
@ -65,6 +65,22 @@ typedef enum
|
|||
} GPIO_Mode;
|
||||
#endif
|
||||
|
||||
#ifdef STM32F7
|
||||
typedef enum
|
||||
{
|
||||
Mode_AIN = (GPIO_NOPULL << 5) | GPIO_MODE_ANALOG,
|
||||
Mode_IN_FLOATING = (GPIO_NOPULL << 5) | GPIO_MODE_INPUT,
|
||||
Mode_IPD = (GPIO_PULLDOWN << 5) | GPIO_MODE_INPUT,
|
||||
Mode_IPU = (GPIO_PULLUP << 5) | GPIO_MODE_INPUT,
|
||||
Mode_Out_OD = GPIO_MODE_OUTPUT_OD,
|
||||
Mode_Out_PP = GPIO_MODE_OUTPUT_PP,
|
||||
Mode_AF_OD = GPIO_MODE_AF_OD,
|
||||
Mode_AF_PP = GPIO_MODE_AF_PP,
|
||||
Mode_AF_PP_PD = (GPIO_PULLDOWN << 5) | GPIO_MODE_AF_PP,
|
||||
Mode_AF_PP_PU = (GPIO_PULLUP << 5) | GPIO_MODE_AF_PP
|
||||
} GPIO_Mode;
|
||||
#endif
|
||||
|
||||
typedef enum
|
||||
{
|
||||
Speed_10MHz = 1,
|
||||
|
|
@ -101,7 +117,13 @@ typedef struct
|
|||
} gpio_config_t;
|
||||
|
||||
#ifndef UNIT_TEST
|
||||
#ifdef STM32F4
|
||||
#if defined(USE_HAL_DRIVER)
|
||||
static inline void digitalHi(GPIO_TypeDef *p, uint16_t i) { HAL_GPIO_WritePin(p,i,GPIO_PIN_SET); }
|
||||
static inline void digitalLo(GPIO_TypeDef *p, uint16_t i) { HAL_GPIO_WritePin(p,i,GPIO_PIN_RESET); }
|
||||
static inline void digitalToggle(GPIO_TypeDef *p, uint16_t i) { HAL_GPIO_TogglePin(p,i); }
|
||||
static inline uint16_t digitalIn(GPIO_TypeDef *p, uint16_t i) { return HAL_GPIO_ReadPin(p,i); }
|
||||
#else
|
||||
#if defined(STM32F4)
|
||||
static inline void digitalHi(GPIO_TypeDef *p, uint16_t i) { p->BSRRL = i; }
|
||||
static inline void digitalLo(GPIO_TypeDef *p, uint16_t i) { p->BSRRH = i; }
|
||||
#else
|
||||
|
|
@ -111,6 +133,7 @@ static inline void digitalLo(GPIO_TypeDef *p, uint16_t i) { p->BRR = i; }
|
|||
static inline void digitalToggle(GPIO_TypeDef *p, uint16_t i) { p->ODR ^= i; }
|
||||
static inline uint16_t digitalIn(GPIO_TypeDef *p, uint16_t i) { return p->IDR & i; }
|
||||
#endif
|
||||
#endif
|
||||
|
||||
|
||||
void gpioInit(GPIO_TypeDef *gpio, gpio_config_t *config);
|
||||
|
|
|
|||
|
|
@ -53,6 +53,15 @@ const struct ioPortDef_s ioPortDefs[] = {
|
|||
{ RCC_AHB1(GPIOE) },
|
||||
{ RCC_AHB1(GPIOF) },
|
||||
};
|
||||
#elif defined(STM32F7)
|
||||
const struct ioPortDef_s ioPortDefs[] = {
|
||||
{ RCC_AHB1(GPIOA) },
|
||||
{ RCC_AHB1(GPIOB) },
|
||||
{ RCC_AHB1(GPIOC) },
|
||||
{ RCC_AHB1(GPIOD) },
|
||||
{ RCC_AHB1(GPIOE) },
|
||||
{ RCC_AHB1(GPIOF) },
|
||||
};
|
||||
# endif
|
||||
|
||||
const char * const ownerNames[OWNER_TOTAL_COUNT] = {
|
||||
|
|
@ -137,6 +146,8 @@ uint32_t IO_EXTI_Line(IO_t io)
|
|||
return IO_GPIOPinIdx(io);
|
||||
#elif defined(STM32F4)
|
||||
return 1 << IO_GPIOPinIdx(io);
|
||||
#elif defined(STM32F7)
|
||||
return 1 << IO_GPIOPinIdx(io);
|
||||
#else
|
||||
# error "Unknown target type"
|
||||
#endif
|
||||
|
|
@ -146,14 +157,25 @@ bool IORead(IO_t io)
|
|||
{
|
||||
if (!io)
|
||||
return false;
|
||||
#if defined(USE_HAL_DRIVER)
|
||||
return !! HAL_GPIO_ReadPin(IO_GPIO(io),IO_Pin(io));
|
||||
#else
|
||||
return !! (IO_GPIO(io)->IDR & IO_Pin(io));
|
||||
#endif
|
||||
}
|
||||
|
||||
void IOWrite(IO_t io, bool hi)
|
||||
{
|
||||
if (!io)
|
||||
return;
|
||||
#ifdef STM32F4
|
||||
#if defined(USE_HAL_DRIVER)
|
||||
if (hi) {
|
||||
HAL_GPIO_WritePin(IO_GPIO(io),IO_Pin(io),GPIO_PIN_SET);
|
||||
}
|
||||
else {
|
||||
HAL_GPIO_WritePin(IO_GPIO(io),IO_Pin(io),GPIO_PIN_RESET);
|
||||
}
|
||||
#elif defined(STM32F4)
|
||||
if (hi) {
|
||||
IO_GPIO(io)->BSRRL = IO_Pin(io);
|
||||
}
|
||||
|
|
@ -169,7 +191,9 @@ void IOHi(IO_t io)
|
|||
{
|
||||
if (!io)
|
||||
return;
|
||||
#ifdef STM32F4
|
||||
#if defined(USE_HAL_DRIVER)
|
||||
HAL_GPIO_WritePin(IO_GPIO(io),IO_Pin(io),GPIO_PIN_SET);
|
||||
#elif defined(STM32F4)
|
||||
IO_GPIO(io)->BSRRL = IO_Pin(io);
|
||||
#else
|
||||
IO_GPIO(io)->BSRR = IO_Pin(io);
|
||||
|
|
@ -180,7 +204,9 @@ void IOLo(IO_t io)
|
|||
{
|
||||
if (!io)
|
||||
return;
|
||||
#ifdef STM32F4
|
||||
#if defined(USE_HAL_DRIVER)
|
||||
HAL_GPIO_WritePin(IO_GPIO(io),IO_Pin(io),GPIO_PIN_RESET);
|
||||
#elif defined(STM32F4)
|
||||
IO_GPIO(io)->BSRRH = IO_Pin(io);
|
||||
#else
|
||||
IO_GPIO(io)->BRR = IO_Pin(io);
|
||||
|
|
@ -195,7 +221,10 @@ void IOToggle(IO_t io)
|
|||
// Read pin state from ODR but write to BSRR because it only changes the pins
|
||||
// high in the mask value rather than all pins. XORing ODR directly risks
|
||||
// setting other pins incorrectly because it change all pins' state.
|
||||
#ifdef STM32F4
|
||||
#if defined(USE_HAL_DRIVER)
|
||||
(void)mask;
|
||||
HAL_GPIO_TogglePin(IO_GPIO(io),IO_Pin(io));
|
||||
#elif defined(STM32F4)
|
||||
if (IO_GPIO(io)->ODR & mask) {
|
||||
IO_GPIO(io)->BSRRH = mask;
|
||||
} else {
|
||||
|
|
@ -253,6 +282,40 @@ void IOConfigGPIO(IO_t io, ioConfig_t cfg)
|
|||
GPIO_Init(IO_GPIO(io), &init);
|
||||
}
|
||||
|
||||
#elif defined(STM32F7)
|
||||
|
||||
void IOConfigGPIO(IO_t io, ioConfig_t cfg)
|
||||
{
|
||||
if (!io)
|
||||
return;
|
||||
rccPeriphTag_t rcc = ioPortDefs[IO_GPIOPortIdx(io)].rcc;
|
||||
RCC_ClockCmd(rcc, ENABLE);
|
||||
|
||||
GPIO_InitTypeDef init = {
|
||||
.Pin = IO_Pin(io),
|
||||
.Mode = (cfg >> 0) & 0x13,
|
||||
.Speed = (cfg >> 2) & 0x03,
|
||||
.Pull = (cfg >> 5) & 0x03,
|
||||
};
|
||||
HAL_GPIO_Init(IO_GPIO(io), &init);
|
||||
}
|
||||
|
||||
void IOConfigGPIOAF(IO_t io, ioConfig_t cfg, uint8_t af)
|
||||
{
|
||||
if (!io)
|
||||
return;
|
||||
rccPeriphTag_t rcc = ioPortDefs[IO_GPIOPortIdx(io)].rcc;
|
||||
RCC_ClockCmd(rcc, ENABLE);
|
||||
|
||||
GPIO_InitTypeDef init = {
|
||||
.Pin = IO_Pin(io),
|
||||
.Mode = (cfg >> 0) & 0x13,
|
||||
.Speed = (cfg >> 2) & 0x03,
|
||||
.Pull = (cfg >> 5) & 0x03,
|
||||
.Alternate = af
|
||||
};
|
||||
HAL_GPIO_Init(IO_GPIO(io), &init);
|
||||
}
|
||||
#elif defined(STM32F3) || defined(STM32F4)
|
||||
|
||||
void IOConfigGPIO(IO_t io, ioConfig_t cfg)
|
||||
|
|
|
|||
|
|
@ -28,6 +28,23 @@
|
|||
#define IOCFG_IPU IO_CONFIG(GPIO_Mode_IPU, GPIO_Speed_2MHz)
|
||||
#define IOCFG_IN_FLOATING IO_CONFIG(GPIO_Mode_IN_FLOATING, GPIO_Speed_2MHz)
|
||||
|
||||
#elif defined(STM32F7)
|
||||
|
||||
//speed is packed inside modebits 5 and 2,
|
||||
#define IO_CONFIG(mode, speed, pupd) ((mode) | ((speed) << 2) | ((pupd) << 5))
|
||||
|
||||
#define IOCFG_OUT_PP IO_CONFIG(GPIO_MODE_OUTPUT_PP, GPIO_SPEED_FREQ_LOW, GPIO_NOPULL)
|
||||
#define IOCFG_OUT_PP_25 IO_CONFIG(GPIO_MODE_OUTPUT_PP, GPIO_SPEED_FREQ_HIGH, GPIO_NOPULL)
|
||||
#define IOCFG_OUT_OD IO_CONFIG(GPIO_MODE_OUTPUT_OD, GPIO_SPEED_FREQ_LOW, GPIO_NOPULL)
|
||||
#define IOCFG_AF_PP IO_CONFIG(GPIO_MODE_AF_PP, GPIO_SPEED_FREQ_LOW, GPIO_NOPULL)
|
||||
#define IOCFG_AF_PP_PD IO_CONFIG(GPIO_MODE_AF_PP, GPIO_SPEED_FREQ_LOW, GPIO_PULLDOWN)
|
||||
#define IOCFG_AF_PP_UP IO_CONFIG(GPIO_MODE_AF_PP, GPIO_SPEED_FREQ_LOW, GPIO_PULLUP)
|
||||
#define IOCFG_AF_OD IO_CONFIG(GPIO_MODE_AF_OD, GPIO_SPEED_FREQ_LOW, GPIO_NOPULL)
|
||||
#define IOCFG_IPD IO_CONFIG(GPIO_MODE_INPUT, GPIO_SPEED_FREQ_LOW, GPIO_PULLDOWN)
|
||||
#define IOCFG_IPU IO_CONFIG(GPIO_MODE_INPUT, GPIO_SPEED_FREQ_LOW, GPIO_PULLUP)
|
||||
#define IOCFG_IN_FLOATING IO_CONFIG(GPIO_MODE_INPUT, GPIO_SPEED_FREQ_LOW, GPIO_NOPULL)
|
||||
#define IOCFG_IPU_25 IO_CONFIG(GPIO_MODE_INPUT, GPIO_SPEED_FREQ_HIGH, GPIO_PULLUP)
|
||||
|
||||
#elif defined(STM32F3) || defined(STM32F4)
|
||||
|
||||
#define IO_CONFIG(mode, speed, otype, pupd) ((mode) | ((speed) << 2) | ((otype) << 4) | ((pupd) << 5))
|
||||
|
|
@ -74,7 +91,7 @@ resourceType_t IOGetResources(IO_t io);
|
|||
IO_t IOGetByTag(ioTag_t tag);
|
||||
|
||||
void IOConfigGPIO(IO_t io, ioConfig_t cfg);
|
||||
#if defined(STM32F3) || defined(STM32F4)
|
||||
#if defined(STM32F3) || defined(STM32F4) || defined(STM32F7)
|
||||
void IOConfigGPIOAF(IO_t io, ioConfig_t cfg, uint8_t af);
|
||||
#endif
|
||||
|
||||
|
|
|
|||
|
|
@ -39,7 +39,11 @@
|
|||
#include "dma.h"
|
||||
#include "light_ws2811strip.h"
|
||||
|
||||
#if defined(STM32F4) || defined(STM32F7)
|
||||
uint32_t ledStripDMABuffer[WS2811_DMA_BUFFER_SIZE];
|
||||
#else
|
||||
uint8_t ledStripDMABuffer[WS2811_DMA_BUFFER_SIZE];
|
||||
#endif
|
||||
volatile uint8_t ws2811LedDataTransferInProgress = 0;
|
||||
|
||||
static hsvColor_t ledColorBuffer[WS2811_LED_STRIP_LENGTH];
|
||||
|
|
|
|||
|
|
@ -28,6 +28,9 @@
|
|||
#if defined(STM32F40_41xxx)
|
||||
#define BIT_COMPARE_1 67 // timer compare value for logical 1
|
||||
#define BIT_COMPARE_0 33 // timer compare value for logical 0
|
||||
#elif defined(STM32F7)
|
||||
#define BIT_COMPARE_1 76 // timer compare value for logical 1
|
||||
#define BIT_COMPARE_0 38 // timer compare value for logical 0
|
||||
#else
|
||||
#define BIT_COMPARE_1 17 // timer compare value for logical 1
|
||||
#define BIT_COMPARE_0 9 // timer compare value for logical 0
|
||||
|
|
@ -51,5 +54,9 @@ void setStripColors(const hsvColor_t *colors);
|
|||
|
||||
bool isWS2811LedStripReady(void);
|
||||
|
||||
#if defined(STM32F4) || defined(STM32F7)
|
||||
extern uint32_t ledStripDMABuffer[WS2811_DMA_BUFFER_SIZE];
|
||||
#else
|
||||
extern uint8_t ledStripDMABuffer[WS2811_DMA_BUFFER_SIZE];
|
||||
#endif
|
||||
extern volatile uint8_t ws2811LedDataTransferInProgress;
|
||||
|
|
|
|||
|
|
@ -1,7 +1,6 @@
|
|||
|
||||
#pragma once
|
||||
|
||||
#define NVIC_PRIORITY_GROUPING NVIC_PriorityGroup_2
|
||||
|
||||
// can't use 0
|
||||
#define NVIC_PRIO_MAX NVIC_BUILD_PRIORITY(0, 1)
|
||||
|
|
@ -30,6 +29,12 @@
|
|||
#define NVIC_PRIO_SERIALUART6_TXDMA NVIC_BUILD_PRIORITY(1, 0)
|
||||
#define NVIC_PRIO_SERIALUART6_RXDMA NVIC_BUILD_PRIORITY(1, 1)
|
||||
#define NVIC_PRIO_SERIALUART6 NVIC_BUILD_PRIORITY(1, 2)
|
||||
#define NVIC_PRIO_SERIALUART7_TXDMA NVIC_BUILD_PRIORITY(1, 0)
|
||||
#define NVIC_PRIO_SERIALUART7_RXDMA NVIC_BUILD_PRIORITY(1, 1)
|
||||
#define NVIC_PRIO_SERIALUART7 NVIC_BUILD_PRIORITY(1, 2)
|
||||
#define NVIC_PRIO_SERIALUART8_TXDMA NVIC_BUILD_PRIORITY(1, 0)
|
||||
#define NVIC_PRIO_SERIALUART8_RXDMA NVIC_BUILD_PRIORITY(1, 1)
|
||||
#define NVIC_PRIO_SERIALUART8 NVIC_BUILD_PRIORITY(1, 2)
|
||||
#define NVIC_PRIO_I2C_ER NVIC_BUILD_PRIORITY(0, 0)
|
||||
#define NVIC_PRIO_I2C_EV NVIC_BUILD_PRIORITY(0, 0)
|
||||
#define NVIC_PRIO_USB NVIC_BUILD_PRIORITY(2, 0)
|
||||
|
|
@ -40,7 +45,16 @@
|
|||
#define NVIC_PRIO_CALLBACK NVIC_BUILD_PRIORITY(0x0f, 0x0f)
|
||||
#define NVIC_PRIO_MAX7456_DMA NVIC_BUILD_PRIORITY(3, 0)
|
||||
|
||||
#ifdef USE_HAL_DRIVER
|
||||
// utility macros to join/split priority
|
||||
#define NVIC_PRIORITY_GROUPING NVIC_PRIORITYGROUP_2
|
||||
#define NVIC_BUILD_PRIORITY(base,sub) (((((base)<<(4-(7-(NVIC_PRIORITY_GROUPING))))|((sub)&(0x0f>>(7-(NVIC_PRIORITY_GROUPING)))))<<4)&0xf0)
|
||||
#define NVIC_PRIORITY_BASE(prio) (((prio)>>(4-(7-(NVIC_PRIORITY_GROUPING))))>>4)
|
||||
#define NVIC_PRIORITY_SUB(prio) (((prio)&(0x0f>>(7-(NVIC_PRIORITY_GROUPING))))>>4)
|
||||
#else
|
||||
// utility macros to join/split priority
|
||||
#define NVIC_PRIORITY_GROUPING NVIC_PriorityGroup_2
|
||||
#define NVIC_BUILD_PRIORITY(base,sub) (((((base)<<(4-(7-(NVIC_PRIORITY_GROUPING>>8))))|((sub)&(0x0f>>(7-(NVIC_PRIORITY_GROUPING>>8)))))<<4)&0xf0)
|
||||
#define NVIC_PRIORITY_BASE(prio) (((prio)>>(4-(7-(NVIC_PRIORITY_GROUPING>>8))))>>4)
|
||||
#define NVIC_PRIORITY_SUB(prio) (((prio)&(0x0f>>(7-(NVIC_PRIORITY_GROUPING>>8))))>>4)
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -140,6 +140,13 @@ pwmIOConfiguration_t *pwmInit(drv_pwm_config_t *init)
|
|||
}
|
||||
#endif
|
||||
|
||||
#if defined(UART6_TX_PIN) || defined(UART6_RX_PIN)
|
||||
if (init->useUART6 && (timerHardwarePtr->tag == IO_TAG(UART6_TX_PIN) || timerHardwarePtr->tag == IO_TAG(UART6_RX_PIN))) {
|
||||
addBootlogEvent6(BOOT_EVENT_TIMER_CH_SKIPPED, BOOT_EVENT_FLAGS_WARNING, i, pwmIOConfiguration.motorCount, pwmIOConfiguration.servoCount, 3);
|
||||
continue;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef SOFTSERIAL_1_TIMER
|
||||
if (init->useSoftSerial && timerHardwarePtr->tim == SOFTSERIAL_1_TIMER) {
|
||||
addBootlogEvent6(BOOT_EVENT_TIMER_CH_SKIPPED, BOOT_EVENT_FLAGS_WARNING, i, pwmIOConfiguration.motorCount, pwmIOConfiguration.servoCount, 3);
|
||||
|
|
|
|||
|
|
@ -323,7 +323,11 @@ static void pwmEdgeCallback(timerCCHandlerRec_t *cbRec, captureCompare_t capture
|
|||
if (pwmInputPort->state == 0) {
|
||||
pwmInputPort->rise = capture;
|
||||
pwmInputPort->state = 1;
|
||||
#if defined(USE_HAL_DRIVER)
|
||||
pwmICConfig(timerHardwarePtr->tim, timerHardwarePtr->channel, TIM_ICPOLARITY_FALLING);
|
||||
#else
|
||||
pwmICConfig(timerHardwarePtr->tim, timerHardwarePtr->channel, TIM_ICPolarity_Falling);
|
||||
#endif
|
||||
} else {
|
||||
pwmInputPort->fall = capture;
|
||||
|
||||
|
|
@ -333,11 +337,37 @@ static void pwmEdgeCallback(timerCCHandlerRec_t *cbRec, captureCompare_t capture
|
|||
|
||||
// switch state
|
||||
pwmInputPort->state = 0;
|
||||
#if defined(USE_HAL_DRIVER)
|
||||
pwmICConfig(timerHardwarePtr->tim, timerHardwarePtr->channel, TIM_ICPOLARITY_RISING);
|
||||
#else
|
||||
pwmICConfig(timerHardwarePtr->tim, timerHardwarePtr->channel, TIM_ICPolarity_Rising);
|
||||
#endif
|
||||
pwmInputPort->missedEvents = 0;
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef USE_HAL_DRIVER
|
||||
|
||||
void pwmICConfig(TIM_TypeDef *tim, uint8_t channel, uint16_t polarity)
|
||||
{
|
||||
TIM_HandleTypeDef* Handle = timerFindTimerHandle(tim);
|
||||
if(Handle == NULL) return;
|
||||
|
||||
TIM_IC_InitTypeDef TIM_ICInitStructure;
|
||||
|
||||
TIM_ICInitStructure.ICPolarity = polarity;
|
||||
TIM_ICInitStructure.ICSelection = TIM_ICSELECTION_DIRECTTI;
|
||||
TIM_ICInitStructure.ICPrescaler = TIM_ICPSC_DIV1;
|
||||
|
||||
if (inputFilteringMode == INPUT_FILTERING_ENABLED) {
|
||||
TIM_ICInitStructure.ICFilter = INPUT_FILTER_TO_HELP_WITH_NOISE_FROM_OPENLRS_TELEMETRY_RX;
|
||||
} else {
|
||||
TIM_ICInitStructure.ICFilter = 0x00;
|
||||
}
|
||||
|
||||
HAL_TIM_IC_ConfigChannel(Handle, &TIM_ICInitStructure, channel);
|
||||
}
|
||||
#else
|
||||
void pwmICConfig(TIM_TypeDef *tim, uint8_t channel, uint16_t polarity)
|
||||
{
|
||||
TIM_ICInitTypeDef TIM_ICInitStructure;
|
||||
|
|
@ -357,6 +387,9 @@ void pwmICConfig(TIM_TypeDef *tim, uint8_t channel, uint16_t polarity)
|
|||
TIM_ICInit(tim, &TIM_ICInitStructure);
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
void pwmInConfig(const timerHardware_t *timerHardwarePtr, uint8_t channel)
|
||||
{
|
||||
pwmInputPort_t *self = &pwmInputPorts[channel];
|
||||
|
|
@ -371,8 +404,11 @@ void pwmInConfig(const timerHardware_t *timerHardwarePtr, uint8_t channel)
|
|||
IOInit(io, OWNER_PWMINPUT, RESOURCE_INPUT, RESOURCE_INDEX(channel));
|
||||
IOConfigGPIO(io, timerHardwarePtr->ioMode);
|
||||
|
||||
#if defined(USE_HAL_DRIVER)
|
||||
pwmICConfig(timerHardwarePtr->tim, timerHardwarePtr->channel, TIM_ICPOLARITY_RISING);
|
||||
#else
|
||||
pwmICConfig(timerHardwarePtr->tim, timerHardwarePtr->channel, TIM_ICPolarity_Rising);
|
||||
|
||||
#endif
|
||||
timerConfigure(timerHardwarePtr, (uint16_t)PWM_TIMER_PERIOD, PWM_TIMER_MHZ);
|
||||
|
||||
timerChCCHandlerInit(&self->edgeCb, pwmEdgeCallback);
|
||||
|
|
@ -403,7 +439,11 @@ void ppmInConfig(const timerHardware_t *timerHardwarePtr)
|
|||
IOInit(io, OWNER_PPMINPUT, RESOURCE_INPUT, 0);
|
||||
IOConfigGPIO(io, timerHardwarePtr->ioMode);
|
||||
|
||||
#if defined(USE_HAL_DRIVER)
|
||||
pwmICConfig(timerHardwarePtr->tim, timerHardwarePtr->channel, TIM_ICPOLARITY_RISING);
|
||||
#else
|
||||
pwmICConfig(timerHardwarePtr->tim, timerHardwarePtr->channel, TIM_ICPolarity_Rising);
|
||||
#endif
|
||||
|
||||
timerConfigure(timerHardwarePtr, (uint16_t)PPM_TIMER_PERIOD, PWM_TIMER_MHZ);
|
||||
|
||||
|
|
|
|||
|
|
@ -6,6 +6,11 @@ void RCC_ClockCmd(rccPeriphTag_t periphTag, FunctionalState NewState)
|
|||
{
|
||||
int tag = periphTag >> 5;
|
||||
uint32_t mask = 1 << (periphTag & 0x1f);
|
||||
#if defined(USE_HAL_DRIVER)
|
||||
(void)tag;
|
||||
(void)mask;
|
||||
(void)NewState;
|
||||
#else
|
||||
switch (tag) {
|
||||
#if defined(STM32F3) || defined(STM32F1)
|
||||
case RCC_AHB:
|
||||
|
|
@ -24,12 +29,18 @@ void RCC_ClockCmd(rccPeriphTag_t periphTag, FunctionalState NewState)
|
|||
break;
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
void RCC_ResetCmd(rccPeriphTag_t periphTag, FunctionalState NewState)
|
||||
{
|
||||
int tag = periphTag >> 5;
|
||||
uint32_t mask = 1 << (periphTag & 0x1f);
|
||||
#if defined(USE_HAL_DRIVER)
|
||||
(void)tag;
|
||||
(void)mask;
|
||||
(void)NewState;
|
||||
#else
|
||||
switch (tag) {
|
||||
#if defined(STM32F3) || defined(STM32F10X_CL)
|
||||
case RCC_AHB:
|
||||
|
|
@ -48,4 +59,5 @@ void RCC_ResetCmd(rccPeriphTag_t periphTag, FunctionalState NewState)
|
|||
break;
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
|
|
|||
|
|
@ -111,6 +111,9 @@ static sdcard_t sdcard;
|
|||
|
||||
#ifdef SDCARD_DMA_CHANNEL_TX
|
||||
static bool useDMAForTx;
|
||||
#if defined(USE_HAL_DRIVER)
|
||||
DMA_HandleTypeDef *sdDMAHandle;
|
||||
#endif
|
||||
#else
|
||||
// DMA channel not available so we can hard-code this to allow the non-DMA paths to be stripped by optimization
|
||||
static const bool useDMAForTx = false;
|
||||
|
|
@ -416,6 +419,9 @@ static void sdcard_sendDataBlockBegin(uint8_t *buffer, bool multiBlockWrite)
|
|||
|
||||
if (useDMAForTx) {
|
||||
#ifdef SDCARD_DMA_CHANNEL_TX
|
||||
#if defined(USE_HAL_DRIVER)
|
||||
sdDMAHandle = spiSetDMATransmit(SDCARD_DMA_CHANNEL_TX, SDCARD_DMA_CHANNEL, SDCARD_SPI_INSTANCE, buffer, SDCARD_BLOCK_SIZE);
|
||||
#else
|
||||
// Queue the transmission of the sector payload
|
||||
DMA_InitTypeDef DMA_InitStructure;
|
||||
|
||||
|
|
@ -446,6 +452,7 @@ static void sdcard_sendDataBlockBegin(uint8_t *buffer, bool multiBlockWrite)
|
|||
DMA_Cmd(SDCARD_DMA_CHANNEL_TX, ENABLE);
|
||||
|
||||
SPI_I2S_DMACmd(SDCARD_SPI_INSTANCE, SPI_I2S_DMAReq_Tx, ENABLE);
|
||||
#endif
|
||||
#endif
|
||||
}
|
||||
else {
|
||||
|
|
@ -544,8 +551,10 @@ void sdcard_init(bool useDMA)
|
|||
{
|
||||
#ifdef SDCARD_DMA_CHANNEL_TX
|
||||
useDMAForTx = useDMA;
|
||||
#if !defined(USE_HAL_DRIVER)
|
||||
dmaEnableClock(dmaFindHandlerIdentifier(SDCARD_DMA_CHANNEL_TX));
|
||||
DMA_Cmd(SDCARD_DMA_CHANNEL_TX, DISABLE);
|
||||
#endif
|
||||
#else
|
||||
// DMA is not available
|
||||
(void) useDMA;
|
||||
|
|
@ -731,6 +740,28 @@ bool sdcard_poll(void)
|
|||
sendComplete = false;
|
||||
|
||||
#ifdef SDCARD_DMA_CHANNEL_TX
|
||||
#if defined(USE_HAL_DRIVER)
|
||||
//if (useDMAForTx && __HAL_DMA_GET_FLAG(sdDMAHandle, SDCARD_DMA_CHANNEL_TX_COMPLETE_FLAG) == SET) {
|
||||
//if (useDMAForTx && HAL_DMA_PollForTransfer(sdDMAHandle, HAL_DMA_FULL_TRANSFER, HAL_MAX_DELAY) == HAL_OK) {
|
||||
if (useDMAForTx && (sdDMAHandle->State == HAL_DMA_STATE_READY)) {
|
||||
//__HAL_DMA_CLEAR_FLAG(sdDMAHandle, SDCARD_DMA_CHANNEL_TX_COMPLETE_FLAG);
|
||||
|
||||
//__HAL_DMA_DISABLE(sdDMAHandle);
|
||||
|
||||
// Drain anything left in the Rx FIFO (we didn't read it during the write)
|
||||
while (__HAL_SPI_GET_FLAG(spiHandleByInstance(SDCARD_SPI_INSTANCE), SPI_FLAG_RXNE) == SET) {
|
||||
SDCARD_SPI_INSTANCE->DR;
|
||||
}
|
||||
|
||||
// Wait for the final bit to be transmitted
|
||||
while (spiIsBusBusy(SDCARD_SPI_INSTANCE)) {
|
||||
}
|
||||
|
||||
HAL_SPI_DMAStop(spiHandleByInstance(SDCARD_SPI_INSTANCE));
|
||||
|
||||
sendComplete = true;
|
||||
}
|
||||
#else
|
||||
#ifdef SDCARD_DMA_CHANNEL
|
||||
if (useDMAForTx && DMA_GetFlagStatus(SDCARD_DMA_CHANNEL_TX, SDCARD_DMA_CHANNEL_TX_COMPLETE_FLAG) == SET) {
|
||||
DMA_ClearFlag(SDCARD_DMA_CHANNEL_TX, SDCARD_DMA_CHANNEL_TX_COMPLETE_FLAG);
|
||||
|
|
@ -754,6 +785,7 @@ bool sdcard_poll(void)
|
|||
|
||||
sendComplete = true;
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
if (!useDMAForTx) {
|
||||
// Send another chunk
|
||||
|
|
|
|||
|
|
@ -35,11 +35,19 @@
|
|||
#define UART5_TX_BUFFER_SIZE 256
|
||||
#define UART6_RX_BUFFER_SIZE 256
|
||||
#define UART6_TX_BUFFER_SIZE 256
|
||||
#define UART7_RX_BUFFER_SIZE 256
|
||||
#define UART7_TX_BUFFER_SIZE 256
|
||||
#define UART8_RX_BUFFER_SIZE 256
|
||||
#define UART8_TX_BUFFER_SIZE 256
|
||||
|
||||
typedef struct {
|
||||
serialPort_t port;
|
||||
|
||||
#ifdef STM32F4
|
||||
#if defined(STM32F7)
|
||||
DMA_HandleTypeDef rxDMAHandle;
|
||||
DMA_HandleTypeDef txDMAHandle;
|
||||
#endif
|
||||
#if defined(STM32F4) || defined(STM32F7)
|
||||
DMA_Stream_TypeDef *rxDMAStream;
|
||||
DMA_Stream_TypeDef *txDMAStream;
|
||||
uint32_t rxDMAChannel;
|
||||
|
|
@ -48,7 +56,6 @@ typedef struct {
|
|||
DMA_Channel_TypeDef *rxDMAChannel;
|
||||
DMA_Channel_TypeDef *txDMAChannel;
|
||||
#endif
|
||||
|
||||
uint32_t rxDMAIrq;
|
||||
uint32_t txDMAIrq;
|
||||
|
||||
|
|
@ -58,6 +65,10 @@ typedef struct {
|
|||
uint32_t txDMAPeripheralBaseAddr;
|
||||
uint32_t rxDMAPeripheralBaseAddr;
|
||||
|
||||
#ifdef USE_HAL_DRIVER
|
||||
// All USARTs can also be used as UART, and we use them only as UART.
|
||||
UART_HandleTypeDef Handle;
|
||||
#endif
|
||||
USART_TypeDef *USARTx;
|
||||
} uartPort_t;
|
||||
|
||||
|
|
|
|||
|
|
@ -29,4 +29,6 @@ uartPort_t *serialUART3(uint32_t baudRate, portMode_t mode, portOptions_t option
|
|||
uartPort_t *serialUART4(uint32_t baudRate, portMode_t mode, portOptions_t options);
|
||||
uartPort_t *serialUART5(uint32_t baudRate, portMode_t mode, portOptions_t options);
|
||||
uartPort_t *serialUART6(uint32_t baudRate, portMode_t mode, portOptions_t options);
|
||||
uartPort_t *serialUART7(uint32_t baudRate, portMode_t mode, portOptions_t options);
|
||||
uartPort_t *serialUART8(uint32_t baudRate, portMode_t mode, portOptions_t options);
|
||||
|
||||
|
|
|
|||
|
|
@ -56,9 +56,13 @@ uint32_t cachedRccCsrValue;
|
|||
|
||||
void cycleCounterInit(void)
|
||||
{
|
||||
#if defined(USE_HAL_DRIVER)
|
||||
usTicks = HAL_RCC_GetSysClockFreq() / 1000000;
|
||||
#else
|
||||
RCC_ClocksTypeDef clocks;
|
||||
RCC_GetClocksFreq(&clocks);
|
||||
usTicks = clocks.SYSCLK_Frequency / 1000000;
|
||||
#endif
|
||||
}
|
||||
|
||||
// SysTick
|
||||
|
|
@ -72,6 +76,10 @@ void SysTick_Handler(void)
|
|||
sysTickPending = 0;
|
||||
(void)(SysTick->CTRL);
|
||||
}
|
||||
#ifdef USE_HAL_DRIVER
|
||||
// used by the HAL for some timekeeping and timeouts, should always be 1ms
|
||||
HAL_IncTick();
|
||||
#endif
|
||||
}
|
||||
|
||||
// Return system uptime in microseconds (rollover in 70minutes)
|
||||
|
|
|
|||
|
|
@ -30,6 +30,11 @@ typedef uint32_t timCCR_t;
|
|||
typedef uint32_t timCCER_t;
|
||||
typedef uint32_t timSR_t;
|
||||
typedef uint32_t timCNT_t;
|
||||
#elif defined(STM32F7)
|
||||
typedef uint32_t timCCR_t;
|
||||
typedef uint32_t timCCER_t;
|
||||
typedef uint32_t timSR_t;
|
||||
typedef uint32_t timCNT_t;
|
||||
#elif defined(STM32F3)
|
||||
typedef uint32_t timCCR_t;
|
||||
typedef uint32_t timCCER_t;
|
||||
|
|
@ -68,7 +73,7 @@ typedef struct timerOvrHandlerRec_s {
|
|||
typedef struct timerDef_s {
|
||||
TIM_TypeDef *TIMx;
|
||||
rccPeriphTag_t rcc;
|
||||
#if defined(STM32F3) || defined(STM32F4)
|
||||
#if defined(STM32F3) || defined(STM32F4) || defined(STM32F7)
|
||||
uint8_t alternateFunction;
|
||||
#endif
|
||||
} timerDef_t;
|
||||
|
|
@ -80,7 +85,7 @@ typedef struct timerHardware_s {
|
|||
uint8_t irq;
|
||||
uint8_t output;
|
||||
ioConfig_t ioMode;
|
||||
#if defined(STM32F3) || defined(STM32F4)
|
||||
#if defined(STM32F3) || defined(STM32F4) || defined(STM32F7)
|
||||
uint8_t alternateFunction;
|
||||
#endif
|
||||
} timerHardware_t;
|
||||
|
|
@ -103,6 +108,8 @@ enum {
|
|||
#define HARDWARE_TIMER_DEFINITION_COUNT 10
|
||||
#elif defined(STM32F4)
|
||||
#define HARDWARE_TIMER_DEFINITION_COUNT 14
|
||||
#elif defined(STM32F7)
|
||||
#define HARDWARE_TIMER_DEFINITION_COUNT 14
|
||||
#endif
|
||||
|
||||
|
||||
|
|
@ -156,6 +163,10 @@ void configTimeBase(TIM_TypeDef *tim, uint16_t period, uint8_t mhz); // TODO -
|
|||
|
||||
rccPeriphTag_t timerRCC(TIM_TypeDef *tim);
|
||||
|
||||
#if defined(STM32F3) || defined(STM32F4)
|
||||
#if defined(STM32F3) || defined(STM32F4) || defined(STM32F7)
|
||||
uint8_t timerGPIOAF(TIM_TypeDef *tim);
|
||||
#endif
|
||||
|
||||
#if defined(USE_HAL_DRIVER)
|
||||
TIM_HandleTypeDef* timerFindTimerHandle(TIM_TypeDef *tim);
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -154,6 +154,10 @@ void flashLedsAndBeep(void)
|
|||
|
||||
void init(void)
|
||||
{
|
||||
#ifdef USE_HAL_DRIVER
|
||||
HAL_Init();
|
||||
#endif
|
||||
|
||||
systemState = SYSTEM_STATE_INITIALISING;
|
||||
initBootlog();
|
||||
|
||||
|
|
@ -211,7 +215,9 @@ void init(void)
|
|||
|
||||
timerInit(); // timer must be initialized before any channel is allocated
|
||||
|
||||
#if !defined(USE_HAL_DRIVER)
|
||||
dmaInit();
|
||||
#endif
|
||||
|
||||
#if defined(AVOID_UART2_FOR_PWM_PPM)
|
||||
serialInit(&masterConfig.serialConfig, feature(FEATURE_SOFTSERIAL),
|
||||
|
|
@ -364,6 +370,9 @@ void init(void)
|
|||
spiInit(SPIDEV_3);
|
||||
#endif
|
||||
#endif
|
||||
#ifdef USE_SPI_DEVICE_4
|
||||
spiInit(SPIDEV_4);
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifdef USE_HARDWARE_REVISION_DETECTION
|
||||
|
|
@ -573,7 +582,7 @@ void init(void)
|
|||
|
||||
#if defined(LED_STRIP) && defined(WS2811_DMA_CHANNEL)
|
||||
// Ensure the SPI Tx DMA doesn't overlap with the led strip
|
||||
#ifdef STM32F4
|
||||
#if defined(STM32F4) || defined(STM32F7)
|
||||
sdcardUseDMA = !feature(FEATURE_LED_STRIP) || SDCARD_DMA_CHANNEL_TX != WS2811_DMA_STREAM;
|
||||
#else
|
||||
sdcardUseDMA = !feature(FEATURE_LED_STRIP) || SDCARD_DMA_CHANNEL_TX != WS2811_DMA_CHANNEL;
|
||||
|
|
|
|||
|
|
@ -76,6 +76,12 @@ const serialPortIdentifier_e serialPortIdentifiers[SERIAL_PORT_COUNT] = {
|
|||
#ifdef USE_UART6
|
||||
SERIAL_PORT_USART6,
|
||||
#endif
|
||||
#ifdef USE_UART7
|
||||
SERIAL_PORT_USART7,
|
||||
#endif
|
||||
#ifdef USE_UART8
|
||||
SERIAL_PORT_USART8,
|
||||
#endif
|
||||
#ifdef USE_SOFTSERIAL1
|
||||
SERIAL_PORT_SOFTSERIAL1,
|
||||
#endif
|
||||
|
|
@ -318,6 +324,16 @@ serialPort_t *openSerialPort(
|
|||
serialPort = uartOpen(USART6, rxCallback, baudRate, mode, options);
|
||||
break;
|
||||
#endif
|
||||
#ifdef USE_UART7
|
||||
case SERIAL_PORT_USART7:
|
||||
serialPort = uartOpen(UART7, rxCallback, baudRate, mode, options);
|
||||
break;
|
||||
#endif
|
||||
#ifdef USE_UART8
|
||||
case SERIAL_PORT_USART8:
|
||||
serialPort = uartOpen(UART8, rxCallback, baudRate, mode, options);
|
||||
break;
|
||||
#endif
|
||||
#ifdef USE_SOFTSERIAL1
|
||||
case SERIAL_PORT_SOFTSERIAL1:
|
||||
serialPort = openSoftSerial(SOFTSERIAL1, rxCallback, baudRate, options);
|
||||
|
|
|
|||
|
|
@ -59,6 +59,8 @@ typedef enum {
|
|||
SERIAL_PORT_USART4,
|
||||
SERIAL_PORT_USART5,
|
||||
SERIAL_PORT_USART6,
|
||||
SERIAL_PORT_USART7,
|
||||
SERIAL_PORT_USART8,
|
||||
SERIAL_PORT_USB_VCP = 20,
|
||||
SERIAL_PORT_SOFTSERIAL1 = 30,
|
||||
SERIAL_PORT_SOFTSERIAL2,
|
||||
|
|
|
|||
|
|
@ -47,6 +47,10 @@
|
|||
# include "io/serial_4way_stk500v2.h"
|
||||
#endif
|
||||
|
||||
#if defined(USE_HAL_DRIVER)
|
||||
#define Bit_RESET GPIO_PIN_RESET
|
||||
#endif
|
||||
|
||||
#define USE_TXRX_LED
|
||||
|
||||
#if defined(USE_TXRX_LED) && defined(LED0)
|
||||
|
|
|
|||
|
|
@ -17,6 +17,18 @@
|
|||
|
||||
#pragma once
|
||||
|
||||
#if defined(STM32F745xx)
|
||||
#include "stm32f7xx.h"
|
||||
#include "stm32f7xx_hal.h"
|
||||
|
||||
// Chip Unique ID on F7
|
||||
#define U_ID_0 (*(uint32_t*)0x1ff0f420)
|
||||
#define U_ID_1 (*(uint32_t*)0x1ff0f424)
|
||||
#define U_ID_2 (*(uint32_t*)0x1ff0f428)
|
||||
|
||||
#define STM32F7
|
||||
#endif
|
||||
|
||||
#if defined(STM32F40_41xxx) || defined (STM32F411xE)
|
||||
#include "stm32f4xx_conf.h"
|
||||
#include "stm32f4xx_rcc.h"
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue