mirror of
https://github.com/iNavFlight/inav.git
synced 2025-07-12 19:10:27 +03:00
[CMAKE] Add support for bootloader targets
- Rename function for target name definitions to include full MCU names, so we can support multiple size variants of the same MCU cleanly - Add cmake targets for .bin/.hex files from .elf files - Add targets for bootloader generation - Add targets for combining the bootloader with the main firmware
This commit is contained in:
Alberto García Hierro
parent
fd42e03f04
commit
d0938cc21f
100 changed files with 1148 additions and 288 deletions
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@ -11,6 +11,7 @@ set(CMAKE_TOOLCHAIN_FILE "${CMAKE_CURRENT_SOURCE_DIR}/cmake/${TOOLCHAIN}.cmake")
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if(CMAKE_BUILD_TYPE STREQUAL "Release" OR CMAKE_BUILD_TYPE STREQUAL "RelWithDebInfo")
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set(IS_RELEASE_BUILD ON)
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set(CMAKE_INTERPROCEDURAL_OPTIMIZATION ON)
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endif()
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project(INAV VERSION 2.5.0)
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@ -51,17 +51,17 @@ set_property(CACHE CMAKE_BUILD_TYPE PROPERTY STRINGS ${CMAKE_CONFIGURATION_TYPES
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set(arm_none_eabi_debug "-Og -g")
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# We set -Os or -O2 depending on the MCU family
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set(arm_none_eabi_release "-DNDEBUG -flto -fuse-linker-plugin")
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set(arm_none_eabi_release "-DNDEBUG")
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set(arm_none_eabi_relwithdebinfo "-ggdb3 ${arm_none_eabi_release}")
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SET(CMAKE_C_FLAGS_DEBUG ${arm_none_eabi_debug} CACHE INTERNAL "c compiler flags debug")
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SET(CMAKE_CXX_FLAGS_DEBUG ${arm_none_eabi_debug} CACHE INTERNAL "c++ compiler flags debug")
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SET(CMAKE_ASM_FLAGS_DEBUG ${arm_none_eabi_debug} CACHE INTERNAL "asm compiler flags debug")
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set(CMAKE_C_FLAGS_DEBUG ${arm_none_eabi_debug} CACHE INTERNAL "c compiler flags debug")
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set(CMAKE_CXX_FLAGS_DEBUG ${arm_none_eabi_debug} CACHE INTERNAL "c++ compiler flags debug")
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set(CMAKE_ASM_FLAGS_DEBUG ${arm_none_eabi_debug} CACHE INTERNAL "asm compiler flags debug")
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SET(CMAKE_C_FLAGS_RELEASE ${arm_none_eabi_release} CACHE INTERNAL "c compiler flags release")
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SET(CMAKE_CXX_FLAGS_RELEASE ${arm_none_eabi_release} CACHE INTERNAL "cxx compiler flags release")
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SET(CMAKE_ASM_FLAGS_RELEASE ${arm_none_eabi_release} CACHE INTERNAL "asm compiler flags release")
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set(CMAKE_C_FLAGS_RELEASE ${arm_none_eabi_release} CACHE INTERNAL "c compiler flags release")
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set(CMAKE_CXX_FLAGS_RELEASE ${arm_none_eabi_release} CACHE INTERNAL "cxx compiler flags release")
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set(CMAKE_ASM_FLAGS_RELEASE ${arm_none_eabi_release} CACHE INTERNAL "asm compiler flags release")
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SET(CMAKE_C_FLAGS_RELWITHDEBINFO ${arm_none_eabi_relwithdebinfo} CACHE INTERNAL "c compiler flags release")
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SET(CMAKE_CXX_FLAGS_RELWITHDEBINFO ${arm_none_eabi_relwithdebinfo} CACHE INTERNAL "cxx compiler flags release")
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SET(CMAKE_ASM_FLAGS_RELWITHDEBINFO ${arm_none_eabi_relwithdebinfo} CACHE INTERNAL "asm compiler flags release")
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set(CMAKE_C_FLAGS_RELWITHDEBINFO ${arm_none_eabi_relwithdebinfo} CACHE INTERNAL "c compiler flags release")
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set(CMAKE_CXX_FLAGS_RELWITHDEBINFO ${arm_none_eabi_relwithdebinfo} CACHE INTERNAL "cxx compiler flags release")
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set(CMAKE_ASM_FLAGS_RELWITHDEBINFO ${arm_none_eabi_relwithdebinfo} CACHE INTERNAL "asm compiler flags release")
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@ -39,23 +39,32 @@ macro(glob_except) # var-name pattern excludes-var
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exclude_basenames(${ARGV0} ${ARGV2})
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endmacro()
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function(setup_firmware_target name)
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target_compile_options(${name} PRIVATE ${MAIN_COMPILE_OPTIONS})
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target_include_directories(${name} PRIVATE ${MAIN_INCLUDE_DIRS})
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target_compile_definitions(${name} PRIVATE ${MAIN_DEFINITIONS} __TARGET__="${name}" ${name})
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enable_settings(${name})
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function(get_generated_files_dir output target_name)
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set(${output} ${CMAKE_CURRENT_BINARY_DIR}/${target_name} PARENT_SCOPE)
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endfunction()
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function(setup_executable exe name)
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get_generated_files_dir(generated_dir ${name})
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target_compile_options(${exe} PRIVATE ${MAIN_COMPILE_OPTIONS})
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target_include_directories(${exe} PRIVATE ${generated_dir} ${MAIN_INCLUDE_DIRS})
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target_compile_definitions(${exe} PRIVATE ${MAIN_DEFINITIONS} __TARGET__="${name}" ${name})
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# XXX: Don't make SETTINGS_GENERATED_C part of the build,
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# since it's compiled via #include in settings.c. This will
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# change once we move off PGs
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target_sources(${name} PRIVATE "${CMAKE_CURRENT_BINARY_DIR}/${name}/${SETTINGS_GENERATED_H}")
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set_target_properties(${name} PROPERTIES
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target_sources(${exe} PRIVATE "${CMAKE_CURRENT_BINARY_DIR}/${name}/${SETTINGS_GENERATED_H}")
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set_target_properties(${exe} PROPERTIES
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RUNTIME_OUTPUT_DIRECTORY "${CMAKE_BINARY_DIR}/bin"
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)
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endfunction()
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function(setup_firmware_target exe name)
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setup_executable(${exe} ${name})
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enable_settings(${exe} ${name})
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get_property(targets GLOBAL PROPERTY VALID_TARGETS)
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list(APPEND targets ${name})
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set_property(GLOBAL PROPERTY VALID_TARGETS "${targets}")
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setup_openocd(${name})
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setup_svd(${name})
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setup_openocd(${exe} ${name})
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setup_svd(${exe} ${name})
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endfunction()
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function(exclude_from_all target)
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@ -34,13 +34,13 @@ if(OPENOCD_PATH)
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)
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endif()
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function(setup_openocd target_name)
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function(setup_openocd target_exe target_name)
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if(OPENOCD_INTERFACE)
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set(openocd_interface ${OPENOCD_INTERFACE})
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else()
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get_property(openocd_interface TARGET ${target_name} PROPERTY OPENOCD_DEFAULT_INTERFACE)
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get_property(openocd_interface TARGET ${target_exe} PROPERTY OPENOCD_DEFAULT_INTERFACE)
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endif()
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get_property(openocd_target TARGET ${target_name} PROPERTY OPENOCD_TARGET)
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get_property(openocd_target TARGET ${target_exe} PROPERTY OPENOCD_TARGET)
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if(OPENOCD_CFG OR (openocd_target AND openocd_interface))
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set(openocd_run_target "openocd_${target_name}")
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if (OPENOCD_CFG AND NOT OPENOCD_CFG STREQUAL "")
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@ -74,10 +74,10 @@ function(setup_openocd target_name)
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add_custom_target(${openocd_flash_target} ${CMAKE_COMMAND} -E env
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OPENOCD_CMD=${OPENOCD_PATH}
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${MAIN_UTILS_DIR}/openocd_flash.py -f
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${openocd_cfg_path} $<TARGET_FILE:${target_name}>
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${openocd_cfg_path} $<TARGET_FILE:${target_exe}>
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COMMENT "Flashing ${target_name} with openocd"
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DEPENDS ${openocd_cfg_path} ${target_name}
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DEPENDS ${openocd_cfg_path} ${target_exe}
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)
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exclude_from_all(${openocd_flash_target})
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endif()
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@ -4,13 +4,13 @@ set(SETTINGS_GENERATED_H "${SETTINGS_GENERATED}.h")
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set(SETTINGS_FILE "${MAIN_SRC_DIR}/fc/settings.yaml")
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set(SETTINGS_GENERATOR "${MAIN_UTILS_DIR}/settings.rb")
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function(enable_settings target)
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set(dir "${CMAKE_CURRENT_BINARY_DIR}/${target}")
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target_include_directories(${target} PRIVATE ${dir})
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get_target_property(options ${target} COMPILE_OPTIONS)
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get_target_property(includes ${target} INCLUDE_DIRECTORIES)
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function(enable_settings exe name)
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get_generated_files_dir(dir ${name})
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get_target_property(options ${exe} COMPILE_OPTIONS)
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get_target_property(includes ${exe} INCLUDE_DIRECTORIES)
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list(TRANSFORM includes PREPEND "-I")
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get_target_property(defs ${target} COMPILE_DEFINITIONS)
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get_target_property(defs ${exe} COMPILE_DEFINITIONS)
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list(TRANSFORM defs PREPEND "-D")
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list(APPEND cflags ${options})
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list(APPEND cflags ${includes})
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@ -18,7 +18,7 @@ function(enable_settings target)
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add_custom_command(
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OUTPUT ${dir}/${SETTINGS_GENERATED_H} ${dir}/${SETTINGS_GENERATED_C}
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COMMAND
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${CMAKE_COMMAND} -E env CFLAGS="${cflags}" TARGET=${target}
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${CMAKE_COMMAND} -E env CFLAGS="${cflags}" TARGET=${name}
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${RUBY_EXECUTABLE} ${SETTINGS_GENERATOR} ${MAIN_DIR} ${SETTINGS_FILE} -o "${dir}"
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DEPENDS ${SETTINGS_GENERATOR} ${SETTINGS_FILE}
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)
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30
cmake/stm32-bootloader.cmake
Normal file
30
cmake/stm32-bootloader.cmake
Normal file
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@ -0,0 +1,30 @@
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main_sources(BOOTLOADER_SOURCES
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common/log.c
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common/log.h
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common/printf.c
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common/printf.h
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common/string_light.c
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common/string_light.h
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common/typeconversion.c
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common/typeconversion.h
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drivers/bus.c
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drivers/bus_busdev_i2c.c
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drivers/bus_busdev_spi.c
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drivers/bus_i2c_soft.c
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drivers/io.c
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drivers/light_led.c
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drivers/persistent.c
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drivers/rcc.c
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drivers/serial.c
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drivers/system.c
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drivers/time.c
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drivers/timer.c
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fc/firmware_update_common.c
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fc/firmware_update_common.h
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target/common_hardware.c
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)
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list(APPEND BOOTLOADER_SOURCES ${MAIN_DIR}/src/bl/bl_main.c)
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@ -1,4 +1,5 @@
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include(arm-none-eabi)
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include(stm32-bootloader)
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include(stm32f3)
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include(stm32f4)
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include(stm32f7)
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@ -49,7 +50,6 @@ main_sources(STM32_ASYNCFATFS_SRC
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)
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main_sources(STM32_MSC_SRC
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msc/usbd_msc_desc.c
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msc/usbd_storage.c
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)
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@ -159,90 +159,284 @@ macro(get_stm32_target_features output_var dir target_name)
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endif()
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endmacro()
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function(target_stm32 name startup ldscript)
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set(target_definitions)
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function(get_stm32_flash_size out size)
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# 4: 16, 6: 32, 8: 64, B: 128, C: 256, D: 384, E: 512, F: 768, G: 1024, H: 1536, I: 2048 KiB
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string(TOUPPER ${size} s)
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if(${s} STREQUAL "4")
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set(${out} 16 PARENT_SCOPE)
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return()
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endif()
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if(${s} STREQUAL "6")
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set(${out} 32 PARENT_SCOPE)
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return()
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endif()
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if(${s} STREQUAL "8")
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set(${out} 64 PARENT_SCOPE)
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return()
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endif()
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if(${s} STREQUAL "8")
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set(${out} 64 PARENT_SCOPE)
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return()
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endif()
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if(${s} STREQUAL "B")
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set(${out} 128 PARENT_SCOPE)
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return()
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endif()
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if(${s} STREQUAL "C")
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set(${out} 256 PARENT_SCOPE)
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return()
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endif()
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if(${s} STREQUAL "D")
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set(${out} 384 PARENT_SCOPE)
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return()
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endif()
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if(${s} STREQUAL "E")
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set(${out} 512 PARENT_SCOPE)
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return()
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endif()
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if(${s} STREQUAL "F")
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set(${out} 768 PARENT_SCOPE)
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return()
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endif()
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if(${s} STREQUAL "G")
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set(${out} 1024 PARENT_SCOPE)
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return()
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endif()
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if(${s} STREQUAL "H")
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set(${out} 1536 PARENT_SCOPE)
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return()
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endif()
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if(${s} STREQUAL "I")
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set(${out} 2048 PARENT_SCOPE)
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return()
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endif()
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endfunction()
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function(add_hex_target name exe hex)
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add_custom_target(${name} ALL
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${CMAKE_OBJCOPY} -Oihex $<TARGET_FILE:${exe}> ${hex}
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BYPRODUCTS ${hex}
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)
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endfunction()
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function(add_bin_target name exe bin)
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add_custom_target(${name} ALL
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${CMAKE_OBJCOPY} -Obinary $<TARGET_FILE:${exe}> ${bin}
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BYPRODUCTS ${bin}
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)
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endfunction()
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function(generate_map_file target)
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target_link_options(${target} PRIVATE "-Wl,-Map,$<TARGET_FILE_DIR:${target}>/$<TARGET_FILE_BASE_NAME:${target}>.map")
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endfunction()
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function(set_linker_script target script)
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set(script_path ${STM32_LINKER_DIR}/${args_LINKER_SCRIPT}.ld)
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if(NOT EXISTS ${script_path})
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message(FATAL_ERROR "linker script ${script_path} doesn't exist")
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endif()
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set_target_properties(${target} PROPERTIES LINK_DEPENDS ${script_path})
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target_link_options(${elf_target} PRIVATE -T${script_path})
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endfunction()
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function(add_stm32_executable)
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cmake_parse_arguments(
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args
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# Boolean arguments
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""
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# Single value arguments
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"FILENAME;NAME;OPTIMIZATION;OUTPUT_BIN_FILENAME;OUTPUT_HEX_FILENAME;OUTPUT_TARGET_NAME"
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# Multi-value arguments
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"COMPILE_DEFINITIONS;COMPILE_OPTIONS;INCLUDE_DIRECTORIES;LINK_OPTIONS;LINKER_SCRIPT;SOURCES"
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# Start parsing after the known arguments
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${ARGN}
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)
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set(elf_target ${args_NAME}.elf)
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add_executable(${elf_target})
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set_target_properties(${elf_target} PROPERTIES OUTPUT_NAME ${args_NAME})
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target_sources(${elf_target} PRIVATE ${args_SOURCES})
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target_include_directories(${elf_target} PRIVATE ${CMAKE_CURRENT_SOURCE_DIR} ${args_INCLUDE_DIRECTORIES} ${STM32_INCLUDE_DIRS})
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target_compile_definitions(${elf_target} PRIVATE ${args_COMPILE_DEFINITIONS})
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target_compile_options(${elf_target} PRIVATE ${STM32_COMPILE_OPTIONS} ${args_COMPILE_OPTIONS})
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if(WARNINGS_AS_ERRORS)
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target_compile_options(${elf_target} PRIVATE -Werror)
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endif()
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if (IS_RELEASE_BUILD)
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target_compile_options(${elf_target} PRIVATE ${args_OPTIMIZATION})
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target_link_options(${elf_target} PRIVATE ${args_OPTIMIZATION})
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endif()
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target_link_libraries(${elf_target} PRIVATE ${STM32_LINK_LIBRARIES})
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target_link_options(${elf_target} PRIVATE ${STM32_LINK_OPTIONS} ${args_LINK_OPTIONS})
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generate_map_file(${elf_target})
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set_linker_script(${elf_target} ${args_LINKER_SCRIPT})
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if(args_FILENAME)
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set(basename ${CMAKE_BINARY_DIR}/${args_FILENAME})
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set(hex_filename ${basename}.hex)
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add_hex_target(${args_NAME} ${elf_target} ${hex_filename})
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set(bin_filename ${basename}.bin)
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add_bin_target(${args_NAME}.bin ${elf_target} ${bin_filename})
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endif()
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if(args_OUTPUT_BIN_FILENAME)
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set(${args_OUTPUT_BIN_FILENAME} ${bin_filename} PARENT_SCOPE)
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endif()
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if(args_OUTPUT_TARGET_NAME)
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set(${args_OUTPUT_TARGET_NAME} ${elf_target} PARENT_SCOPE)
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endif()
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if(args_OUTPUT_HEX_FILENAME)
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set(${args_OUTPUT_HEX_FILENAME} ${hex_filename} PARENT_SCOPE)
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endif()
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endfunction()
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function(target_stm32)
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# Parse keyword arguments
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cmake_parse_arguments(
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PARSED_ARGS
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"DISABLE_MSC" # Boolean arguments
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"HSE_MHZ;OPENOCD_TARGET;SVD" # Single value arguments
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"DEFINITIONS" # Multi-value arguments
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${ARGN} # Start parsing after the known arguments
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args
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# Boolean arguments
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"DISABLE_MSC;BOOTLOADER"
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# Single value arguments
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"HSE_MHZ;LINKER_SCRIPT;NAME;OPENOCD_TARGET;OPTIMIZATION;STARTUP;SVD"
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# Multi-value arguments
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"COMPILE_DEFINITIONS;COMPILE_OPTIONS;INCLUDE_DIRECTORIES;LINK_OPTIONS;SOURCES;MSC_SOURCES;MSC_INCLUDE_DIRECTORIES;VCP_SOURCES;VCP_INCLUDE_DIRECTORIES"
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# Start parsing after the known arguments
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${ARGN}
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)
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set(name ${args_NAME})
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if (PARSED_ARGS_HSE_MHZ)
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set(hse_mhz ${PARSED_ARGS_HSE_MHZ})
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if (args_HSE_MHZ)
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set(hse_mhz ${args_HSE_MHZ})
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else()
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set(hse_mhz ${STM32_DEFAULT_HSE_MHZ})
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endif()
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# Main .elf target
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add_executable(${name})
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target_sources(${name} PRIVATE "${STM32_STARTUP_DIR}/${startup}" ${COMMON_SRC} ${CMSIS_DSP_SRC})
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set(target_sources ${STM32_STARTUP_DIR}/${args_STARTUP})
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list(APPEND target_sources ${args_SOURCES})
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file(GLOB target_c_sources "${CMAKE_CURRENT_SOURCE_DIR}/*.c")
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file(GLOB target_h_sources "${CMAKE_CURRENT_SOURCE_DIR}/*.h")
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target_sources(${name} PRIVATE ${target_c_sources} ${target_h_sources})
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target_include_directories(${name} PRIVATE . ${STM32_INCLUDE_DIRS})
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target_compile_options(${name} PRIVATE ${STM32_COMPILE_OPTIONS})
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if(WARNINGS_AS_ERRORS)
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target_compile_options(${name} PRIVATE -Werror)
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endif()
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target_link_libraries(${name} PRIVATE ${STM32_LINK_LIBRARIES})
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target_link_options(${name} PRIVATE ${STM32_LINK_OPTIONS})
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target_link_options(${name} PRIVATE "-T${STM32_LINKER_DIR}/${ldscript}")
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target_link_options(${name} PRIVATE "-Wl,-Map,$<TARGET_FILE:${name}>.map")
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list(APPEND target_sources ${target_c_sources} ${target_h_sources})
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set(target_include_directories ${args_INCLUDE_DIRECTORIES})
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set(target_definitions ${STM32_DEFINITIONS})
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|
||||
get_stm32_target_features(features "${CMAKE_CURRENT_SOURCE_DIR}" ${name})
|
||||
set_property(TARGET ${elf_target} PROPERTY FEATURES ${features})
|
||||
|
||||
if(VCP IN_LIST features)
|
||||
list(APPEND target_sources ${STM32_VCP_SRC} ${args_VCP_SOURCES})
|
||||
list(APPEND target_include_directories ${args_VCP_INCLUDE_DIRECTORIES})
|
||||
endif()
|
||||
if(SDCARD IN_LIST features)
|
||||
list(APPEND target_sources ${STM32_SDCARD_SRC} ${STM32_ASYNCFATFS_SRC})
|
||||
endif()
|
||||
|
||||
set(msc_sources)
|
||||
if(NOT args_DISABLE_MSC AND MSC IN_LIST features)
|
||||
list(APPEND target_include_directories ${args_MSC_INCLUDE_DIRECTORIES})
|
||||
list(APPEND msc_sources ${STM32_MSC_SRC} ${args_MSC_SOURCES})
|
||||
list(APPEND target_definitions USE_USB_MSC)
|
||||
if(FLASHFS IN_LIST features)
|
||||
list(APPEND msc_sources ${STM32_MSC_FLASH_SRC})
|
||||
endif()
|
||||
if (SDCARD IN_LIST features)
|
||||
if (SDIO IN_LIST features)
|
||||
list(APPEND msc_sources ${STM32_MSC_SDCARD_SDIO_SRC})
|
||||
else()
|
||||
list(APPEND msc_sources ${STM32_MSC_SDCARD_SPI_SRC})
|
||||
endif()
|
||||
endif()
|
||||
endif()
|
||||
|
||||
math(EXPR hse_value "${hse_mhz} * 1000000")
|
||||
list(APPEND target_definitions "HSE_VALUE=${hse_value}")
|
||||
if(PARSED_ARGS_DEFINITIONS)
|
||||
list(APPEND target_definitions ${PARSED_ARGS_DEFINITIONS})
|
||||
if(args_COMPILE_DEFINITIONS)
|
||||
list(APPEND target_definitions ${args_COMPILE_DEFINITIONS})
|
||||
endif()
|
||||
if(DEBUG_HARDFAULTS)
|
||||
list(APPEND target_definitions DEBUG_HARDFAULTS)
|
||||
endif()
|
||||
target_compile_definitions(${name} PRIVATE ${target_definitions})
|
||||
|
||||
get_stm32_target_features(features "${CMAKE_CURRENT_SOURCE_DIR}" ${name})
|
||||
set_property(TARGET ${name} PROPERTY FEATURES ${features})
|
||||
if(VCP IN_LIST features)
|
||||
target_sources(${name} PRIVATE ${STM32_VCP_SRC})
|
||||
endif()
|
||||
if(SDCARD IN_LIST features)
|
||||
target_sources(${name} PRIVATE ${STM32_SDCARD_SRC} ${STM32_ASYNCFATFS_SRC})
|
||||
endif()
|
||||
if(NOT PARSED_ARGS_DISABLE_MSC AND MSC IN_LIST features)
|
||||
target_sources(${name} PRIVATE ${STM32_MSC_SRC})
|
||||
target_compile_definitions(${name} PRIVATE USE_USB_MSC)
|
||||
if (FLASHFS IN_LIST features)
|
||||
target_sources(${name} PRIVATE ${STM32_MSC_FLASH_SRC})
|
||||
endif()
|
||||
if (SDCARD IN_LIST features)
|
||||
if (SDIO IN_LIST features)
|
||||
target_sources(${name} PRIVATE ${STM32_MSC_SDCARD_SDIO_SRC})
|
||||
else()
|
||||
target_sources(${name} PRIVATE ${STM32_MSC_SDCARD_SPI_SRC})
|
||||
endif()
|
||||
endif()
|
||||
endif()
|
||||
set_property(TARGET ${name} PROPERTY OPENOCD_TARGET ${PARSED_ARGS_OPENOCD_TARGET})
|
||||
set_property(TARGET ${name} PROPERTY OPENOCD_DEFAULT_INTERFACE stlink)
|
||||
set_property(TARGET ${name} PROPERTY SVD ${PARSED_ARGS_SVD})
|
||||
# Generate .hex
|
||||
# XXX: Generator expressions are not supported for add_custom_command()
|
||||
# OUTPUT nor BYPRODUCTS, so we can't rely of them. Instead, build the filename
|
||||
# for the .hex from the target name
|
||||
set(hexdir "${CMAKE_BINARY_DIR}/hex")
|
||||
set(hex "${hexdir}/${PROJECT_NAME}_${name}_${FIRMWARE_VERSION}.hex")
|
||||
add_custom_command(TARGET ${name} POST_BUILD
|
||||
COMMAND ${CMAKE_COMMAND} -E make_directory ${hexdir}
|
||||
COMMAND ${CMAKE_OBJCOPY} -Oihex $<TARGET_FILE:${name}> ${hex}
|
||||
BYPRODUCTS ${hex}
|
||||
string(TOLOWER ${PROJECT_NAME} lowercase_project_name)
|
||||
set(binary_name ${lowercase_project_name}_${FIRMWARE_VERSION}_${name})
|
||||
|
||||
# Main firmware
|
||||
add_stm32_executable(
|
||||
NAME ${name}
|
||||
FILENAME ${binary_name}
|
||||
SOURCES ${target_sources} ${msc_sources} ${CMSIS_DSP_SRC} ${COMMON_SRC}
|
||||
COMPILE_DEFINITIONS ${target_definitions}
|
||||
COMPILE_OPTIONS ${args_COMPILE_OPTIONS}
|
||||
INCLUDE_DIRECTORIES ${target_include_directories}
|
||||
LINK_OPTIONS ${args_LINK_OPTIONS}
|
||||
LINKER_SCRIPT ${args_LINKER_SCRIPT}
|
||||
OPTIMIZATION ${args_OPTIMIZATION}
|
||||
|
||||
OUTPUT_HEX_FILENAME main_hex_filename
|
||||
OUTPUT_TARGET_NAME main_target_name
|
||||
)
|
||||
|
||||
set_property(TARGET ${main_target_name} PROPERTY OPENOCD_TARGET ${args_OPENOCD_TARGET})
|
||||
set_property(TARGET ${main_target_name} PROPERTY OPENOCD_DEFAULT_INTERFACE stlink)
|
||||
set_property(TARGET ${main_target_name} PROPERTY SVD ${args_SVD})
|
||||
|
||||
setup_firmware_target(${main_target_name} ${name})
|
||||
|
||||
if(args_BOOTLOADER)
|
||||
# Bootloader for the target
|
||||
set(bl_suffix _bl)
|
||||
add_stm32_executable(
|
||||
NAME ${name}${bl_suffix}
|
||||
FILENAME ${binary_name}${bl_suffix}
|
||||
SOURCES ${target_sources} ${BOOTLOADER_SOURCES}
|
||||
COMPILE_DEFINITIONS ${target_definitions} BOOTLOADER MSP_FIRMWARE_UPDATE
|
||||
COMPILE_OPTIONS ${args_COMPILE_OPTIONS}
|
||||
INCLUDE_DIRECTORIES ${target_include_directories}
|
||||
LINK_OPTIONS ${args_LINK_OPTIONS}
|
||||
LINKER_SCRIPT ${args_LINKER_SCRIPT}${bl_suffix}
|
||||
OPTIMIZATION ${args_OPTIMIZATION}
|
||||
|
||||
OUTPUT_BIN_FILENAME bl_bin_filename
|
||||
OUTPUT_HEX_FILENAME bl_hex_filename
|
||||
OUTPUT_TARGET_NAME bl_target_name
|
||||
)
|
||||
setup_executable(${bl_target_name} ${name})
|
||||
|
||||
# Main firmware, but for running with the bootloader
|
||||
set(for_bl_suffix _for_bl)
|
||||
add_stm32_executable(
|
||||
NAME ${name}${for_bl_suffix}
|
||||
FILENAME ${binary_name}${for_bl_suffix}
|
||||
SOURCES ${target_sources} ${msc_sources} ${CMSIS_DSP_SRC} ${COMMON_SRC}
|
||||
COMPILE_DEFINITIONS ${target_definitions} MSP_FIRMWARE_UPDATE
|
||||
COMPILE_OPTIONS ${args_COMPILE_OPTIONS}
|
||||
INCLUDE_DIRECTORIES ${target_include_directories}
|
||||
LINK_OPTIONS ${args_LINK_OPTIONS}
|
||||
LINKER_SCRIPT ${args_LINKER_SCRIPT}${for_bl_suffix}
|
||||
OPTIMIZATION ${args_OPTIMIZATION}
|
||||
|
||||
OUTPUT_BIN_FILENAME for_bl_bin_filename
|
||||
OUTPUT_HEX_FILENAME for_bl_hex_filename
|
||||
OUTPUT_TARGET_NAME for_bl_target_name
|
||||
)
|
||||
setup_executable(${for_bl_target_name} ${name})
|
||||
|
||||
# Combined with bootloader and main firmware
|
||||
set(with_bl_suffix _with_bl)
|
||||
set(combined_hex ${CMAKE_BINARY_DIR}/${binary_name}${with_bl_suffix}.hex)
|
||||
add_custom_target(${name}${with_bl_suffix}
|
||||
${CMAKE_SOURCE_DIR}/src/utils/combine_tool ${bl_bin_filename} ${for_bl_bin_filename} ${combined_hex}
|
||||
DEPENDS ${bl_bin_filename} ${for_bl_bin_filename}
|
||||
BYPRODUCTS ${combined_hex}
|
||||
)
|
||||
endif()
|
||||
|
||||
# clean_<target>
|
||||
set(clean_target "clean_${name}")
|
||||
add_custom_target(${clean_target}
|
||||
COMMAND cmake -E rm -r "${CMAKE_CURRENT_BINARY_DIR}"
|
||||
WORKING_DIRECTORY ${CMAKE_BINARY_DIR}
|
||||
COMMAND ${CMAKE_COMMAND} -E rm -r "${CMAKE_CURRENT_BINARY_DIR}"
|
||||
COMMAND ${CMAKE_COMMAND} -E rm ${main_hex_filename}
|
||||
COMMAND ${CMAKE_COMMAND} -E rm ${bl_hex_filename}
|
||||
COMMAND ${CMAKE_COMMAND} -E rm ${main_hex_filename}
|
||||
COMMENT "Removing intermediate files for ${name}")
|
||||
set_property(TARGET ${clean_target} PROPERTY
|
||||
TARGET_MESSAGES OFF
|
||||
|
|
|
|||
|
|
@ -52,35 +52,41 @@ set(STM32F3_DEFINITIONS
|
|||
USE_STDPERIPH_DRIVER
|
||||
)
|
||||
|
||||
set(STM32F303_DEFINITIONS
|
||||
set(STM32F303CC_DEFINITIONS
|
||||
STM32F303
|
||||
STM32F303xC
|
||||
FLASH_SIZE=256
|
||||
)
|
||||
|
||||
function(target_stm32f3xx name startup ldscript)
|
||||
# F3 targets don't support MSC
|
||||
target_stm32(${name} ${startup} ${ldscript} DISABLE_MSC OPENOCD_TARGET stm32f3x ${ARGN})
|
||||
# F3 targets don't use -O2 to save size
|
||||
if (IS_RELEASE_BUILD)
|
||||
target_compile_options(${name} PRIVATE "-Os")
|
||||
target_link_options(${name} PRIVATE "-Os")
|
||||
endif()
|
||||
target_sources(${name} PRIVATE ${STM32_STDPERIPH_SRC} ${STM32F3_STDPERIPH_SRC} ${STM32F3_SRC})
|
||||
target_compile_options(${name} PRIVATE ${CORTEX_M4F_COMMON_OPTIONS} ${CORTEX_M4F_COMPILE_OPTIONS})
|
||||
target_include_directories(${name} PRIVATE ${STM32F3_INCLUDE_DIRS})
|
||||
target_compile_definitions(${name} PRIVATE ${STM32F3_DEFINITIONS})
|
||||
target_link_options(${name} PRIVATE ${CORTEX_M4F_COMMON_OPTIONS} ${CORTEX_M4F_LINK_OPTIONS})
|
||||
function(target_stm32f3xx)
|
||||
# F3 targets don't support MSC and use -Os instead of -O2 to save size
|
||||
target_stm32(
|
||||
SOURCES ${STM32_STDPERIPH_SRC} ${STM32F3_STDPERIPH_SRC} ${STM32F3_SRC}
|
||||
COMPILE_DEFINITIONS ${STM32F3_DEFINITIONS}
|
||||
COMPILE_OPTIONS ${CORTEX_M4F_COMMON_OPTIONS} ${CORTEX_M4F_COMPILE_OPTIONS}
|
||||
INCLUDE_DIRECTORIES ${STM32F3_INCLUDE_DIRS}
|
||||
LINK_OPTIONS ${CORTEX_M4F_COMMON_OPTIONS} ${CORTEX_M4F_LINK_OPTIONS}
|
||||
|
||||
get_property(features TARGET ${name} PROPERTY FEATURES)
|
||||
if(VCP IN_LIST features)
|
||||
target_include_directories(${name} PRIVATE ${STM32F3_USB_INCLUDE_DIRS})
|
||||
target_sources(${name} PRIVATE ${STM32F3_USB_SRC} ${STM32F3_VCP_SRC})
|
||||
endif()
|
||||
VCP_SOURCES ${STM32F3_USB_SRC} ${STM32F3_VCP_SRC}
|
||||
VCP_INCLUDE_DIRECTORIES ${STM32F3_USB_INCLUDE_DIRS}
|
||||
|
||||
DISABLE_MSC
|
||||
|
||||
OPTIMIZATION -Os
|
||||
|
||||
OPENOCD_TARGET stm32f3x
|
||||
|
||||
${ARGN}
|
||||
)
|
||||
endfunction()
|
||||
|
||||
function(target_stm32f303 name)
|
||||
target_stm32f3xx(${name} startup_stm32f30x_md_gcc.S stm32_flash_f303_256k.ld SVD STM32F303 ${ARGN})
|
||||
target_compile_definitions(${name} PRIVATE ${STM32F303_DEFINITIONS})
|
||||
setup_firmware_target(${name})
|
||||
function(target_stm32f303xc name)
|
||||
target_stm32f3xx(
|
||||
NAME ${name}
|
||||
STARTUP startup_stm32f30x_md_gcc.S
|
||||
COMPILE_DEFINITIONS ${STM32F303CC_DEFINITIONS}
|
||||
LINKER_SCRIPT stm32_flash_f303xc
|
||||
SVD STM32F303
|
||||
${ARGN}
|
||||
)
|
||||
endfunction()
|
||||
|
|
|
|||
|
|
@ -46,7 +46,11 @@ set(STM32F4_USBMSC_SRC
|
|||
usbd_msc_data.c
|
||||
usbd_msc_scsi.c
|
||||
)
|
||||
main_sources(STM32F4_MSC_SRC
|
||||
msc/usbd_msc_desc.c
|
||||
)
|
||||
list(TRANSFORM STM32F4_USBMSC_SRC PREPEND "${STM32_USBMSC_DIR}/src/")
|
||||
list(APPEND STM32F4_USBMSC_SRC ${STM32F4_MSC_SRC})
|
||||
|
||||
list(APPEND STM32F4_USB_SRC ${STM32_USBOTG_SRC})
|
||||
list(APPEND STM32F4_USB_SRC ${STM32_USBCORE_SRC})
|
||||
|
|
|
|||
|
|
@ -75,26 +75,24 @@ set(STM32F4_DEFINITIONS
|
|||
USE_STDPERIPH_DRIVER
|
||||
)
|
||||
|
||||
function(target_stm32f4xx name startup ldscript)
|
||||
target_stm32(${name} ${startup} ${ldscript} OPENOCD_TARGET stm32f4x ${ARGN})
|
||||
if (IS_RELEASE_BUILD)
|
||||
target_compile_options(${name} PRIVATE "-O2")
|
||||
target_link_options(${name} PRIVATE "-O2")
|
||||
endif()
|
||||
target_sources(${name} PRIVATE ${STM32_STDPERIPH_SRC} ${STM32F4_SRC})
|
||||
target_compile_options(${name} PRIVATE ${CORTEX_M4F_COMMON_OPTIONS} ${CORTEX_M4F_COMPILE_OPTIONS})
|
||||
target_include_directories(${name} PRIVATE ${STM32F4_INCLUDE_DIRS})
|
||||
target_compile_definitions(${name} PRIVATE ${STM32F4_DEFINITIONS})
|
||||
target_link_options(${name} PRIVATE ${CORTEX_M4F_COMMON_OPTIONS} ${CORTEX_M4F_LINK_OPTIONS})
|
||||
function(target_stm32f4xx)
|
||||
target_stm32(
|
||||
SOURCES ${STM32_STDPERIPH_SRC} ${STM32F4_SRC}
|
||||
COMPILE_DEFINITIONS ${STM32F4_DEFINITIONS}
|
||||
COMPILE_OPTIONS ${CORTEX_M4F_COMMON_OPTIONS} ${CORTEX_M4F_COMPILE_OPTIONS}
|
||||
INCLUDE_DIRECTORIES ${STM32F4_INCLUDE_DIRS}
|
||||
LINK_OPTIONS ${CORTEX_M4F_COMMON_OPTIONS} ${CORTEX_M4F_LINK_OPTIONS}
|
||||
|
||||
get_property(features TARGET ${name} PROPERTY FEATURES)
|
||||
if(VCP IN_LIST features)
|
||||
target_include_directories(${name} PRIVATE ${STM32F4_USB_INCLUDE_DIRS})
|
||||
target_sources(${name} PRIVATE ${STM32F4_USB_SRC} ${STM32F4_VCP_SRC})
|
||||
endif()
|
||||
if(MSC IN_LIST features)
|
||||
target_sources(${name} PRIVATE ${STM32F4_USBMSC_SRC} ${STM32F4_MSC_SRC})
|
||||
endif()
|
||||
MSC_SOURCES ${STM32F4_USBMSC_SRC} ${STM32F4_MSC_SRC}
|
||||
VCP_SOURCES ${STM32F4_USB_SRC} ${STM32F4_VCP_SRC}
|
||||
VCP_INCLUDE_DIRECTORIES ${STM32F4_USB_INCLUDE_DIRS}
|
||||
|
||||
OPTIMIZATION -O2
|
||||
|
||||
OPENOCD_TARGET stm32f4x
|
||||
|
||||
${ARGN}
|
||||
)
|
||||
endfunction()
|
||||
|
||||
set(STM32F405_COMPILE_DEFINITIONS
|
||||
|
|
@ -103,11 +101,17 @@ set(STM32F405_COMPILE_DEFINITIONS
|
|||
FLASH_SIZE=1024
|
||||
)
|
||||
|
||||
function(target_stm32f405 name)
|
||||
target_stm32f4xx(${name} startup_stm32f40xx.s stm32_flash_f405.ld SVD STM32F405 ${ARGN})
|
||||
target_sources(${name} PRIVATE ${STM32F4_STDPERIPH_SRC})
|
||||
target_compile_definitions(${name} PRIVATE ${STM32F405_COMPILE_DEFINITIONS})
|
||||
setup_firmware_target(${name})
|
||||
function(target_stm32f405xg name)
|
||||
target_stm32f4xx(
|
||||
NAME ${name}
|
||||
STARTUP startup_stm32f40xx.s
|
||||
SOURCES ${STM32F4_STDPERIPH_SRC}
|
||||
COMPILE_DEFINITIONS ${STM32F405_COMPILE_DEFINITIONS}
|
||||
LINKER_SCRIPT stm32_flash_f405xg
|
||||
SVD STM32F405
|
||||
BOOTLOADER
|
||||
${ARGN}
|
||||
)
|
||||
endfunction()
|
||||
|
||||
set(STM32F411_OR_F427_STDPERIPH_SRC ${STM32F4_STDPERIPH_SRC})
|
||||
|
|
@ -119,20 +123,30 @@ set(STM32F411_COMPILE_DEFINITIONS
|
|||
FLASH_SIZE=512
|
||||
)
|
||||
|
||||
function(target_stm32f411 name)
|
||||
target_stm32f4xx(${name} startup_stm32f411xe.s stm32_flash_f411.ld SVD STM32F411 ${ARGN})
|
||||
target_sources(${name} PRIVATE ${STM32F411_OR_F427_STDPERIPH_SRC})
|
||||
target_compile_definitions(${name} PRIVATE ${STM32F411_COMPILE_DEFINITIONS})
|
||||
setup_firmware_target(${name})
|
||||
function(target_stm32f411xe name)
|
||||
target_stm32f4xx(
|
||||
NAME ${name}
|
||||
STARTUP startup_stm32f411xe.s
|
||||
SOURCES ${STM32F411_OR_F427_STDPERIPH_SRC}
|
||||
COMPILE_DEFINITIONS ${STM32F411_COMPILE_DEFINITIONS}
|
||||
LINKER_SCRIPT stm32_flash_f411xe
|
||||
SVD STM32F411
|
||||
${ARGN}
|
||||
)
|
||||
endfunction()
|
||||
|
||||
set(STM32F427_COMPILE_DEFINITIONS
|
||||
STM32F427_437xx
|
||||
FLASH_SIZE=1024
|
||||
)
|
||||
function(target_stm32f427 name)
|
||||
target_stm32f4xx(${name} startup_stm32f427xx.s stm32_flash_f427.ld SVD STM32F427 ${ARGN})
|
||||
target_sources(${name} PRIVATE ${STM32F411_OR_F427_STDPERIPH_SRC})
|
||||
target_compile_definitions(${name} PRIVATE ${STM32F427_COMPILE_DEFINITIONS})
|
||||
setup_firmware_target(${name})
|
||||
function(target_stm32f427xg name)
|
||||
target_stm32f4xx(
|
||||
NAME ${name}
|
||||
STARTUP startup_stm32f427xx.s
|
||||
SOURCES ${STM32F411_OR_F427_STDPERIPH_SRC}
|
||||
COMPILE_DEFINITIONS ${STM32F427_COMPILE_DEFINITIONS}
|
||||
LINKER_SCRIPT stm32_flash_f427xg
|
||||
SVD STM32F411
|
||||
${ARGN}
|
||||
)
|
||||
endfunction()
|
||||
|
|
|
|||
|
|
@ -82,42 +82,50 @@ set(STM32F7_DEFINITIONS
|
|||
USE_FULL_LL_DRIVER
|
||||
)
|
||||
|
||||
function(target_stm32f7xx name startup ldscript)
|
||||
target_stm32(${name} ${startup} ${ldscript} OPENOCD_TARGET stm32f7x ${ARGN})
|
||||
if (IS_RELEASE_BUILD)
|
||||
target_compile_options(${name} PRIVATE "-O2")
|
||||
target_link_options(${name} PRIVATE "-O2")
|
||||
endif()
|
||||
target_sources(${name} PRIVATE ${STM32F7_HAL_SRC} ${STM32F7_SRC})
|
||||
target_compile_options(${name} PRIVATE ${CORTEX_M7_COMMON_OPTIONS} ${CORTEX_M7_COMPILE_OPTIONS})
|
||||
target_include_directories(${name} PRIVATE ${STM32F7_INCLUDE_DIRS})
|
||||
target_compile_definitions(${name} PRIVATE ${STM32F7_DEFINITIONS})
|
||||
target_link_options(${name} PRIVATE ${CORTEX_M7_COMMON_OPTIONS} ${CORTEX_M7_LINK_OPTIONS})
|
||||
function(target_stm32f7xx)
|
||||
target_stm32(
|
||||
SOURCES ${STM32F7_HAL_SRC} ${STM32F7_SRC}
|
||||
COMPILE_DEFINITIONS ${STM32F7_DEFINITIONS}
|
||||
COMPILE_OPTIONS ${CORTEX_M7_COMMON_OPTIONS} ${CORTEX_M7_COMPILE_OPTIONS}
|
||||
INCLUDE_DIRECTORIES ${STM32F7_INCLUDE_DIRS}
|
||||
LINK_OPTIONS ${CORTEX_M7_COMMON_OPTIONS} ${CORTEX_M7_LINK_OPTIONS}
|
||||
|
||||
get_property(features TARGET ${name} PROPERTY FEATURES)
|
||||
if(VCP IN_LIST features)
|
||||
target_include_directories(${name} PRIVATE ${STM32F7_USB_INCLUDE_DIRS} ${STM32F7_VCP_DIR})
|
||||
target_sources(${name} PRIVATE ${STM32F7_USB_SRC} ${STM32F7_VCP_SRC})
|
||||
endif()
|
||||
if(MSC IN_LIST features)
|
||||
target_sources(${name} PRIVATE ${STM32F7_USBMSC_SRC} ${STM32F7_MSC_SRC})
|
||||
endif()
|
||||
MSC_SOURCES ${STM32F7_USBMSC_SRC} ${STM32F7_MSC_SRC}
|
||||
VCP_SOURCES ${STM32F7_USB_SRC} ${STM32F7_VCP_SRC}
|
||||
VCP_INCLUDE_DIRECTORIES ${STM32F7_USB_INCLUDE_DIRS} ${STM32F7_VCP_DIR}
|
||||
|
||||
OPTIMIZATION -O2
|
||||
|
||||
OPENOCD_TARGET stm32f7x
|
||||
|
||||
BOOTLOADER
|
||||
|
||||
${ARGN}
|
||||
)
|
||||
endfunction()
|
||||
|
||||
macro(define_target_stm32f7 suffix flash_size)
|
||||
function(target_stm32f7${suffix} name)
|
||||
target_stm32f7xx(${name} startup_stm32f7${suffix}xx.s stm32_flash_f7${suffix}.ld ${ARGN})
|
||||
macro(define_target_stm32f7 subfamily size)
|
||||
function(target_stm32f7${subfamily}x${size} name)
|
||||
string(TOUPPER ${size} upper_size)
|
||||
get_stm32_flash_size(flash_size ${size})
|
||||
set(definitions
|
||||
STM32F7
|
||||
STM32F7${suffix}xx
|
||||
STM32F7${subfamily}xx
|
||||
STM32F7${subfamily}x${upper_size}
|
||||
FLASH_SIZE=${flash_size}
|
||||
)
|
||||
target_compile_definitions(${name} PRIVATE ${definitions})
|
||||
setup_firmware_target(${name})
|
||||
target_stm32f7xx(
|
||||
NAME ${name}
|
||||
STARTUP startup_stm32f7${subfamily}xx.s
|
||||
COMPILE_DEFINITIONS ${definitions}
|
||||
LINKER_SCRIPT stm32_flash_f7${subfamily}x${size}
|
||||
${ARGN}
|
||||
)
|
||||
endfunction()
|
||||
endmacro()
|
||||
|
||||
define_target_stm32f7("22" 512)
|
||||
define_target_stm32f7("45" 2048)
|
||||
define_target_stm32f7("46" 2048)
|
||||
define_target_stm32f7("65" 2048)
|
||||
define_target_stm32f7(22 e)
|
||||
define_target_stm32f7(45 g)
|
||||
define_target_stm32f7(46 g)
|
||||
define_target_stm32f7(65 g)
|
||||
define_target_stm32f7(65 i)
|
||||
|
|
@ -1,5 +1,5 @@
|
|||
function(setup_svd target_name)
|
||||
get_property(svd_name TARGET ${target_name} PROPERTY SVD)
|
||||
function(setup_svd target_exe target_name)
|
||||
get_property(svd_name TARGET ${target_exe} PROPERTY SVD)
|
||||
set(svd_target_name "svd_${target_name}")
|
||||
if (svd_name AND NOT svd_name STREQUAL "")
|
||||
add_custom_target(${svd_target_name}
|
||||
|
|
|
|||
|
|
@ -273,6 +273,10 @@ main_sources(COMMON_SRC
|
|||
fc/fc_msp.h
|
||||
fc/fc_msp_box.c
|
||||
fc/fc_msp_box.h
|
||||
fc/firmware_update.c
|
||||
fc/firmware_update.h
|
||||
fc/firmware_update_common.c
|
||||
fc/firmware_update_common.h
|
||||
fc/rc_smoothing.c
|
||||
fc/rc_smoothing.h
|
||||
fc/rc_adjustments.c
|
||||
|
|
|
|||
0
src/main/startup/startup_stm32f427xx.s
Executable file → Normal file
0
src/main/startup/startup_stm32f427xx.s
Executable file → Normal file
|
|
@ -1 +1 @@
|
|||
target_stm32f405(AIKONF4)
|
||||
target_stm32f405xg(AIKONF4)
|
||||
|
|
|
|||
|
|
@ -1 +1 @@
|
|||
target_stm32f405(AIRBOTF4)
|
||||
target_stm32f405xg(AIRBOTF4)
|
||||
|
|
|
|||
|
|
@ -1,2 +1,2 @@
|
|||
target_stm32f722(AIRBOTF7)
|
||||
target_stm32f722(OMNIBUSF7NANOV7)
|
||||
target_stm32f722xe(AIRBOTF7)
|
||||
target_stm32f722xe(OMNIBUSF7NANOV7)
|
||||
|
|
|
|||
|
|
@ -1,2 +1,2 @@
|
|||
target_stm32f303(AIRHEROF3 HSE_MHZ 12)
|
||||
target_stm32f303(AIRHEROF3_QUAD HSE_MHZ 12)
|
||||
target_stm32f303xc(AIRHEROF3 HSE_MHZ 12)
|
||||
target_stm32f303xc(AIRHEROF3_QUAD HSE_MHZ 12)
|
||||
|
|
|
|||
|
|
@ -1 +1 @@
|
|||
target_stm32f722(ALIENFLIGHTNGF7)
|
||||
target_stm32f722xe(ALIENFLIGHTNGF7)
|
||||
|
|
|
|||
|
|
@ -1 +1 @@
|
|||
target_stm32f405(ANYFC)
|
||||
target_stm32f405xg(ANYFC)
|
||||
|
|
|
|||
|
|
@ -1,2 +1,2 @@
|
|||
target_stm32f745(ANYFCF7)
|
||||
target_stm32f745(ANYFCF7_EXTERNAL_BARO)
|
||||
target_stm32f745xg(ANYFCF7)
|
||||
target_stm32f745xg(ANYFCF7_EXTERNAL_BARO)
|
||||
|
|
|
|||
|
|
@ -1 +1 @@
|
|||
target_stm32f405(ASGARD32F4)
|
||||
target_stm32f405xg(ASGARD32F4)
|
||||
|
|
|
|||
|
|
@ -1 +1 @@
|
|||
target_stm32f722(ASGARD32F7)
|
||||
target_stm32f722xe(ASGARD32F7)
|
||||
|
|
@ -1 +1 @@
|
|||
target_stm32f405(BEEROTORF4)
|
||||
target_stm32f405xg(BEEROTORF4)
|
||||
|
|
|
|||
|
|
@ -1 +1 @@
|
|||
target_stm32f303(BETAFLIGHTF3 DEFINITIONS "SPRACINGF3")
|
||||
target_stm32f303xc(BETAFLIGHTF3 COMPILE_DEFINITIONS "SPRACINGF3")
|
||||
|
|
|
|||
|
|
@ -1 +1 @@
|
|||
target_stm32f405(BETAFLIGHTF4)
|
||||
target_stm32f405xg(BETAFLIGHTF4)
|
||||
|
|
|
|||
|
|
@ -1 +1 @@
|
|||
target_stm32f405(BLUEJAYF4)
|
||||
target_stm32f405xg(BLUEJAYF4)
|
||||
|
|
|
|||
|
|
@ -1,3 +1,3 @@
|
|||
target_stm32f405(CLRACINGF4AIR)
|
||||
target_stm32f405(CLRACINGF4AIRV2)
|
||||
target_stm32f405(CLRACINGF4AIRV3)
|
||||
target_stm32f405xg(CLRACINGF4AIR)
|
||||
target_stm32f405xg(CLRACINGF4AIRV2)
|
||||
target_stm32f405xg(CLRACINGF4AIRV3)
|
||||
|
|
|
|||
|
|
@ -1,2 +1,2 @@
|
|||
target_stm32f405(COLIBRI HSE_MHZ 16)
|
||||
target_stm32f405(QUANTON HSE_MHZ 16)
|
||||
target_stm32f405xg(COLIBRI HSE_MHZ 16)
|
||||
target_stm32f405xg(QUANTON HSE_MHZ 16)
|
||||
|
|
|
|||
|
|
@ -1 +1 @@
|
|||
target_stm32f405(DALRCF405)
|
||||
target_stm32f405xg(DALRCF405)
|
||||
|
|
|
|||
|
|
@ -1 +1 @@
|
|||
target_stm32f722(DALRCF722DUAL)
|
||||
target_stm32f722xe(DALRCF722DUAL)
|
||||
|
|
|
|||
|
|
@ -1 +1 @@
|
|||
target_stm32f405(F4BY)
|
||||
target_stm32f405xg(F4BY)
|
||||
|
|
|
|||
|
|
@ -1 +1 @@
|
|||
target_stm32f303(FALCORE HSE_MHZ 12)
|
||||
target_stm32f303xc(FALCORE HSE_MHZ 12)
|
||||
|
|
|
|||
|
|
@ -1,2 +1,2 @@
|
|||
target_stm32f405(FF_F35_LIGHTNING)
|
||||
target_stm32f405(WINGFC)
|
||||
target_stm32f405xg(FF_F35_LIGHTNING)
|
||||
target_stm32f405xg(WINGFC)
|
||||
|
|
|
|||
|
|
@ -1 +1 @@
|
|||
target_stm32f405(FF_FORTINIF4)
|
||||
target_stm32f405xg(FF_FORTINIF4)
|
||||
|
|
|
|||
|
|
@ -1,2 +1,2 @@
|
|||
target_stm32f405(FF_PIKOF4)
|
||||
target_stm32f405(FF_PIKOF4OSD)
|
||||
target_stm32f405xg(FF_PIKOF4)
|
||||
target_stm32f405xg(FF_PIKOF4OSD)
|
||||
|
|
|
|||
|
|
@ -1,2 +1,2 @@
|
|||
target_stm32f405(FIREWORKSV2)
|
||||
target_stm32f405(OMNIBUSF4V6)
|
||||
target_stm32f405xg(FIREWORKSV2)
|
||||
target_stm32f405xg(OMNIBUSF4V6)
|
||||
|
|
|
|||
|
|
@ -1 +1 @@
|
|||
target_stm32f405(FISHDRONEF4)
|
||||
target_stm32f405xg(FISHDRONEF4)
|
||||
|
|
|
|||
|
|
@ -1 +1 @@
|
|||
target_stm32f411(FLYWOOF411)
|
||||
target_stm32f411xe(FLYWOOF411)
|
||||
|
|
|
|||
|
|
@ -1 +1 @@
|
|||
target_stm32f722(FLYWOOF7DUAL)
|
||||
target_stm32f722xe(FLYWOOF7DUAL)
|
||||
|
|
|
|||
|
|
@ -1 +1 @@
|
|||
target_stm32f405(FOXEERF405)
|
||||
target_stm32f405xg(FOXEERF405)
|
||||
|
|
|
|||
|
|
@ -1,2 +1,2 @@
|
|||
target_stm32f722(FOXEERF722DUAL)
|
||||
target_stm32f722(FOXEERF722V2)
|
||||
target_stm32f722xe(FOXEERF722DUAL)
|
||||
target_stm32f722xe(FOXEERF722V2)
|
||||
|
|
|
|||
|
|
@ -1 +1 @@
|
|||
target_stm32f303(FRSKYF3)
|
||||
target_stm32f303xc(FRSKYF3)
|
||||
|
|
|
|||
|
|
@ -1 +1 @@
|
|||
target_stm32f405(FRSKYF4)
|
||||
target_stm32f405xg(FRSKYF4)
|
||||
|
|
|
|||
|
|
@ -1,2 +1,2 @@
|
|||
target_stm32f303(FURYF3)
|
||||
target_stm32f303(FURYF3_SPIFLASH)
|
||||
target_stm32f303xc(FURYF3)
|
||||
target_stm32f303xc(FURYF3_SPIFLASH)
|
||||
|
|
|
|||
|
|
@ -1,2 +1,2 @@
|
|||
target_stm32f405(FURYF4OSD)
|
||||
target_stm32f405(MAMBAF405)
|
||||
target_stm32f405xg(FURYF4OSD)
|
||||
target_stm32f405xg(MAMBAF405)
|
||||
|
|
|
|||
|
|
@ -1 +1 @@
|
|||
target_stm32f722(HGLRCF722)
|
||||
target_stm32f722xe(HGLRCF722)
|
||||
|
|
|
|||
|
|
@ -1 +1 @@
|
|||
target_stm32f411(IFLIGHTF4_SUCCEXD)
|
||||
target_stm32f411xe(IFLIGHTF4_SUCCEXD)
|
||||
|
|
|
|||
|
|
@ -1 +1 @@
|
|||
target_stm32f405(IFLIGHTF4_TWING)
|
||||
target_stm32f405xg(IFLIGHTF4_TWING)
|
||||
|
|
|
|||
|
|
@ -1 +1 @@
|
|||
target_stm32f722(IFLIGHTF7_TWING)
|
||||
target_stm32f722xe(IFLIGHTF7_TWING)
|
||||
|
|
|
|||
|
|
@ -1,2 +1,2 @@
|
|||
target_stm32f405(KAKUTEF4)
|
||||
target_stm32f405(KAKUTEF4V2)
|
||||
target_stm32f405xg(KAKUTEF4)
|
||||
target_stm32f405xg(KAKUTEF4V2)
|
||||
|
|
|
|||
|
|
@ -1,3 +1,3 @@
|
|||
target_stm32f745(KAKUTEF7)
|
||||
target_stm32f745(KAKUTEF7HDV)
|
||||
target_stm32f745(KAKUTEF7MINI)
|
||||
target_stm32f745xg(KAKUTEF7)
|
||||
target_stm32f745xg(KAKUTEF7HDV)
|
||||
target_stm32f745xg(KAKUTEF7MINI)
|
||||
|
|
|
|||
|
|
@ -1 +1 @@
|
|||
target_stm32f303(KFC32F3_INAV)
|
||||
target_stm32f303xc(KFC32F3_INAV)
|
||||
|
|
|
|||
|
|
@ -1 +1 @@
|
|||
target_stm32f303(LUX_RACE)
|
||||
target_stm32f303xc(LUX_RACE)
|
||||
|
|
|
|||
|
|
@ -1 +1 @@
|
|||
target_stm32f405(MAMBAF405US)
|
||||
target_stm32f405xg(MAMBAF405US)
|
||||
|
|
|
|||
|
|
@ -1 +1 @@
|
|||
target_stm32f722(MAMBAF722)
|
||||
target_stm32f722xe(MAMBAF722)
|
||||
|
|
|
|||
|
|
@ -1,3 +1,3 @@
|
|||
target_stm32f405(MATEKF405)
|
||||
target_stm32f405(MATEKF405_SERVOS6)
|
||||
target_stm32f405(MATEKF405OSD)
|
||||
target_stm32f405xg(MATEKF405)
|
||||
target_stm32f405xg(MATEKF405_SERVOS6)
|
||||
target_stm32f405xg(MATEKF405OSD)
|
||||
|
|
|
|||
|
|
@ -1 +1 @@
|
|||
target_stm32f405(MATEKF405SE)
|
||||
target_stm32f405xg(MATEKF405SE)
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
target_stm32f411(MATEKF411)
|
||||
target_stm32f411(MATEKF411_FD_SFTSRL)
|
||||
target_stm32f411(MATEKF411_RSSI)
|
||||
target_stm32f411(MATEKF411_SFTSRL2)
|
||||
target_stm32f411xe(MATEKF411)
|
||||
target_stm32f411xe(MATEKF411_FD_SFTSRL)
|
||||
target_stm32f411xe(MATEKF411_RSSI)
|
||||
target_stm32f411xe(MATEKF411_SFTSRL2)
|
||||
|
|
|
|||
|
|
@ -1 +1 @@
|
|||
target_stm32f411(MATEKF411SE)
|
||||
target_stm32f411xe(MATEKF411SE)
|
||||
|
|
|
|||
|
|
@ -1,2 +1,2 @@
|
|||
target_stm32f722(MATEKF722)
|
||||
target_stm32f722(MATEKF722_HEXSERVO)
|
||||
target_stm32f722xe(MATEKF722)
|
||||
target_stm32f722xe(MATEKF722_HEXSERVO)
|
||||
|
|
|
|||
|
|
@ -1 +1 @@
|
|||
target_stm32f722(MATEKF722PX)
|
||||
target_stm32f722xe(MATEKF722PX)
|
||||
|
|
|
|||
|
|
@ -1,2 +1,2 @@
|
|||
target_stm32f722(MATEKF722SE)
|
||||
target_stm32f722(MATEKF722MINI)
|
||||
target_stm32f722xe(MATEKF722SE)
|
||||
target_stm32f722xe(MATEKF722MINI)
|
||||
|
|
|
|||
|
|
@ -1 +1 @@
|
|||
target_stm32f765(MATEKF765)
|
||||
target_stm32f765xi(MATEKF765)
|
||||
|
|
|
|||
|
|
@ -1 +1 @@
|
|||
target_stm32f303(MOTOLAB)
|
||||
target_stm32f303xc(MOTOLAB)
|
||||
|
|
|
|||
|
|
@ -1 +1 @@
|
|||
target_stm32f411(NOX)
|
||||
target_stm32f411xe(NOX)
|
||||
|
|
|
|||
|
|
@ -1 +1 @@
|
|||
target_stm32f303(OMNIBUS)
|
||||
target_stm32f303xc(OMNIBUS)
|
||||
|
|
|
|||
|
|
@ -1,12 +1,12 @@
|
|||
target_stm32f405(DYSF4PRO)
|
||||
target_stm32f405(DYSF4PROV2)
|
||||
target_stm32f405(OMNIBUSF4)
|
||||
target_stm32f405xg(DYSF4PRO)
|
||||
target_stm32f405xg(DYSF4PROV2)
|
||||
target_stm32f405xg(OMNIBUSF4)
|
||||
# the OMNIBUSF4SD has an SDCARD instead of flash, a BMP280 baro and therefore a slightly different ppm/pwm and SPI mapping
|
||||
target_stm32f405(OMNIBUSF4PRO)
|
||||
target_stm32f405(OMNIBUSF4PRO_LEDSTRIPM5)
|
||||
target_stm32f405(OMNIBUSF4V3_S5_S6_2SS)
|
||||
target_stm32f405(OMNIBUSF4V3_S5S6_SS)
|
||||
target_stm32f405(OMNIBUSF4V3_S6_SS)
|
||||
target_stm32f405xg(OMNIBUSF4PRO)
|
||||
target_stm32f405xg(OMNIBUSF4PRO_LEDSTRIPM5)
|
||||
target_stm32f405xg(OMNIBUSF4V3_S5_S6_2SS)
|
||||
target_stm32f405xg(OMNIBUSF4V3_S5S6_SS)
|
||||
target_stm32f405xg(OMNIBUSF4V3_S6_SS)
|
||||
# OMNIBUSF4V3 is a (almost identical) variant of OMNIBUSF4PRO target,
|
||||
# except for an inverter on UART6.
|
||||
target_stm32f405(OMNIBUSF4V3)
|
||||
target_stm32f405xg(OMNIBUSF4V3)
|
||||
|
|
|
|||
|
|
@ -1,2 +1,2 @@
|
|||
target_stm32f745(OMNIBUSF7)
|
||||
target_stm32f745(OMNIBUSF7V2)
|
||||
target_stm32f745xg(OMNIBUSF7)
|
||||
target_stm32f745xg(OMNIBUSF7V2)
|
||||
|
|
|
|||
|
|
@ -1 +1 @@
|
|||
target_stm32f722(OMNIBUSF7NXT)
|
||||
target_stm32f722xe(OMNIBUSF7NXT)
|
||||
|
|
|
|||
|
|
@ -1 +1 @@
|
|||
target_stm32f303(PIKOBLX)
|
||||
target_stm32f303xc(PIKOBLX)
|
||||
|
|
|
|||
|
|
@ -1 +1 @@
|
|||
target_stm32f427(PIXRACER HSE_MHZ 24)
|
||||
target_stm32f427xg(PIXRACER HSE_MHZ 24)
|
||||
|
|
|
|||
|
|
@ -1 +1 @@
|
|||
target_stm32f303(RCEXPLORERF3)
|
||||
target_stm32f303xc(RCEXPLORERF3)
|
||||
|
|
|
|||
|
|
@ -1 +1 @@
|
|||
target_stm32f405(REVO)
|
||||
target_stm32f405xg(REVO)
|
||||
|
|
|
|||
|
|
@ -1 +1 @@
|
|||
target_stm32f303(RMDO DEFINITIONS "SPRACINGF3")
|
||||
target_stm32f303xc(RMDO COMPILE_DEFINITIONS "SPRACINGF3")
|
||||
|
|
|
|||
|
|
@ -1 +1 @@
|
|||
target_stm32f303(SPARKY)
|
||||
target_stm32f303xc(SPARKY)
|
||||
|
|
|
|||
|
|
@ -1 +1 @@
|
|||
target_stm32f405(SPARKY2)
|
||||
target_stm32f405xg(SPARKY2)
|
||||
|
|
|
|||
|
|
@ -1,3 +1,3 @@
|
|||
target_stm32f405(SPEEDYBEEF4)
|
||||
target_stm32f405(SPEEDYBEEF4_SFTSRL1)
|
||||
target_stm32f405(SPEEDYBEEF4_SFTSRL2)
|
||||
target_stm32f405xg(SPEEDYBEEF4)
|
||||
target_stm32f405xg(SPEEDYBEEF4_SFTSRL1)
|
||||
target_stm32f405xg(SPEEDYBEEF4_SFTSRL2)
|
||||
|
|
|
|||
|
|
@ -1 +1 @@
|
|||
target_stm32f303(SPRACINGF3)
|
||||
target_stm32f303xc(SPRACINGF3)
|
||||
|
|
|
|||
|
|
@ -1,2 +1,2 @@
|
|||
target_stm32f303(SPRACINGF3EVO)
|
||||
target_stm32f303(SPRACINGF3EVO_1SS)
|
||||
target_stm32f303xc(SPRACINGF3EVO)
|
||||
target_stm32f303xc(SPRACINGF3EVO_1SS)
|
||||
|
|
|
|||
|
|
@ -1 +1 @@
|
|||
target_stm32f303(SPRACINGF3MINI)
|
||||
target_stm32f303xc(SPRACINGF3MINI)
|
||||
|
|
|
|||
|
|
@ -1 +1 @@
|
|||
target_stm32f405(SPRACINGF4EVO)
|
||||
target_stm32f405xg(SPRACINGF4EVO)
|
||||
|
|
|
|||
|
|
@ -1 +1 @@
|
|||
target_stm32f722(SPRACINGF7DUAL)
|
||||
target_stm32f722xe(SPRACINGF7DUAL)
|
||||
|
|
|
|||
|
|
@ -1 +1 @@
|
|||
target_stm32f722(YUPIF7)
|
||||
target_stm32f722xe(YUPIF7)
|
||||
|
|
@ -1 +1 @@
|
|||
target_stm32f722(ZEEZF7)
|
||||
target_stm32f722xe(ZEEZF7)
|
||||
|
|
|
|||
0
src/main/target/link/stm32_flash_F427.ld
Executable file → Normal file
0
src/main/target/link/stm32_flash_F427.ld
Executable file → Normal file
|
|
@ -1,9 +1,9 @@
|
|||
/*
|
||||
*****************************************************************************
|
||||
**
|
||||
** File : stm32_flash_split.ld
|
||||
** File : stm32_flash_f7_split.ld
|
||||
**
|
||||
** Abstract : Common linker script for STM32 devices.
|
||||
** Abstract : Common linker script for STM32F7 devices.
|
||||
**
|
||||
*****************************************************************************
|
||||
*/
|
||||
|
|
|
|||
30
src/main/target/link/stm32_flash_f303xc.ld
Normal file
30
src/main/target/link/stm32_flash_f303xc.ld
Normal file
|
|
@ -0,0 +1,30 @@
|
|||
/*
|
||||
*****************************************************************************
|
||||
**
|
||||
** File : stm32_flash.ld
|
||||
**
|
||||
** Abstract : Linker script for STM32F30x Device with
|
||||
** 256KByte FLASH and 40KByte RAM
|
||||
**
|
||||
*****************************************************************************
|
||||
*/
|
||||
|
||||
/* Stack & Heap sizes */
|
||||
_Min_Heap_Size = 0;
|
||||
_Min_Stack_Size = 0x1800;
|
||||
|
||||
/* Specify the memory areas. */
|
||||
MEMORY
|
||||
{
|
||||
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 250K
|
||||
FLASH_CONFIG (r) : ORIGIN = 0x0803E800, LENGTH = 6K
|
||||
|
||||
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 40K
|
||||
CCM (xrw) : ORIGIN = 0x10000000, LENGTH = 8K
|
||||
MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K
|
||||
}
|
||||
|
||||
REGION_ALIAS("STACKRAM", CCM)
|
||||
REGION_ALIAS("FASTRAM", CCM)
|
||||
|
||||
INCLUDE "stm32_flash.ld"
|
||||
40
src/main/target/link/stm32_flash_f405xg.ld
Normal file
40
src/main/target/link/stm32_flash_f405xg.ld
Normal file
|
|
@ -0,0 +1,40 @@
|
|||
/*
|
||||
*****************************************************************************
|
||||
**
|
||||
** File : stm32_flash_f405.ld
|
||||
**
|
||||
** Abstract : Linker script for STM32F405RG Device with
|
||||
** 1024KByte FLASH, 128KByte RAM 64KByte CCM (RAM)
|
||||
**
|
||||
*****************************************************************************
|
||||
*/
|
||||
|
||||
/* Stack & Heap sizes */
|
||||
_Min_Heap_Size = 0;
|
||||
_Min_Stack_Size = 0x1800;
|
||||
|
||||
/* Entry Point */
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
/*
|
||||
0x08000000 to 0x08100000 1024K full flash,
|
||||
0x08000000 to 0x080DFFFF 896K firmware,
|
||||
0x080E0000 to 0x08100000 128K config, // FLASH_Sector_11
|
||||
*/
|
||||
|
||||
/* Specify the memory areas */
|
||||
MEMORY
|
||||
{
|
||||
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 896K
|
||||
FLASH_CONFIG (r) : ORIGIN = 0x080E0000, LENGTH = 128K
|
||||
|
||||
RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 128K
|
||||
CCM (rwx) : ORIGIN = 0x10000000, LENGTH = 64K
|
||||
BACKUP_SRAM (rwx) : ORIGIN = 0x40024000, LENGTH = 4K
|
||||
MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K
|
||||
}
|
||||
|
||||
REGION_ALIAS("STACKRAM", CCM)
|
||||
REGION_ALIAS("FASTRAM", CCM)
|
||||
|
||||
INCLUDE "stm32_flash.ld"
|
||||
43
src/main/target/link/stm32_flash_f405xg_bl.ld
Normal file
43
src/main/target/link/stm32_flash_f405xg_bl.ld
Normal file
|
|
@ -0,0 +1,43 @@
|
|||
/*
|
||||
*****************************************************************************
|
||||
**
|
||||
** File : stm32_flash_f405.ld
|
||||
**
|
||||
** Abstract : Linker script for STM32F405RG Device with
|
||||
** 1024KByte FLASH, 128KByte RAM 64KByte CCM (RAM)
|
||||
**
|
||||
*****************************************************************************
|
||||
*/
|
||||
|
||||
/* Stack & Heap sizes */
|
||||
_Min_Heap_Size = 0;
|
||||
_Min_Stack_Size = 0x1800;
|
||||
|
||||
/* Entry Point */
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
/*
|
||||
0x08000000 to 0x08100000 1024K full flash,
|
||||
0x08000000 to 0x080DFFFF 896K firmware,
|
||||
0x080E0000 to 0x08100000 128K config, // FLASH_Sector_11
|
||||
*/
|
||||
|
||||
/* Specify the memory areas */
|
||||
MEMORY
|
||||
{
|
||||
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 32K
|
||||
FIRMWARE (rx) : ORIGIN = 0x08008000, LENGTH = 864K
|
||||
FLASH_CONFIG (r) : ORIGIN = 0x080E0000, LENGTH = 128K
|
||||
|
||||
RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 128K
|
||||
CCM (rwx) : ORIGIN = 0x10000000, LENGTH = 64K
|
||||
BACKUP_SRAM (rwx) : ORIGIN = 0x40024000, LENGTH = 4K
|
||||
MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K
|
||||
}
|
||||
|
||||
REGION_ALIAS("STACKRAM", CCM)
|
||||
REGION_ALIAS("FASTRAM", CCM)
|
||||
|
||||
__firmware_start = ORIGIN(FIRMWARE);
|
||||
|
||||
INCLUDE "stm32_flash.ld"
|
||||
42
src/main/target/link/stm32_flash_f405xg_for_bl.ld
Normal file
42
src/main/target/link/stm32_flash_f405xg_for_bl.ld
Normal file
|
|
@ -0,0 +1,42 @@
|
|||
/*
|
||||
*****************************************************************************
|
||||
**
|
||||
** File : stm32_flash_f405.ld
|
||||
**
|
||||
** Abstract : Linker script for STM32F405RG Device with
|
||||
** 1024KByte FLASH, 128KByte RAM 64KByte CCM (RAM)
|
||||
**
|
||||
*****************************************************************************
|
||||
*/
|
||||
|
||||
/* Stack & Heap sizes */
|
||||
_Min_Heap_Size = 0;
|
||||
_Min_Stack_Size = 0x1800;
|
||||
|
||||
/* Entry Point */
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
/*
|
||||
0x08000000 to 0x08100000 1024K full flash,
|
||||
0x08000000 to 0x080DFFFF 896K firmware,
|
||||
0x080E0000 to 0x08100000 128K config, // FLASH_Sector_11
|
||||
*/
|
||||
|
||||
/* Specify the memory areas */
|
||||
MEMORY
|
||||
{
|
||||
FLASH (rx) : ORIGIN = 0x08008000, LENGTH = 864K
|
||||
FLASH_CONFIG (r) : ORIGIN = 0x080E0000, LENGTH = 128K
|
||||
|
||||
RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 128K
|
||||
CCM (rwx) : ORIGIN = 0x10000000, LENGTH = 64K
|
||||
BACKUP_SRAM (rwx) : ORIGIN = 0x40024000, LENGTH = 4K
|
||||
MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K
|
||||
}
|
||||
|
||||
REGION_ALIAS("STACKRAM", CCM)
|
||||
REGION_ALIAS("FASTRAM", CCM)
|
||||
|
||||
__firmware_start = ORIGIN(FLASH);
|
||||
|
||||
INCLUDE "stm32_flash.ld"
|
||||
40
src/main/target/link/stm32_flash_f411xe.ld
Normal file
40
src/main/target/link/stm32_flash_f411xe.ld
Normal file
|
|
@ -0,0 +1,40 @@
|
|||
/*
|
||||
*****************************************************************************
|
||||
**
|
||||
** File : stm32_flash_f411.ld
|
||||
**
|
||||
** Abstract : Linker script for STM32F11 Device with
|
||||
** 512KByte FLASH, 128KByte RAM
|
||||
**
|
||||
*****************************************************************************
|
||||
*/
|
||||
|
||||
/* Stack & Heap sizes */
|
||||
_Min_Heap_Size = 0;
|
||||
_Min_Stack_Size = 0x1800;
|
||||
|
||||
/* Entry Point */
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
/*
|
||||
0x08000000 to 0x0807FFFF 512K full flash,
|
||||
0x08000000 to 0x08003FFF 16K isr vector, startup code,
|
||||
0x08004000 to 0x08007FFF 16K config, // FLASH_Sector_1
|
||||
0x08008000 to 0x0807FFFF 480K firmware,
|
||||
*/
|
||||
|
||||
/* Specify the memory areas */
|
||||
MEMORY
|
||||
{
|
||||
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 16K
|
||||
FLASH_CONFIG (r) : ORIGIN = 0x08004000, LENGTH = 16K
|
||||
FLASH1 (rx) : ORIGIN = 0x08008000, LENGTH = 480K
|
||||
|
||||
RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 128K
|
||||
MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K
|
||||
}
|
||||
|
||||
REGION_ALIAS("STACKRAM", RAM)
|
||||
REGION_ALIAS("FASTRAM", RAM)
|
||||
|
||||
INCLUDE "stm32_flash_split.ld"
|
||||
59
src/main/target/link/stm32_flash_f427xg.ld
Normal file
59
src/main/target/link/stm32_flash_f427xg.ld
Normal file
|
|
@ -0,0 +1,59 @@
|
|||
/*
|
||||
*****************************************************************************
|
||||
**
|
||||
** File : stm32_flash.ld
|
||||
**
|
||||
** Abstract : Linker script for STM32F427 Device with
|
||||
** 2048 KByte FLASH, 192KByte RAM
|
||||
**
|
||||
** Set heap size, stack size and stack location according
|
||||
** to application requirements.
|
||||
**
|
||||
** Set memory bank area and size if external memory is used.
|
||||
**
|
||||
** Target : STMicroelectronics STM32
|
||||
**
|
||||
** Environment : Atollic TrueSTUDIO(R)
|
||||
**
|
||||
** Distribution: The file is distributed as is, without any warranty
|
||||
** of any kind.
|
||||
**
|
||||
** (c)Copyright Atollic AB.
|
||||
** You may use this file as-is or modify it according to the needs of your
|
||||
** project. Distribution of this file (unmodified or modified) is not
|
||||
** permitted. Atollic AB permit registered Atollic TrueSTUDIO(R) users the
|
||||
** rights to distribute the assembled, compiled & linked contents of this
|
||||
** file as part of an application binary file, provided that it is built
|
||||
** using the Atollic TrueSTUDIO(R) toolchain.
|
||||
**
|
||||
*****************************************************************************
|
||||
*/
|
||||
|
||||
/* Stack & Heap sizes */
|
||||
_Min_Heap_Size = 0;
|
||||
_Min_Stack_Size = 0x1800;
|
||||
|
||||
/* Entry Point */
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
/*
|
||||
0x08000000 to 0x08100000 1024K full flash,
|
||||
0x08000000 to 0x080DFFFF 896K firmware,
|
||||
0x080E0000 to 0x08100000 128K config, // FLASH_Sector_11
|
||||
*/
|
||||
|
||||
/* Specify the memory areas */
|
||||
MEMORY
|
||||
{
|
||||
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 896K
|
||||
FLASH_CONFIG (r) : ORIGIN = 0x080E0000, LENGTH = 128K
|
||||
|
||||
RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 128K
|
||||
CCM (rwx) : ORIGIN = 0x10000000, LENGTH = 64K
|
||||
MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K
|
||||
}
|
||||
|
||||
REGION_ALIAS("STACKRAM", CCM)
|
||||
REGION_ALIAS("FASTRAM", CCM)
|
||||
|
||||
INCLUDE "stm32_flash.ld"
|
||||
40
src/main/target/link/stm32_flash_f446xe.ld
Normal file
40
src/main/target/link/stm32_flash_f446xe.ld
Normal file
|
|
@ -0,0 +1,40 @@
|
|||
/*
|
||||
*****************************************************************************
|
||||
**
|
||||
** File : stm32_flash_f411.ld
|
||||
**
|
||||
** Abstract : Linker script for STM32F11 Device with
|
||||
** 512KByte FLASH, 128KByte RAM
|
||||
**
|
||||
*****************************************************************************
|
||||
*/
|
||||
|
||||
/* Stack & Heap sizes */
|
||||
_Min_Heap_Size = 0;
|
||||
_Min_Stack_Size = 0x1800;
|
||||
|
||||
/* Entry Point */
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
/*
|
||||
0x08000000 to 0x0807FFFF 512K full flash,
|
||||
0x08000000 to 0x08003FFF 16K isr vector, startup code,
|
||||
0x08004000 to 0x08007FFF 16K config, // FLASH_Sector_1
|
||||
0x08008000 to 0x0807FFFF 480K firmware,
|
||||
*/
|
||||
|
||||
/* Specify the memory areas */
|
||||
MEMORY
|
||||
{
|
||||
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 16K
|
||||
FLASH_CONFIG (r) : ORIGIN = 0x08004000, LENGTH = 16K
|
||||
FLASH1 (rx) : ORIGIN = 0x08008000, LENGTH = 480K
|
||||
|
||||
RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 128K
|
||||
MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K
|
||||
}
|
||||
|
||||
REGION_ALIAS("STACKRAM", RAM)
|
||||
REGION_ALIAS("FASTRAM", RAM)
|
||||
|
||||
INCLUDE "stm32_flash_split.ld"
|
||||
48
src/main/target/link/stm32_flash_f722xe.ld
Normal file
48
src/main/target/link/stm32_flash_f722xe.ld
Normal file
|
|
@ -0,0 +1,48 @@
|
|||
/*
|
||||
*****************************************************************************
|
||||
**
|
||||
** File : stm32_flash_f722xe.ld
|
||||
**
|
||||
** Abstract : Linker script for STM32F722RETx Device with
|
||||
** 512KByte FLASH, 256KByte RAM
|
||||
**
|
||||
*****************************************************************************
|
||||
*/
|
||||
|
||||
/* Stack & Heap sizes */
|
||||
_Min_Heap_Size = 0;
|
||||
_Min_Stack_Size = 0x1800;
|
||||
|
||||
/* Entry Point */
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
/*
|
||||
0x08000000 to 0x0807FFFF 512K full flash,
|
||||
0x08000000 to 0x08003FFF 16K isr vector, startup code,
|
||||
0x08004000 to 0x08007FFF 16K config, // FLASH_Sector_1
|
||||
0x08008000 to 0x0807FFFF 480K firmware,
|
||||
*/
|
||||
|
||||
/* Specify the memory areas */
|
||||
MEMORY
|
||||
{
|
||||
ITCM_RAM (rwx) : ORIGIN = 0x00000000, LENGTH = 16K
|
||||
|
||||
ITCM_FLASH (rx) : ORIGIN = 0x00200000, LENGTH = 16K
|
||||
/* config occupies the entire flash sector 1 for the ease of erasure, 16K on F72x */
|
||||
ITCM_FLASH_CONFIG (r) : ORIGIN = 0x00204000, LENGTH = 16K
|
||||
ITCM_FLASH1 (rx) : ORIGIN = 0x00208000, LENGTH = 480K
|
||||
|
||||
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 16K
|
||||
FLASH_CONFIG (r) : ORIGIN = 0x08004000, LENGTH = 16K
|
||||
FLASH1 (rx) : ORIGIN = 0x08008000, LENGTH = 480K
|
||||
|
||||
TCM (rwx) : ORIGIN = 0x20000000, LENGTH = 64K
|
||||
RAM (rwx) : ORIGIN = 0x20010000, LENGTH = 192K
|
||||
MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K
|
||||
}
|
||||
|
||||
REGION_ALIAS("STACKRAM", TCM)
|
||||
REGION_ALIAS("FASTRAM", TCM)
|
||||
|
||||
INCLUDE "stm32_flash_f7_split.ld"
|
||||
50
src/main/target/link/stm32_flash_f722xe_bl.ld
Normal file
50
src/main/target/link/stm32_flash_f722xe_bl.ld
Normal file
|
|
@ -0,0 +1,50 @@
|
|||
/*
|
||||
*****************************************************************************
|
||||
**
|
||||
** File : stm32_flash_f722.ld
|
||||
**
|
||||
** Abstract : Linker script for STM32F722RETx Device with
|
||||
** 512KByte FLASH, 256KByte RAM
|
||||
**
|
||||
*****************************************************************************
|
||||
*/
|
||||
|
||||
/* Stack & Heap sizes */
|
||||
_Min_Heap_Size = 0;
|
||||
_Min_Stack_Size = 0x1800;
|
||||
|
||||
/* Entry Point */
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
/*
|
||||
0x08000000 to 0x0807FFFF 512K full flash,
|
||||
0x08000000 to 0x08003FFF 16K isr vector, startup code,
|
||||
0x08004000 to 0x08007FFF 16K config, // FLASH_Sector_1
|
||||
0x08008000 to 0x0807FFFF 480K firmware,
|
||||
*/
|
||||
|
||||
/* Specify the memory areas */
|
||||
MEMORY
|
||||
{
|
||||
ITCM_RAM (rwx) : ORIGIN = 0x00000000, LENGTH = 16K
|
||||
|
||||
ITCM_FLASH (rx) : ORIGIN = 0x00200000, LENGTH = 16K
|
||||
/* config occupies the entire flash sector 1 for the ease of erasure, 16K on F72x */
|
||||
ITCM_FLASH_CONFIG (r) : ORIGIN = 0x00204000, LENGTH = 16K
|
||||
ITCM_FLASH1 (rx) : ORIGIN = 0x00208000, LENGTH = 480K
|
||||
|
||||
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 32K
|
||||
FIRMWARE (rx) : ORIGIN = 0x08008000, LENGTH = 16K
|
||||
FLASH_CONFIG (r) : ORIGIN = 0x0800c000, LENGTH = 16K
|
||||
|
||||
TCM (rwx) : ORIGIN = 0x20000000, LENGTH = 64K
|
||||
RAM (rwx) : ORIGIN = 0x20010000, LENGTH = 192K
|
||||
MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K
|
||||
}
|
||||
|
||||
REGION_ALIAS("STACKRAM", TCM)
|
||||
REGION_ALIAS("FASTRAM", TCM)
|
||||
|
||||
__firmware_start = ORIGIN(FIRMWARE);
|
||||
|
||||
INCLUDE "stm32_flash_F7.ld"
|
||||
50
src/main/target/link/stm32_flash_f722xe_for_bl.ld
Normal file
50
src/main/target/link/stm32_flash_f722xe_for_bl.ld
Normal file
|
|
@ -0,0 +1,50 @@
|
|||
/*
|
||||
*****************************************************************************
|
||||
**
|
||||
** File : stm32_flash_f722.ld
|
||||
**
|
||||
** Abstract : Linker script for STM32F722RETx Device with
|
||||
** 512KByte FLASH, 256KByte RAM
|
||||
**
|
||||
*****************************************************************************
|
||||
*/
|
||||
|
||||
/* Stack & Heap sizes */
|
||||
_Min_Heap_Size = 0;
|
||||
_Min_Stack_Size = 0x1800;
|
||||
|
||||
/* Entry Point */
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
/*
|
||||
0x08000000 to 0x0807FFFF 512K full flash,
|
||||
0x08000000 to 0x08003FFF 16K isr vector, startup code,
|
||||
0x08004000 to 0x08007FFF 16K config, // FLASH_Sector_1
|
||||
0x08008000 to 0x0807FFFF 480K firmware,
|
||||
*/
|
||||
|
||||
/* Specify the memory areas */
|
||||
MEMORY
|
||||
{
|
||||
ITCM_RAM (rwx) : ORIGIN = 0x00000000, LENGTH = 16K
|
||||
|
||||
/*ITCM_FLASH (rx) : ORIGIN = 0x00200000, LENGTH = 16K*/
|
||||
/* config occupies the entire flash sector 1 for the ease of erasure, 16K on F72x */
|
||||
/*ITCM_FLASH_CONFIG (r) : ORIGIN = 0x00204000, LENGTH = 16K*/
|
||||
/*ITCM_FLASH1 (rx) : ORIGIN = 0x00208000, LENGTH = 480K*/
|
||||
|
||||
FLASH (rx) : ORIGIN = 0x08008000, LENGTH = 16K
|
||||
FLASH_CONFIG (r) : ORIGIN = 0x0800c000, LENGTH = 16K
|
||||
FLASH1 (rx) : ORIGIN = 0x08010000, LENGTH = 448K
|
||||
|
||||
TCM (rwx) : ORIGIN = 0x20000000, LENGTH = 64K
|
||||
RAM (rwx) : ORIGIN = 0x20010000, LENGTH = 192K
|
||||
MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K
|
||||
}
|
||||
|
||||
REGION_ALIAS("STACKRAM", TCM)
|
||||
REGION_ALIAS("FASTRAM", TCM)
|
||||
|
||||
__firmware_start = ORIGIN(FLASH);
|
||||
|
||||
INCLUDE "stm32_flash_F7_split.ld"
|
||||
48
src/main/target/link/stm32_flash_f745xg.ld
Normal file
48
src/main/target/link/stm32_flash_f745xg.ld
Normal file
|
|
@ -0,0 +1,48 @@
|
|||
/*
|
||||
*****************************************************************************
|
||||
**
|
||||
** File : stm32_flash_f745xg.ld
|
||||
**
|
||||
** Abstract : Linker script for STM32F745xG Device with
|
||||
** 1024KByte FLASH, 320KByte RAM
|
||||
**
|
||||
*****************************************************************************
|
||||
*/
|
||||
|
||||
/* Stack & Heap sizes */
|
||||
_Min_Heap_Size = 0;
|
||||
_Min_Stack_Size = 0x1800;
|
||||
|
||||
/* Entry Point */
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
/*
|
||||
0x00000000 to 0x00003FFF 16K ITCM RAM,
|
||||
0x08000000 to 0x080FFFFF 1024K full flash,
|
||||
0x08000000 to 0x08007FFF 32K isr vector, startup code,
|
||||
0x08008000 to 0x0800FFFF 32K config, // FLASH_Sector_1
|
||||
0x08010000 to 0x080FFFFF 960K firmware,
|
||||
*/
|
||||
|
||||
/* Specify the memory areas */
|
||||
MEMORY
|
||||
{
|
||||
ITCM_RAM (rx) : ORIGIN = 0x00000000, LENGTH = 16K
|
||||
ITCM_FLASH (rx) : ORIGIN = 0x00200000, LENGTH = 32K
|
||||
/* config occupies the entire flash sector 1 for the ease of erasure, 32K on F74x */
|
||||
ITCM_FLASH_CONFIG (r) : ORIGIN = 0x00208000, LENGTH = 32K
|
||||
ITCM_FLASH1 (rx) : ORIGIN = 0x00210000, LENGTH = 960K
|
||||
|
||||
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 32K
|
||||
FLASH_CONFIG (r) : ORIGIN = 0x08008000, LENGTH = 32K
|
||||
FLASH1 (rx) : ORIGIN = 0x08010000, LENGTH = 960K
|
||||
|
||||
TCM (rwx) : ORIGIN = 0x20000000, LENGTH = 64K
|
||||
RAM (rwx) : ORIGIN = 0x20010000, LENGTH = 256K
|
||||
MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K
|
||||
}
|
||||
/* note CCM could be used for stack */
|
||||
REGION_ALIAS("STACKRAM", TCM)
|
||||
REGION_ALIAS("FASTRAM", TCM)
|
||||
|
||||
INCLUDE "stm32_flash_F7_split.ld"
|
||||
50
src/main/target/link/stm32_flash_f745xg_bl.ld
Normal file
50
src/main/target/link/stm32_flash_f745xg_bl.ld
Normal file
|
|
@ -0,0 +1,50 @@
|
|||
/*
|
||||
*****************************************************************************
|
||||
**
|
||||
** File : stm32_flash_f745.ld
|
||||
**
|
||||
** Abstract : Linker script for STM32F745VGTx Device with
|
||||
** 1024KByte FLASH, 320KByte RAM
|
||||
**
|
||||
*****************************************************************************
|
||||
*/
|
||||
|
||||
/* Stack & Heap sizes */
|
||||
_Min_Heap_Size = 0;
|
||||
_Min_Stack_Size = 0x1800;
|
||||
|
||||
/* Entry Point */
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
/*
|
||||
0x00000000 to 0x00003FFF 16K ITCM RAM,
|
||||
0x08000000 to 0x080FFFFF 1024K full flash,
|
||||
0x08000000 to 0x08007FFF 32K isr vector, startup code,
|
||||
0x08008000 to 0x0800FFFF 32K config, // FLASH_Sector_1
|
||||
0x08010000 to 0x080FFFFF 960K firmware,
|
||||
*/
|
||||
|
||||
/* Specify the memory areas */
|
||||
MEMORY
|
||||
{
|
||||
ITCM_RAM (rx) : ORIGIN = 0x00000000, LENGTH = 16K
|
||||
ITCM_FLASH (rx) : ORIGIN = 0x00200000, LENGTH = 32K
|
||||
/* config occupies the entire flash sector 1 for the ease of erasure, 32K on F74x */
|
||||
ITCM_FLASH_CONFIG (r) : ORIGIN = 0x00208000, LENGTH = 32K
|
||||
ITCM_FLASH1 (rx) : ORIGIN = 0x00210000, LENGTH = 928K
|
||||
|
||||
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 32K
|
||||
FIRMWARE (rx) : ORIGIN = 0x08008000, LENGTH = 32K
|
||||
FLASH_CONFIG (r) : ORIGIN = 0x08010000, LENGTH = 32K
|
||||
|
||||
TCM (rwx) : ORIGIN = 0x20000000, LENGTH = 64K
|
||||
RAM (rwx) : ORIGIN = 0x20010000, LENGTH = 256K
|
||||
MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K
|
||||
}
|
||||
/* note CCM could be used for stack */
|
||||
REGION_ALIAS("STACKRAM", TCM)
|
||||
REGION_ALIAS("FASTRAM", TCM)
|
||||
|
||||
__firmware_start = ORIGIN(FIRMWARE);
|
||||
|
||||
INCLUDE "stm32_flash_F7.ld"
|
||||
50
src/main/target/link/stm32_flash_f745xg_for_bl.ld
Normal file
50
src/main/target/link/stm32_flash_f745xg_for_bl.ld
Normal file
|
|
@ -0,0 +1,50 @@
|
|||
/*
|
||||
*****************************************************************************
|
||||
**
|
||||
** File : stm32_flash_f745.ld
|
||||
**
|
||||
** Abstract : Linker script for STM32F745VGTx Device with
|
||||
** 1024KByte FLASH, 320KByte RAM
|
||||
**
|
||||
*****************************************************************************
|
||||
*/
|
||||
|
||||
/* Stack & Heap sizes */
|
||||
_Min_Heap_Size = 0;
|
||||
_Min_Stack_Size = 0x1800;
|
||||
|
||||
/* Entry Point */
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
/*
|
||||
0x00000000 to 0x00003FFF 16K ITCM RAM,
|
||||
0x08000000 to 0x080FFFFF 1024K full flash,
|
||||
0x08000000 to 0x08007FFF 32K isr vector, startup code,
|
||||
0x08008000 to 0x0800FFFF 32K config, // FLASH_Sector_1
|
||||
0x08010000 to 0x080FFFFF 960K firmware,
|
||||
*/
|
||||
|
||||
/* Specify the memory areas */
|
||||
MEMORY
|
||||
{
|
||||
ITCM_RAM (rx) : ORIGIN = 0x00000000, LENGTH = 16K
|
||||
ITCM_FLASH (rx) : ORIGIN = 0x00200000, LENGTH = 32K
|
||||
/* config occupies the entire flash sector 1 for the ease of erasure, 32K on F74x */
|
||||
ITCM_FLASH_CONFIG (r) : ORIGIN = 0x00208000, LENGTH = 32K
|
||||
ITCM_FLASH1 (rx) : ORIGIN = 0x00210000, LENGTH = 960K
|
||||
|
||||
FLASH (rx) : ORIGIN = 0x08008000, LENGTH = 32K
|
||||
FLASH_CONFIG (r) : ORIGIN = 0x08010000, LENGTH = 32K
|
||||
FLASH1 (rx) : ORIGIN = 0x08018000, LENGTH = 928K
|
||||
|
||||
TCM (rwx) : ORIGIN = 0x20000000, LENGTH = 64K
|
||||
RAM (rwx) : ORIGIN = 0x20010000, LENGTH = 256K
|
||||
MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K
|
||||
}
|
||||
/* note CCM could be used for stack */
|
||||
REGION_ALIAS("STACKRAM", TCM)
|
||||
REGION_ALIAS("FASTRAM", TCM)
|
||||
|
||||
__firmware_start = ORIGIN(FLASH);
|
||||
|
||||
INCLUDE "stm32_flash_F7_split.ld"
|
||||
Loading…
Add table
Add a link
Reference in a new issue