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345 lines
9 KiB
C
345 lines
9 KiB
C
/**
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******************************************************************************
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* @file mt48lc4m32b2.c
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* @author MCD Application Team
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* @brief mt48lc4m32b2 sdram 128Mb driver file
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******************************************************************************
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* @attention
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*
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* <h2><center>© Copyright (c) 2019 STMicroelectronics.
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* All rights reserved.</center></h2>
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "mt48lc4m32b2.h"
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/** @addtogroup BSP
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* @{
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*/
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/** @addtogroup Components
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* @{
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*/
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/** @defgroup MT48LC4M32B2 MT48LC4M32B2
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* @brief This file provides a set of functions needed to drive the
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* MT48LC4M32B2 SDRAM memory.
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* @{
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*/
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/** @defgroup MT48LC4M32B2_Private_Variables MT48LC4M32B2 Private Variables
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* @{
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*/
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static FMC_SDRAM_CommandTypeDef Command;
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/**
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* @}
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*/
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/** @defgroup MT48LC4M32B2_Function_Prototypes MT48LC4M32B2 Function Prototypes
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* @{
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*/
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static int32_t MT48LC4M32B2_Delay(uint32_t Delay);
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/**
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* @}
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*/
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/** @defgroup MT48LC4M32B2_Exported_Functions MT48LC4M32B2 Exported Functions
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* @{
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*/
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/**
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* @brief Initializes the MT48LC4M32B2 SDRAM memory
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* @param Ctx : Component object pointer
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* @param pRegMode : Pointer to Register Mode stucture
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* @retval error status
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*/
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int32_t MT48LC4M32B2_Init(SDRAM_HandleTypeDef *Ctx, MT48LC4M32B2_Context_t *pRegMode)
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{
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int32_t ret = MT48LC4M32B2_ERROR;
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/* Step 1: Configure a clock configuration enable command */
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if(MT48LC4M32B2_ClockEnable(Ctx, pRegMode->TargetBank) == MT48LC4M32B2_OK)
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{
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/* Step 2: Insert 100 us minimum delay */
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/* Inserted delay is equal to 1 ms due to systick time base unit (ms) */
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(void)MT48LC4M32B2_Delay(1);
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/* Step 3: Configure a PALL (precharge all) command */
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if(MT48LC4M32B2_Precharge(Ctx, pRegMode->TargetBank) == MT48LC4M32B2_OK)
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{
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/* Step 4: Configure a Refresh command */
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if(MT48LC4M32B2_RefreshMode(Ctx, pRegMode->TargetBank, pRegMode->RefreshMode) == MT48LC4M32B2_OK)
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{
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/* Step 5: Program the external memory mode register */
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if(MT48LC4M32B2_ModeRegConfig(Ctx, pRegMode) == MT48LC4M32B2_OK)
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{
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/* Step 6: Set the refresh rate counter */
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if(MT48LC4M32B2_RefreshRate(Ctx, pRegMode->RefreshRate) == MT48LC4M32B2_OK)
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{
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ret = MT48LC4M32B2_OK;
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}
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}
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}
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}
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}
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return ret;
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}
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/**
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* @brief Enable SDRAM clock
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* @param Ctx : Component object pointer
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* @param Interface : Could be FMC_SDRAM_CMD_TARGET_BANK1 or FMC_SDRAM_CMD_TARGET_BANK2
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* @retval error status
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*/
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int32_t MT48LC4M32B2_ClockEnable(SDRAM_HandleTypeDef *Ctx, uint32_t Interface)
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{
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Command.CommandMode = MT48LC4M32B2_CLK_ENABLE_CMD;
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Command.CommandTarget = Interface;
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Command.AutoRefreshNumber = 1;
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Command.ModeRegisterDefinition = 0;
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/* Send the command */
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if(HAL_SDRAM_SendCommand(Ctx, &Command, MT48LC4M32B2_TIMEOUT) != HAL_OK)
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{
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return MT48LC4M32B2_ERROR;
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}
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else
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{
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return MT48LC4M32B2_OK;
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}
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}
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/**
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* @brief Precharge all sdram banks
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* @param Ctx : Component object pointer
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* @param Interface : Could be FMC_SDRAM_CMD_TARGET_BANK1 or FMC_SDRAM_CMD_TARGET_BANK2
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* @retval error status
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*/
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int32_t MT48LC4M32B2_Precharge(SDRAM_HandleTypeDef *Ctx, uint32_t Interface)
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{
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Command.CommandMode = MT48LC4M32B2_PALL_CMD;
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Command.CommandTarget = Interface;
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Command.AutoRefreshNumber = 1;
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Command.ModeRegisterDefinition = 0;
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/* Send the command */
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if(HAL_SDRAM_SendCommand(Ctx, &Command, MT48LC4M32B2_TIMEOUT) != HAL_OK)
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{
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return MT48LC4M32B2_ERROR;
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}
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else
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{
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return MT48LC4M32B2_OK;
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}
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}
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/**
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* @brief Program the external memory mode register
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* @param Ctx : Component object pointer
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* @param pRegMode : Pointer to Register Mode stucture
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* @retval error status
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*/
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int32_t MT48LC4M32B2_ModeRegConfig(SDRAM_HandleTypeDef *Ctx, MT48LC4M32B2_Context_t *pRegMode)
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{
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uint32_t tmpmrd;
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/* Program the external memory mode register */
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tmpmrd = (uint32_t)pRegMode->BurstLength |\
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pRegMode->BurstType |\
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pRegMode->CASLatency |\
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pRegMode->OperationMode |\
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pRegMode->WriteBurstMode;
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Command.CommandMode = MT48LC4M32B2_LOAD_MODE_CMD;
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Command.CommandTarget = pRegMode->TargetBank;
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Command.AutoRefreshNumber = 1;
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Command.ModeRegisterDefinition = tmpmrd;
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/* Send the command */
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if(HAL_SDRAM_SendCommand(Ctx, &Command, MT48LC4M32B2_TIMEOUT) != HAL_OK)
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{
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return MT48LC4M32B2_ERROR;
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}
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else
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{
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return MT48LC4M32B2_OK;
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}
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}
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/**
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* @brief Program the SDRAM timing
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* @param Ctx : Component object pointer
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* @param pTiming : Pointer to SDRAM timing configuration stucture
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* @retval error status
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*/
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int32_t MT48LC4M32B2_TimingConfig(SDRAM_HandleTypeDef *Ctx, FMC_SDRAM_TimingTypeDef *pTiming)
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{
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/* Program the SDRAM timing */
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if(HAL_SDRAM_Init(Ctx, pTiming) != HAL_OK)
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{
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return MT48LC4M32B2_ERROR;
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}
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else
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{
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return MT48LC4M32B2_OK;
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}
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}
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/**
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* @brief Configure Refresh mode
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* @param Ctx : Component object pointer
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* @param Interface : Could be FMC_SDRAM_CMD_TARGET_BANK1 or FMC_SDRAM_CMD_TARGET_BANK2
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* @param RefreshMode : Could be MT48LC4M32B2_CMD_AUTOREFRESH_MODE or
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* MT48LC4M32B2_CMD_SELFREFRESH_MODE
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* @retval error status
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*/
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int32_t MT48LC4M32B2_RefreshMode(SDRAM_HandleTypeDef *Ctx, uint32_t Interface, uint32_t RefreshMode)
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{
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Command.CommandMode = RefreshMode;
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Command.CommandTarget = Interface;
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Command.AutoRefreshNumber = 8;
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Command.ModeRegisterDefinition = 0;
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/* Send the command */
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if(HAL_SDRAM_SendCommand(Ctx, &Command, MT48LC4M32B2_TIMEOUT) != HAL_OK)
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{
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return MT48LC4M32B2_ERROR;
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}
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else
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{
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return MT48LC4M32B2_OK;
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}
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}
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/**
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* @brief Set the device refresh rate
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* @param Ctx : Component object pointer
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* @param RefreshCount : The refresh rate to be programmed
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* @retval error status
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*/
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int32_t MT48LC4M32B2_RefreshRate(SDRAM_HandleTypeDef *Ctx, uint32_t RefreshCount)
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{
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/* Set the device refresh rate */
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if(HAL_SDRAM_ProgramRefreshRate(Ctx, RefreshCount) != HAL_OK)
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{
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return MT48LC4M32B2_ERROR;
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}
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else
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{
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return MT48LC4M32B2_OK;
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}
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}
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/**
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* @brief Enter Power mode
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* @param Ctx : Component object pointer
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* @param Interface : Could be FMC_SDRAM_CMD_TARGET_BANK1 or FMC_SDRAM_CMD_TARGET_BANK2
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* @retval error status
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*/
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int32_t MT48LC4M32B2_EnterPowerMode(SDRAM_HandleTypeDef *Ctx, uint32_t Interface)
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{
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Command.CommandMode = MT48LC4M32B2_POWERDOWN_MODE_CMD;
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Command.CommandTarget = Interface;
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Command.AutoRefreshNumber = 1;
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Command.ModeRegisterDefinition = 0;
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/* Send the command */
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if(HAL_SDRAM_SendCommand(Ctx, &Command, MT48LC4M32B2_TIMEOUT) != HAL_OK)
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{
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return MT48LC4M32B2_ERROR;
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}
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else
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{
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return MT48LC4M32B2_OK;
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}
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}
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/**
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* @brief Exit Power mode
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* @param Ctx : Component object pointer
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* @param Interface : Could be FMC_SDRAM_CMD_TARGET_BANK1 or FMC_SDRAM_CMD_TARGET_BANK2
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* @retval error status
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*/
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int32_t MT48LC4M32B2_ExitPowerMode(SDRAM_HandleTypeDef *Ctx, uint32_t Interface)
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{
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Command.CommandMode = MT48LC4M32B2_NORMAL_MODE_CMD;
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Command.CommandTarget = Interface;
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Command.AutoRefreshNumber = 1;
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Command.ModeRegisterDefinition = 0;
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/* Send the command */
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if(HAL_SDRAM_SendCommand(Ctx, &Command, MT48LC4M32B2_TIMEOUT) != HAL_OK)
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{
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return MT48LC4M32B2_ERROR;
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}
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else
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{
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return MT48LC4M32B2_OK;
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}
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}
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/**
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* @brief Sends command to the SDRAM bank.
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* @param Ctx : Component object pointer
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* @param SdramCmd : Pointer to SDRAM command structure
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* @retval SDRAM status
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*/
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int32_t MT48LC4M32B2_Sendcmd(SDRAM_HandleTypeDef *Ctx, FMC_SDRAM_CommandTypeDef *SdramCmd)
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{
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if(HAL_SDRAM_SendCommand(Ctx, SdramCmd, MT48LC4M32B2_TIMEOUT) != HAL_OK)
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{
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return MT48LC4M32B2_ERROR;
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}
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else
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{
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return MT48LC4M32B2_OK;
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}
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}
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/**
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* @}
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*/
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/** @defgroup MT48LC4M32B2_Private_Functions MT48LC4M32B2 Private Functions
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* @{
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*/
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/**
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* @brief This function provides accurate delay (in milliseconds)
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* @param Delay: specifies the delay time length, in milliseconds
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* @retval MT48LC4M32B2_OK
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*/
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static int32_t MT48LC4M32B2_Delay(uint32_t Delay)
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{
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uint32_t tickstart;
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tickstart = HAL_GetTick();
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while((HAL_GetTick() - tickstart) < Delay)
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{
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}
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return MT48LC4M32B2_OK;
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}
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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