mirror of
https://github.com/iNavFlight/inav.git
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5107130ac0
git-svn-id: https://afrodevices.googlecode.com/svn/trunk/baseflight@465 7c89a4a9-59b9-e629-4cfe-3a2d53b20e61
42 lines
1.5 KiB
C
42 lines
1.5 KiB
C
#include "board.h"
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void gpioInit(GPIO_TypeDef *gpio, gpio_config_t *config)
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{
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uint32_t pinpos;
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for (pinpos = 0; pinpos < 16; pinpos++) {
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// are we doing this pin?
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if (config->pin & (0x1 << pinpos)) {
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// reference CRL or CRH, depending whether pin number is 0..7 or 8..15
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__IO uint32_t *cr = &gpio->CRL + (pinpos / 8);
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// mask out extra bits from pinmode, leaving just CNF+MODE
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uint32_t currentmode = config->mode & 0x0F;
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// offset to CNF and MODE portions of CRx register
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uint32_t shift = (pinpos % 8) * 4;
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// Read out current CRx value
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uint32_t tmp = *cr;
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// if we're in output mode, add speed too.
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if (config->mode & 0x10)
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currentmode |= config->speed;
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// Mask out 4 bits
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tmp &= ~(0xF << shift);
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// apply current pinmode
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tmp |= currentmode << shift;
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*cr = tmp;
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// Special handling for IPD/IPU
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if (config->mode == Mode_IPD) {
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gpio->ODR &= ~(1U << pinpos);
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} else if (config->mode == Mode_IPU) {
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gpio->ODR |= (1U << pinpos);
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}
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}
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}
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}
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void gpioExtiLineConfig(uint8_t portsrc, uint8_t pinsrc)
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{
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uint32_t tmp = 0x00;
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tmp = ((uint32_t)0x0F) << (0x04 * (pinsrc & (uint8_t)0x03));
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AFIO->EXTICR[pinsrc >> 0x02] &= ~tmp;
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AFIO->EXTICR[pinsrc >> 0x02] |= (((uint32_t)portsrc) << (0x04 * (pinsrc & (uint8_t)0x03)));
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}
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