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Typo fix
Because omeone asked to to explain what means LDC today ...
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2 changed files with 17 additions and 17 deletions
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@ -657,7 +657,7 @@
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#define LCD_RST_GPIO GPIOD
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#define LCD_RST_GPIO_PIN GPIO_Pin_15 // PD.15
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#define LCD_DMA DMA1
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#define LDC_DMA_Stream DMA1_Stream7
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#define LCD_DMA_Stream DMA1_Stream7
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#define LCD_DMA_Stream_IRQn DMA1_Stream7_IRQn
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#define LCD_DMA_Stream_IRQHandler DMA1_Stream7_IRQHandler
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#define LCD_DMA_FLAGS (DMA_HIFCR_CTCIF7 | DMA_HIFCR_CHTIF7 | DMA_HIFCR_CTEIF7 | DMA_HIFCR_CDMEIF7 | DMA_HIFCR_CFEIF7)
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@ -678,7 +678,7 @@
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#define LCD_RST_GPIO GPIOD
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#define LCD_RST_GPIO_PIN GPIO_Pin_12 // PD.12
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#define LCD_DMA DMA1
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#define LDC_DMA_Stream DMA1_Stream7
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#define LCD_DMA_Stream DMA1_Stream7
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#define LCD_DMA_Stream_IRQn DMA1_Stream7_IRQn
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#define LCD_DMA_Stream_IRQHandler DMA1_Stream7_IRQHandler
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#define LCD_DMA_FLAGS (DMA_HIFCR_CTCIF7 | DMA_HIFCR_CHTIF7 | DMA_HIFCR_CTEIF7 | DMA_HIFCR_CDMEIF7 | DMA_HIFCR_CFEIF7)
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@ -85,17 +85,17 @@ void lcdHardwareInit()
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GPIO_PinAFConfig(LCD_SPI_GPIO, LCD_MOSI_GPIO_PinSource, LCD_GPIO_AF);
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GPIO_PinAFConfig(LCD_SPI_GPIO, LCD_CLK_GPIO_PinSource, LCD_GPIO_AF);
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LDC_DMA_Stream->CR &= ~DMA_SxCR_EN; // Disable DMA
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LCD_DMA_Stream->CR &= ~DMA_SxCR_EN; // Disable DMA
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LCD_DMA->HIFCR = LCD_DMA_FLAGS; // Write ones to clear bits
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LDC_DMA_Stream->CR = DMA_SxCR_PL_0 | DMA_SxCR_MINC | DMA_SxCR_DIR_0;
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LDC_DMA_Stream->PAR = (uint32_t)&LCD_SPI->DR;
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LCD_DMA_Stream->CR = DMA_SxCR_PL_0 | DMA_SxCR_MINC | DMA_SxCR_DIR_0;
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LCD_DMA_Stream->PAR = (uint32_t)&LCD_SPI->DR;
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#if defined(PCBX7)
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LDC_DMA_Stream->NDTR = LCD_W;
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LCD_DMA_Stream->NDTR = LCD_W;
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#else
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LDC_DMA_Stream->M0AR = (uint32_t)displayBuf;
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LDC_DMA_Stream->NDTR = LCD_W*LCD_H/8*4;
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LCD_DMA_Stream->M0AR = (uint32_t)displayBuf;
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LCD_DMA_Stream->NDTR = LCD_W*LCD_H/8*4;
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#endif
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LDC_DMA_Stream->FCR = 0x05; // DMA_SxFCR_DMDIS | DMA_SxFCR_FTH_0;
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LCD_DMA_Stream->FCR = 0x05; // DMA_SxFCR_DMDIS | DMA_SxFCR_FTH_0;
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NVIC_EnableIRQ(LCD_DMA_Stream_IRQn);
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}
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@ -187,10 +187,10 @@ void lcdRefresh(bool wait)
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LCD_A0_HIGH();
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lcd_busy = true;
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LDC_DMA_Stream->CR &= ~DMA_SxCR_EN; // Disable DMA
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LCD_DMA_Stream->CR &= ~DMA_SxCR_EN; // Disable DMA
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LCD_DMA->HIFCR = LCD_DMA_FLAGS; // Write ones to clear bits
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LDC_DMA_Stream->M0AR = (uint32_t)p;
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LDC_DMA_Stream->CR |= DMA_SxCR_EN | DMA_SxCR_TCIE; // Enable DMA & TC interrupts
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LCD_DMA_Stream->M0AR = (uint32_t)p;
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LCD_DMA_Stream->CR |= DMA_SxCR_EN | DMA_SxCR_TCIE; // Enable DMA & TC interrupts
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LCD_SPI->CR2 |= SPI_CR2_TXDMAEN;
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WAIT_FOR_DMA_END();
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@ -208,16 +208,16 @@ void lcdRefresh(bool wait)
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LCD_NCS_LOW();
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LCD_A0_HIGH();
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LDC_DMA_Stream->CR &= ~DMA_SxCR_EN; // Disable DMA
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LCD_DMA_Stream->CR &= ~DMA_SxCR_EN; // Disable DMA
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LCD_DMA->HIFCR = LCD_DMA_FLAGS; // Write ones to clear bits
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#if defined(LCD_DUAL_BUFFER)
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// Switch LCD buffer
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LDC_DMA_Stream->M0AR = (uint32_t)displayBuf;
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LCD_DMA_Stream->M0AR = (uint32_t)displayBuf;
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displayBuf = (displayBuf == displayBuf1) ? displayBuf2 : displayBuf1;
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#endif
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LDC_DMA_Stream->CR |= DMA_SxCR_EN | DMA_SxCR_TCIE; // Enable DMA & TC interrupts
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LCD_DMA_Stream->CR |= DMA_SxCR_EN | DMA_SxCR_TCIE; // Enable DMA & TC interrupts
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LCD_SPI->CR2 |= SPI_CR2_TXDMAEN;
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#endif
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}
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@ -226,10 +226,10 @@ extern "C" void LCD_DMA_Stream_IRQHandler()
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{
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DEBUG_INTERRUPT(INT_LCD);
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LDC_DMA_Stream->CR &= ~DMA_SxCR_TCIE; // Stop interrupt
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LCD_DMA_Stream->CR &= ~DMA_SxCR_TCIE; // Stop interrupt
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LCD_DMA->HIFCR |= LCD_DMA_FLAG_INT; // Clear interrupt flag
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LCD_SPI->CR2 &= ~SPI_CR2_TXDMAEN;
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LDC_DMA_Stream->CR &= ~DMA_SxCR_EN; // Disable DMA
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LCD_DMA_Stream->CR &= ~DMA_SxCR_EN; // Disable DMA
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while (LCD_SPI->SR & SPI_SR_BSY) {
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/* Wait for SPI to finish sending data
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