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[Horus] Debug variable added for the audio buffer count. This one is incremented correctly.

This commit is contained in:
Bertrand Songis 2016-01-15 12:23:55 +01:00
parent 677995205d
commit 1771a47637
6 changed files with 35 additions and 28 deletions

View file

@ -328,12 +328,14 @@ int cliDisplay(const char ** argv)
int cliDebugVars(const char ** argv) int cliDebugVars(const char ** argv)
{ {
#if defined(PCBHORUS) && !defined(SIMU) #if defined(PCBHORUS) && !defined(SIMU)
extern unsigned int ioMutexReq, ioMutexRel; extern uint32_t ioMutexReq, ioMutexRel;
extern unsigned int sdReadRetries; extern uint32_t sdReadRetries;
extern uint32_t audioBufferCount;
serialPrint("ioMutexReq=%d", ioMutexReq); serialPrint("ioMutexReq=%d", ioMutexReq);
serialPrint("ioMutexRel=%d", ioMutexRel); serialPrint("ioMutexRel=%d", ioMutexRel);
serialPrint("sdReadRetries=%d", sdReadRetries); serialPrint("sdReadRetries=%d", sdReadRetries);
serialPrint("audioBufferCount=%d", audioBufferCount);
#endif #endif
return 0; return 0;
} }

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@ -20,6 +20,8 @@
#include "../../opentx.h" #include "../../opentx.h"
uint32_t audioBufferCount = 0;
#if !defined(SIMU) #if !defined(SIMU)
bool dacIdle = true; bool dacIdle = true;
@ -43,9 +45,6 @@ void dacTimerInit()
AUDIO_TIMER->CR1 = TIM_CR1_CEN ; AUDIO_TIMER->CR1 = TIM_CR1_CEN ;
} }
// Configure DAC0 (or DAC1 for REVA)
// Not sure why PB14 has not be allocated to the DAC, although it is an EXTRA function
// So maybe it is automatically done
void dacInit() void dacInit()
{ {
dacTimerInit(); dacTimerInit();
@ -74,6 +73,7 @@ void dacInit()
bool dacQueue(AudioBuffer * buffer) bool dacQueue(AudioBuffer * buffer)
{ {
if (dacIdle) { if (dacIdle) {
audioBufferCount++;
dacIdle = false; dacIdle = false;
DMA1_Stream5->CR &= ~DMA_SxCR_EN ; // Disable DMA channel DMA1_Stream5->CR &= ~DMA_SxCR_EN ; // Disable DMA channel
DMA1->HIFCR = DMA_HIFCR_CTCIF5 | DMA_HIFCR_CHTIF5 | DMA_HIFCR_CTEIF5 | DMA_HIFCR_CDMEIF5 | DMA_HIFCR_CFEIF5 ; // Write ones to clear bits DMA1->HIFCR = DMA_HIFCR_CTCIF5 | DMA_HIFCR_CHTIF5 | DMA_HIFCR_CTEIF5 | DMA_HIFCR_CDMEIF5 | DMA_HIFCR_CFEIF5 ; // Write ones to clear bits

View file

@ -36,7 +36,7 @@
/*-----------------------------------------------------------------------*/ /*-----------------------------------------------------------------------*/
#if !defined(BOOT) #if !defined(BOOT)
static OS_MutexID ioMutex; static OS_MutexID ioMutex;
unsigned int ioMutexReq = 0, ioMutexRel = 0; uint32_t ioMutexReq = 0, ioMutexRel = 0;
int ff_cre_syncobj (BYTE vol, _SYNC_t *mutex) int ff_cre_syncobj (BYTE vol, _SYNC_t *mutex)
{ {
*mutex = ioMutex; *mutex = ioMutex;
@ -107,7 +107,7 @@ DSTATUS disk_status (
return(stat); return(stat);
} }
unsigned int sdReadRetries = 0; uint32_t sdReadRetries = 0;
/*-----------------------------------------------------------------------*/ /*-----------------------------------------------------------------------*/
/* Read Sector(s) */ /* Read Sector(s) */

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@ -211,6 +211,8 @@
#define AUDIO_RCC_APB1Periph (RCC_APB1ENR_TIM6EN | RCC_APB1ENR_DACEN) #define AUDIO_RCC_APB1Periph (RCC_APB1ENR_TIM6EN | RCC_APB1ENR_DACEN)
#define AUDIO_TIMER TIM6 #define AUDIO_TIMER TIM6
#define AUDIO_TIMER_DAC_IRQn TIM6_DAC_IRQn #define AUDIO_TIMER_DAC_IRQn TIM6_DAC_IRQn
#define AUDIO_DMA_STREAM DMA1_Stream5
#define AUDIO_DMA_IRQn DMA1_Stream5_IRQn
// I2C Bus: TPL0401A-10DCK digital pot for volume control // I2C Bus: TPL0401A-10DCK digital pot for volume control
#define I2C_RCC_AHB1Periph RCC_AHB1Periph_GPIOB #define I2C_RCC_AHB1Periph RCC_AHB1Periph_GPIOB

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@ -1344,4 +1344,7 @@ void serialPrintf(const char * format, ...) { }
void serialCrlf() { } void serialCrlf() { }
void serialPutc(char c) { } void serialPutc(char c) { }
uint16_t stackSize() { return 0; } uint16_t stackSize() { return 0; }
#if defined(VOLUME_CHIP)
int32_t getVolume() { return 0; } int32_t getVolume() { return 0; }
#endif