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https://github.com/opentx/opentx.git
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Analog_values renamed to adcValues
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parent
b1f5ea115c
commit
3a740907bb
4 changed files with 24 additions and 24 deletions
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@ -260,7 +260,7 @@ int cliDisplay(const char ** argv)
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}
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}
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else if (!strcmp(argv[1], "adc")) {
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else if (!strcmp(argv[1], "adc")) {
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for (int i=0; i<NUMBER_ANALOG; i++) {
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for (int i=0; i<NUMBER_ANALOG; i++) {
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serialPrint("adc[%d] = %04X", i, Analog_values[i]);
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serialPrint("adc[%d] = %04X", i, adcValues[i]);
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}
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}
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}
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}
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else if (!strcmp(argv[1], "outputs")) {
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else if (!strcmp(argv[1], "outputs")) {
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@ -44,7 +44,7 @@
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#define SAMPTIME 2 // sample time = 28 cycles
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#define SAMPTIME 2 // sample time = 28 cycles
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uint16_t Analog_values[NUMBER_ANALOG] __DMA;
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uint16_t adcValues[NUMBER_ANALOG] __DMA;
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static u16 SPIx_ReadWriteByte(uint16_t value)
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static u16 SPIx_ReadWriteByte(uint16_t value)
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{
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{
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@ -141,7 +141,7 @@ void adcInit()
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// Enable the DMA channel here, DMA2 stream 1, channel 2
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// Enable the DMA channel here, DMA2 stream 1, channel 2
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DMA2_Stream1->CR = DMA_SxCR_PL | DMA_SxCR_CHSEL_1 | DMA_SxCR_MSIZE_0 | DMA_SxCR_PSIZE_0 | DMA_SxCR_MINC;
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DMA2_Stream1->CR = DMA_SxCR_PL | DMA_SxCR_CHSEL_1 | DMA_SxCR_MSIZE_0 | DMA_SxCR_PSIZE_0 | DMA_SxCR_MINC;
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DMA2_Stream1->PAR = (uint32_t) &ADC3->DR;
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DMA2_Stream1->PAR = (uint32_t) &ADC3->DR;
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DMA2_Stream1->M0AR = (uint32_t) &Analog_values[MOUSE1];
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DMA2_Stream1->M0AR = (uint32_t) &adcValues[MOUSE1];
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DMA2_Stream1->FCR = DMA_SxFCR_DMDIS | DMA_SxFCR_FTH_0;
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DMA2_Stream1->FCR = DMA_SxFCR_DMDIS | DMA_SxFCR_FTH_0;
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}
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}
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@ -184,7 +184,7 @@ void adcRead()
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DMA2_Stream1->CR &= ~DMA_SxCR_EN; // Disable DMA
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DMA2_Stream1->CR &= ~DMA_SxCR_EN; // Disable DMA
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ADC3->SR &= ~(uint32_t) ( ADC_SR_EOC | ADC_SR_STRT | ADC_SR_OVR );
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ADC3->SR &= ~(uint32_t) ( ADC_SR_EOC | ADC_SR_STRT | ADC_SR_OVR );
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DMA2->LIFCR = DMA_LIFCR_CTCIF1 | DMA_LIFCR_CHTIF1 |DMA_LIFCR_CTEIF1 | DMA_LIFCR_CDMEIF1 | DMA_LIFCR_CFEIF1; // Write ones to clear bits
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DMA2->LIFCR = DMA_LIFCR_CTCIF1 | DMA_LIFCR_CHTIF1 |DMA_LIFCR_CTEIF1 | DMA_LIFCR_CDMEIF1 | DMA_LIFCR_CFEIF1; // Write ones to clear bits
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DMA2_Stream1->M0AR = (uint32_t) &Analog_values[MOUSE1];
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DMA2_Stream1->M0AR = (uint32_t) &adcValues[MOUSE1];
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DMA2_Stream1->NDTR = 2;
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DMA2_Stream1->NDTR = 2;
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DMA2_Stream1->CR |= DMA_SxCR_EN; // Enable DMA
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DMA2_Stream1->CR |= DMA_SxCR_EN; // Enable DMA
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ADC3->CR2 |= (uint32_t)ADC_CR2_SWSTART;
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ADC3->CR2 |= (uint32_t)ADC_CR2_SWSTART;
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@ -204,7 +204,7 @@ void adcRead()
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for (uint32_t adcIndex=0; adcIndex<MOUSE1; adcIndex++) {
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for (uint32_t adcIndex=0; adcIndex<MOUSE1; adcIndex++) {
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ADC_CS_LOW();
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ADC_CS_LOW();
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delay_01us(1);
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delay_01us(1);
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Analog_values[adcIndex] = (0x0fff & SPIx_ReadWriteByte(*command++));
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adcValues[adcIndex] = (0x0fff & SPIx_ReadWriteByte(*command++));
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ADC_CS_HIGH();
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ADC_CS_HIGH();
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delay_01us(1);
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delay_01us(1);
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}
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}
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@ -220,5 +220,5 @@ void adcRead()
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uint16_t getAnalogValue(uint32_t value)
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uint16_t getAnalogValue(uint32_t value)
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{
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{
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return Analog_values[value];
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return adcValues[value];
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}
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}
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@ -36,7 +36,7 @@
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#include "../opentx.h"
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#include "../opentx.h"
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uint16_t Analog_values[NUMBER_ANALOG];
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uint16_t adcValues[NUMBER_ANALOG];
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#if defined(FRSKY_STICKS)
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#if defined(FRSKY_STICKS)
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const char ana_direction[NUMBER_ANALOG] = {1, 1, 0, 1 ,0 ,1 ,0, 0, 0};
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const char ana_direction[NUMBER_ANALOG] = {1, 1, 0, 1 ,0 ,1 ,0, 0, 0};
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@ -99,17 +99,17 @@ void adcRead()
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x = padc->ADC_LCDR; // Clear DRSY flag
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x = padc->ADC_LCDR; // Clear DRSY flag
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}
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}
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// Next bit may be done using the PDC
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// Next bit may be done using the PDC
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Analog_values[0] = ADC->ADC_CDR1;
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adcValues[0] = ADC->ADC_CDR1;
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Analog_values[1] = ADC->ADC_CDR2;
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adcValues[1] = ADC->ADC_CDR2;
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Analog_values[2] = ADC->ADC_CDR3;
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adcValues[2] = ADC->ADC_CDR3;
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Analog_values[3] = ADC->ADC_CDR4;
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adcValues[3] = ADC->ADC_CDR4;
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Analog_values[4] = ADC->ADC_CDR5;
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adcValues[4] = ADC->ADC_CDR5;
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Analog_values[5] = ADC->ADC_CDR9;
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adcValues[5] = ADC->ADC_CDR9;
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Analog_values[6] = ADC->ADC_CDR13;
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adcValues[6] = ADC->ADC_CDR13;
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Analog_values[7] = ADC->ADC_CDR14;
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adcValues[7] = ADC->ADC_CDR14;
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#if !defined(REVA)
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#if !defined(REVA)
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Analog_values[8] = ADC->ADC_CDR8 ;
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adcValues[8] = ADC->ADC_CDR8 ;
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#endif
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#endif
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temperature = (((int32_t)temperature * 7) + ((((int32_t)ADC->ADC_CDR15 - 838) * 621) >> 11)) >> 3; // Filter it
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temperature = (((int32_t)temperature * 7) + ((((int32_t)ADC->ADC_CDR15 - 838) * 621) >> 11)) >> 3; // Filter it
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@ -122,7 +122,7 @@ void adcRead()
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uint32_t i ;
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uint32_t i ;
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for (i=0; i<NUMBER_ANALOG; i++) {
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for (i=0; i<NUMBER_ANALOG; i++) {
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if (ana_direction[i]) {
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if (ana_direction[i]) {
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Analog_values[i] = 4096-Analog_values[i];
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adcValues[i] = 4096-adcValues[i];
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}
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}
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}
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}
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#endif
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#endif
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@ -130,5 +130,5 @@ void adcRead()
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uint16_t getAnalogValue(uint32_t value)
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uint16_t getAnalogValue(uint32_t value)
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{
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{
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return Analog_values[value];
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return adcValues[value];
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}
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}
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@ -57,7 +57,7 @@
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#if defined(REV9E)
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#if defined(REV9E)
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#define NUMBER_ANALOG_ADC1 10
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#define NUMBER_ANALOG_ADC1 10
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#define NUMBER_ANALOG_ADC3 3
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#define NUMBER_ANALOG_ADC3 3
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// mapping from Analog_values order to enum Analogs
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// mapping from adcValues order to enum Analogs
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const uint8_t ana_mapping[NUMBER_ANALOG] = { 0 /*STICK1*/, 1 /*STICK2*/, 2 /*STICK3*/, 3 /*STICK4*/,
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const uint8_t ana_mapping[NUMBER_ANALOG] = { 0 /*STICK1*/, 1 /*STICK2*/, 2 /*STICK3*/, 3 /*STICK4*/,
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10 /*POT1*/, 4 /*POT2*/, 5 /*POT3*/, 6 /*POT4*/,
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10 /*POT1*/, 4 /*POT2*/, 5 /*POT3*/, 6 /*POT4*/,
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11 /*SLIDER1*/, 12 /*SLIDER2*/, 7 /*SLIDER3*/, 8 /*SLIDER4*/,
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11 /*SLIDER1*/, 12 /*SLIDER2*/, 7 /*SLIDER3*/, 8 /*SLIDER4*/,
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@ -66,7 +66,7 @@
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#define NUMBER_ANALOG_ADC1 10
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#define NUMBER_ANALOG_ADC1 10
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#endif
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#endif
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uint16_t Analog_values[NUMBER_ANALOG] __DMA;
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uint16_t adcValues[NUMBER_ANALOG] __DMA;
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void adcInit()
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void adcInit()
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{
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{
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@ -102,7 +102,7 @@ void adcInit()
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DMA2_Stream0->CR = DMA_SxCR_PL | DMA_SxCR_MSIZE_0 | DMA_SxCR_PSIZE_0 | DMA_SxCR_MINC;
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DMA2_Stream0->CR = DMA_SxCR_PL | DMA_SxCR_MSIZE_0 | DMA_SxCR_PSIZE_0 | DMA_SxCR_MINC;
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DMA2_Stream0->PAR = CONVERT_PTR_UINT(&ADC1->DR);
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DMA2_Stream0->PAR = CONVERT_PTR_UINT(&ADC1->DR);
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DMA2_Stream0->M0AR = CONVERT_PTR_UINT(Analog_values);
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DMA2_Stream0->M0AR = CONVERT_PTR_UINT(adcValues);
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DMA2_Stream0->NDTR = NUMBER_ANALOG_ADC1;
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DMA2_Stream0->NDTR = NUMBER_ANALOG_ADC1;
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DMA2_Stream0->FCR = DMA_SxFCR_DMDIS | DMA_SxFCR_FTH_0 ;
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DMA2_Stream0->FCR = DMA_SxFCR_DMDIS | DMA_SxFCR_FTH_0 ;
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@ -118,7 +118,7 @@ void adcInit()
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// Enable the DMA channel here, DMA2 stream 1, channel 2
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// Enable the DMA channel here, DMA2 stream 1, channel 2
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DMA2_Stream1->CR = DMA_SxCR_PL | DMA_SxCR_CHSEL_1 | DMA_SxCR_MSIZE_0 | DMA_SxCR_PSIZE_0 | DMA_SxCR_MINC;
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DMA2_Stream1->CR = DMA_SxCR_PL | DMA_SxCR_CHSEL_1 | DMA_SxCR_MSIZE_0 | DMA_SxCR_PSIZE_0 | DMA_SxCR_MINC;
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DMA2_Stream1->PAR = CONVERT_PTR_UINT(&ADC3->DR);
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DMA2_Stream1->PAR = CONVERT_PTR_UINT(&ADC3->DR);
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DMA2_Stream1->M0AR = CONVERT_PTR_UINT(Analog_values + NUMBER_ANALOG_ADC1);
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DMA2_Stream1->M0AR = CONVERT_PTR_UINT(adcValues + NUMBER_ANALOG_ADC1);
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DMA2_Stream1->NDTR = NUMBER_ANALOG_ADC3;
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DMA2_Stream1->NDTR = NUMBER_ANALOG_ADC3;
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DMA2_Stream1->FCR = DMA_SxFCR_DMDIS | DMA_SxFCR_FTH_0 ;
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DMA2_Stream1->FCR = DMA_SxFCR_DMDIS | DMA_SxFCR_FTH_0 ;
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#endif
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#endif
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@ -175,7 +175,7 @@ uint16_t getAnalogValue(uint32_t index)
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index = ana_mapping[index];
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index = ana_mapping[index];
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#endif
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#endif
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if (ana_direction[index] < 0)
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if (ana_direction[index] < 0)
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return 4096 - Analog_values[index];
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return 4096 - adcValues[index];
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else
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else
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return Analog_values[index];
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return adcValues[index];
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}
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}
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