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Analog_values renamed to adcValues

This commit is contained in:
Bertrand Songis 2015-11-06 18:46:37 +01:00
parent b1f5ea115c
commit 3a740907bb
4 changed files with 24 additions and 24 deletions

View file

@ -260,7 +260,7 @@ int cliDisplay(const char ** argv)
} }
else if (!strcmp(argv[1], "adc")) { else if (!strcmp(argv[1], "adc")) {
for (int i=0; i<NUMBER_ANALOG; i++) { for (int i=0; i<NUMBER_ANALOG; i++) {
serialPrint("adc[%d] = %04X", i, Analog_values[i]); serialPrint("adc[%d] = %04X", i, adcValues[i]);
} }
} }
else if (!strcmp(argv[1], "outputs")) { else if (!strcmp(argv[1], "outputs")) {

View file

@ -44,7 +44,7 @@
#define SAMPTIME 2 // sample time = 28 cycles #define SAMPTIME 2 // sample time = 28 cycles
uint16_t Analog_values[NUMBER_ANALOG] __DMA; uint16_t adcValues[NUMBER_ANALOG] __DMA;
static u16 SPIx_ReadWriteByte(uint16_t value) static u16 SPIx_ReadWriteByte(uint16_t value)
{ {
@ -141,7 +141,7 @@ void adcInit()
// Enable the DMA channel here, DMA2 stream 1, channel 2 // Enable the DMA channel here, DMA2 stream 1, channel 2
DMA2_Stream1->CR = DMA_SxCR_PL | DMA_SxCR_CHSEL_1 | DMA_SxCR_MSIZE_0 | DMA_SxCR_PSIZE_0 | DMA_SxCR_MINC; DMA2_Stream1->CR = DMA_SxCR_PL | DMA_SxCR_CHSEL_1 | DMA_SxCR_MSIZE_0 | DMA_SxCR_PSIZE_0 | DMA_SxCR_MINC;
DMA2_Stream1->PAR = (uint32_t) &ADC3->DR; DMA2_Stream1->PAR = (uint32_t) &ADC3->DR;
DMA2_Stream1->M0AR = (uint32_t) &Analog_values[MOUSE1]; DMA2_Stream1->M0AR = (uint32_t) &adcValues[MOUSE1];
DMA2_Stream1->FCR = DMA_SxFCR_DMDIS | DMA_SxFCR_FTH_0; DMA2_Stream1->FCR = DMA_SxFCR_DMDIS | DMA_SxFCR_FTH_0;
} }
@ -184,7 +184,7 @@ void adcRead()
DMA2_Stream1->CR &= ~DMA_SxCR_EN; // Disable DMA DMA2_Stream1->CR &= ~DMA_SxCR_EN; // Disable DMA
ADC3->SR &= ~(uint32_t) ( ADC_SR_EOC | ADC_SR_STRT | ADC_SR_OVR ); ADC3->SR &= ~(uint32_t) ( ADC_SR_EOC | ADC_SR_STRT | ADC_SR_OVR );
DMA2->LIFCR = DMA_LIFCR_CTCIF1 | DMA_LIFCR_CHTIF1 |DMA_LIFCR_CTEIF1 | DMA_LIFCR_CDMEIF1 | DMA_LIFCR_CFEIF1; // Write ones to clear bits DMA2->LIFCR = DMA_LIFCR_CTCIF1 | DMA_LIFCR_CHTIF1 |DMA_LIFCR_CTEIF1 | DMA_LIFCR_CDMEIF1 | DMA_LIFCR_CFEIF1; // Write ones to clear bits
DMA2_Stream1->M0AR = (uint32_t) &Analog_values[MOUSE1]; DMA2_Stream1->M0AR = (uint32_t) &adcValues[MOUSE1];
DMA2_Stream1->NDTR = 2; DMA2_Stream1->NDTR = 2;
DMA2_Stream1->CR |= DMA_SxCR_EN; // Enable DMA DMA2_Stream1->CR |= DMA_SxCR_EN; // Enable DMA
ADC3->CR2 |= (uint32_t)ADC_CR2_SWSTART; ADC3->CR2 |= (uint32_t)ADC_CR2_SWSTART;
@ -204,7 +204,7 @@ void adcRead()
for (uint32_t adcIndex=0; adcIndex<MOUSE1; adcIndex++) { for (uint32_t adcIndex=0; adcIndex<MOUSE1; adcIndex++) {
ADC_CS_LOW(); ADC_CS_LOW();
delay_01us(1); delay_01us(1);
Analog_values[adcIndex] = (0x0fff & SPIx_ReadWriteByte(*command++)); adcValues[adcIndex] = (0x0fff & SPIx_ReadWriteByte(*command++));
ADC_CS_HIGH(); ADC_CS_HIGH();
delay_01us(1); delay_01us(1);
} }
@ -220,5 +220,5 @@ void adcRead()
uint16_t getAnalogValue(uint32_t value) uint16_t getAnalogValue(uint32_t value)
{ {
return Analog_values[value]; return adcValues[value];
} }

View file

@ -36,7 +36,7 @@
#include "../opentx.h" #include "../opentx.h"
uint16_t Analog_values[NUMBER_ANALOG]; uint16_t adcValues[NUMBER_ANALOG];
#if defined(FRSKY_STICKS) #if defined(FRSKY_STICKS)
const char ana_direction[NUMBER_ANALOG] = {1, 1, 0, 1 ,0 ,1 ,0, 0, 0}; const char ana_direction[NUMBER_ANALOG] = {1, 1, 0, 1 ,0 ,1 ,0, 0, 0};
@ -99,17 +99,17 @@ void adcRead()
x = padc->ADC_LCDR; // Clear DRSY flag x = padc->ADC_LCDR; // Clear DRSY flag
} }
// Next bit may be done using the PDC // Next bit may be done using the PDC
Analog_values[0] = ADC->ADC_CDR1; adcValues[0] = ADC->ADC_CDR1;
Analog_values[1] = ADC->ADC_CDR2; adcValues[1] = ADC->ADC_CDR2;
Analog_values[2] = ADC->ADC_CDR3; adcValues[2] = ADC->ADC_CDR3;
Analog_values[3] = ADC->ADC_CDR4; adcValues[3] = ADC->ADC_CDR4;
Analog_values[4] = ADC->ADC_CDR5; adcValues[4] = ADC->ADC_CDR5;
Analog_values[5] = ADC->ADC_CDR9; adcValues[5] = ADC->ADC_CDR9;
Analog_values[6] = ADC->ADC_CDR13; adcValues[6] = ADC->ADC_CDR13;
Analog_values[7] = ADC->ADC_CDR14; adcValues[7] = ADC->ADC_CDR14;
#if !defined(REVA) #if !defined(REVA)
Analog_values[8] = ADC->ADC_CDR8 ; adcValues[8] = ADC->ADC_CDR8 ;
#endif #endif
temperature = (((int32_t)temperature * 7) + ((((int32_t)ADC->ADC_CDR15 - 838) * 621) >> 11)) >> 3; // Filter it temperature = (((int32_t)temperature * 7) + ((((int32_t)ADC->ADC_CDR15 - 838) * 621) >> 11)) >> 3; // Filter it
@ -122,7 +122,7 @@ void adcRead()
uint32_t i ; uint32_t i ;
for (i=0; i<NUMBER_ANALOG; i++) { for (i=0; i<NUMBER_ANALOG; i++) {
if (ana_direction[i]) { if (ana_direction[i]) {
Analog_values[i] = 4096-Analog_values[i]; adcValues[i] = 4096-adcValues[i];
} }
} }
#endif #endif
@ -130,5 +130,5 @@ void adcRead()
uint16_t getAnalogValue(uint32_t value) uint16_t getAnalogValue(uint32_t value)
{ {
return Analog_values[value]; return adcValues[value];
} }

View file

@ -57,7 +57,7 @@
#if defined(REV9E) #if defined(REV9E)
#define NUMBER_ANALOG_ADC1 10 #define NUMBER_ANALOG_ADC1 10
#define NUMBER_ANALOG_ADC3 3 #define NUMBER_ANALOG_ADC3 3
// mapping from Analog_values order to enum Analogs // mapping from adcValues order to enum Analogs
const uint8_t ana_mapping[NUMBER_ANALOG] = { 0 /*STICK1*/, 1 /*STICK2*/, 2 /*STICK3*/, 3 /*STICK4*/, const uint8_t ana_mapping[NUMBER_ANALOG] = { 0 /*STICK1*/, 1 /*STICK2*/, 2 /*STICK3*/, 3 /*STICK4*/,
10 /*POT1*/, 4 /*POT2*/, 5 /*POT3*/, 6 /*POT4*/, 10 /*POT1*/, 4 /*POT2*/, 5 /*POT3*/, 6 /*POT4*/,
11 /*SLIDER1*/, 12 /*SLIDER2*/, 7 /*SLIDER3*/, 8 /*SLIDER4*/, 11 /*SLIDER1*/, 12 /*SLIDER2*/, 7 /*SLIDER3*/, 8 /*SLIDER4*/,
@ -66,7 +66,7 @@
#define NUMBER_ANALOG_ADC1 10 #define NUMBER_ANALOG_ADC1 10
#endif #endif
uint16_t Analog_values[NUMBER_ANALOG] __DMA; uint16_t adcValues[NUMBER_ANALOG] __DMA;
void adcInit() void adcInit()
{ {
@ -102,7 +102,7 @@ void adcInit()
DMA2_Stream0->CR = DMA_SxCR_PL | DMA_SxCR_MSIZE_0 | DMA_SxCR_PSIZE_0 | DMA_SxCR_MINC; DMA2_Stream0->CR = DMA_SxCR_PL | DMA_SxCR_MSIZE_0 | DMA_SxCR_PSIZE_0 | DMA_SxCR_MINC;
DMA2_Stream0->PAR = CONVERT_PTR_UINT(&ADC1->DR); DMA2_Stream0->PAR = CONVERT_PTR_UINT(&ADC1->DR);
DMA2_Stream0->M0AR = CONVERT_PTR_UINT(Analog_values); DMA2_Stream0->M0AR = CONVERT_PTR_UINT(adcValues);
DMA2_Stream0->NDTR = NUMBER_ANALOG_ADC1; DMA2_Stream0->NDTR = NUMBER_ANALOG_ADC1;
DMA2_Stream0->FCR = DMA_SxFCR_DMDIS | DMA_SxFCR_FTH_0 ; DMA2_Stream0->FCR = DMA_SxFCR_DMDIS | DMA_SxFCR_FTH_0 ;
@ -118,7 +118,7 @@ void adcInit()
// Enable the DMA channel here, DMA2 stream 1, channel 2 // Enable the DMA channel here, DMA2 stream 1, channel 2
DMA2_Stream1->CR = DMA_SxCR_PL | DMA_SxCR_CHSEL_1 | DMA_SxCR_MSIZE_0 | DMA_SxCR_PSIZE_0 | DMA_SxCR_MINC; DMA2_Stream1->CR = DMA_SxCR_PL | DMA_SxCR_CHSEL_1 | DMA_SxCR_MSIZE_0 | DMA_SxCR_PSIZE_0 | DMA_SxCR_MINC;
DMA2_Stream1->PAR = CONVERT_PTR_UINT(&ADC3->DR); DMA2_Stream1->PAR = CONVERT_PTR_UINT(&ADC3->DR);
DMA2_Stream1->M0AR = CONVERT_PTR_UINT(Analog_values + NUMBER_ANALOG_ADC1); DMA2_Stream1->M0AR = CONVERT_PTR_UINT(adcValues + NUMBER_ANALOG_ADC1);
DMA2_Stream1->NDTR = NUMBER_ANALOG_ADC3; DMA2_Stream1->NDTR = NUMBER_ANALOG_ADC3;
DMA2_Stream1->FCR = DMA_SxFCR_DMDIS | DMA_SxFCR_FTH_0 ; DMA2_Stream1->FCR = DMA_SxFCR_DMDIS | DMA_SxFCR_FTH_0 ;
#endif #endif
@ -175,7 +175,7 @@ uint16_t getAnalogValue(uint32_t index)
index = ana_mapping[index]; index = ana_mapping[index];
#endif #endif
if (ana_direction[index] < 0) if (ana_direction[index] < 0)
return 4096 - Analog_values[index]; return 4096 - adcValues[index];
else else
return Analog_values[index]; return adcValues[index];
} }