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Code Issues Wiki Activity

Non regression test for 0 division issue in flight phases switch

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This commit is contained in:
bsongis 2011-12-12 18:53:36 +00:00
parent 8a2e035dc9
commit 423ca57f10
4 changed files with 39 additions and 11 deletions
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11
src/gtests.cpp
View file

@ -257,8 +257,17 @@ TEST(getSwitch, nullSW) {
EXPECT_EQ(getSwitch(0, 0), false);
}
TEST(phases, nullFadeOut_posFadeIn) {
memset(&g_model, 0, sizeof(g_model));
g_model.phaseData[1].swtch = DSW_ID1;
g_model.phaseData[1].fadeIn = 15;
perMain();
setSwitch(DSW_ID1);
perMain();
}
int main(int argc, char **argv) {
InitEepromThread();
StartEepromThread(NULL);
::testing::InitGoogleTest(&argc, argv);
return RUN_ALL_TESTS();
}

21
src/simpgmspace.cpp
View file

@ -27,8 +27,8 @@
#include "gruvin9x.h"
#include "menus.h"
volatile uint8_t pinb=0, pinc=0xff, pind, pine=0xff, ping=0xff, pinj=0xff, pinl=0;
uint8_t portb, dummyport;
volatile uint8_t pinb=0, pinc=0xff, pind, pine=0xff, ping=0xff, pinh=0xff, pinj=0xff, pinl=0;
uint8_t portb, portc, dummyport;
uint16_t dummyport16;
const char *eepromFile;
@ -37,6 +37,22 @@ extern const char* eeprom_buffer_data;
uint8_t eeprom[EESIZE];
sem_t eeprom_write_sem;
void setSwitch(int8_t swtch)
{
switch (swtch) {
case DSW_ID0:
ping |= (1<<INP_G_ID1); pine &= ~(1<<INP_E_ID2);
break;
case DSW_ID1:
ping &= ~(1<<INP_G_ID1); pine &= ~(1<<INP_E_ID2);
break;
case DSW_ID2:
ping &= ~(1<<INP_G_ID1); pine |= (1<<INP_E_ID2);
default:
break;
}
}
bool eeprom_thread_running = true;
void *eeprom_write_function(void *)
{
@ -121,7 +137,6 @@ void StartEepromThread(const char *filename)
assert(!pthread_create(&eeprom_thread_pid, NULL, &eeprom_write_function, NULL));
}
void StopEepromThread()
{
eeprom_thread_running = false;

12
src/simpgmspace.h
View file

@ -59,11 +59,12 @@ extern sem_t eeprom_write_sem;
#define PORTA dummyport
#define PORTB portb
#define PORTC dummyport
#define PORTC portc
#define PORTD dummyport
#define PORTE dummyport
#define PORTF dummyport
#define PORTG dummyport
#define PORTH dummyport
#define DDRA dummyport
#define DDRB dummyport
#define DDRC dummyport
@ -76,6 +77,7 @@ extern sem_t eeprom_write_sem;
#define PIND ~pind
#define PINE ~pine
#define PING ~ping
#define PINH ~pinh
#define PINJ ~pinj
#define PINL ~pinl
#define EEMEM
@ -88,7 +90,7 @@ extern sem_t eeprom_write_sem;
#define PORTE0 dummyport
#define RXCIE0 dummyport
#define OCR0A dummyport
#define OCR4A dummyport
#define OCR1B dummyport16
#define TCCR1A dummyport
#define COM1B0 dummyport
@ -128,11 +130,13 @@ extern sem_t eeprom_write_sem;
#define INP_P_KEY_UP 1
#define INP_P_KEY_DWN 0
extern volatile unsigned char pinb,pinc,pind,pine,ping,pinj,pinl;
extern uint8_t portb, dummyport;
extern volatile unsigned char pinb,pinc,pind,pine,ping,pinh,pinj,pinl;
extern uint8_t portb, portc, dummyport;
extern uint16_t dummyport16;
extern uint8_t main_thread_running;
extern void setSwitch(int8_t swtch);
void StartMainThread(bool tests=true);
void StartEepromThread(const char *filename="eeprom.bin");

6
src/simu.cpp
View file

@ -346,9 +346,9 @@ void Gruvin9xSim::refreshDiplay()
k5st = ks;
}
switch(id){
case 0: ping |= (1<<INP_G_ID1); pine &= ~(1<<INP_E_ID2); break;
case 1: ping &= ~(1<<INP_G_ID1); pine &= ~(1<<INP_E_ID2); break;
case 2: ping &= ~(1<<INP_G_ID1); pine |= (1<<INP_E_ID2); break;
case 0: setSwitch(DSW_ID0); break;
case 1: setSwitch(DSW_ID1); break;
case 2: setSwitch(DSW_ID2); break;
}
}
}