mirror of
https://github.com/opentx/opentx.git
synced 2025-07-19 14:25:11 +03:00
[Taranis X9E] Fixes (frequencies on M4, pots calibration, soft power
delay after startup)
This commit is contained in:
parent
fffa39a286
commit
4c0515ab91
9 changed files with 56 additions and 37 deletions
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@ -69,7 +69,9 @@ Idle task stack size(word).
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/*!<
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/*!<
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System frequency (Hz).
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System frequency (Hz).
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*/
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*/
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#if defined(PCBTARANIS)
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#if defined(PCBTARANIS) && defined(REV9E)
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#define CFG_CPU_FREQ (168000000)
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#elif defined(PCBTARANIS) && defined(REV9E)
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#define CFG_CPU_FREQ (120000000)
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#define CFG_CPU_FREQ (120000000)
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#else
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#else
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#define CFG_CPU_FREQ (36000000) // TODO check if really correct for sky9x?
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#define CFG_CPU_FREQ (36000000) // TODO check if really correct for sky9x?
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@ -838,7 +838,6 @@ ifeq ($(PCB), TARANIS)
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LDSCRIPT = targets/taranis/stm32_flash_bl.ld
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LDSCRIPT = targets/taranis/stm32_flash_bl.ld
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TRGT = arm-none-eabi-
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TRGT = arm-none-eabi-
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OPT = s
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OPT = s
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CPPDEFS += -DHSE_VALUE=12000000
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BITMAPS += $(patsubst %.png,%.lbm,$(wildcard bitmaps/Taranis/*.png)) bitmaps/Taranis/mainmenu.lbm
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BITMAPS += $(patsubst %.png,%.lbm,$(wildcard bitmaps/Taranis/*.png)) bitmaps/Taranis/mainmenu.lbm
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SDCARD = YES
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SDCARD = YES
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THR_TRACE = YES
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THR_TRACE = YES
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@ -852,9 +851,11 @@ ifeq ($(PCB), TARANIS)
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CPPDEFS += -DPCBTARANIS -DCPUARM -DCPUSTM32 -DVIRTUALINPUTS -DLUAINPUTS -DXCURVES -DEEPROM_VARIANT=0 -DAUDIO -DPXX
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CPPDEFS += -DPCBTARANIS -DCPUARM -DCPUSTM32 -DVIRTUALINPUTS -DLUAINPUTS -DXCURVES -DEEPROM_VARIANT=0 -DAUDIO -DPXX
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INCDIRS += targets/taranis CoOS CoOS/kernel CoOS/portable
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INCDIRS += targets/taranis CoOS CoOS/kernel CoOS/portable
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ifeq ($(PCBREV), REV9E)
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ifeq ($(PCBREV), REV9E)
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CPPDEFS += -DHSE_VALUE=16800000
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CPPDEFS += -DSTM32F40_41xxx
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CPPDEFS += -DSTM32F40_41xxx
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EXTRAINCDIRS += targets/taranis/STM32F4xx_DSP_StdPeriph_Lib_V1.4.0/Libraries/CMSIS/Device/ST/STM32F4xx/Include targets/taranis/STM32F4xx_DSP_StdPeriph_Lib_V1.4.0/Libraries/CMSIS/Include targets/taranis/STM32F4xx_DSP_StdPeriph_Lib_V1.4.0/Libraries/STM32F4xx_StdPeriph_Driver/inc
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EXTRAINCDIRS += targets/taranis/STM32F4xx_DSP_StdPeriph_Lib_V1.4.0/Libraries/CMSIS/Device/ST/STM32F4xx/Include targets/taranis/STM32F4xx_DSP_StdPeriph_Lib_V1.4.0/Libraries/CMSIS/Include targets/taranis/STM32F4xx_DSP_StdPeriph_Lib_V1.4.0/Libraries/STM32F4xx_StdPeriph_Driver/inc
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else
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else
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CPPDEFS += -DHSE_VALUE=12000000
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EXTRAINCDIRS += targets/taranis/STM32F2xx_StdPeriph_Lib_V1.1.0/Libraries/STM32F2xx_StdPeriph_Driver/inc targets/taranis/STM32F2xx_StdPeriph_Lib_V1.1.0/Libraries/CMSIS/Device/ST/STM32F2xx/Include targets/taranis/STM32F2xx_StdPeriph_Lib_V1.1.0/Libraries/CMSIS/include
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EXTRAINCDIRS += targets/taranis/STM32F2xx_StdPeriph_Lib_V1.1.0/Libraries/STM32F2xx_StdPeriph_Driver/inc targets/taranis/STM32F2xx_StdPeriph_Lib_V1.1.0/Libraries/CMSIS/Device/ST/STM32F2xx/Include targets/taranis/STM32F2xx_StdPeriph_Lib_V1.1.0/Libraries/CMSIS/include
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endif
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endif
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EXTRAINCDIRS += targets/taranis/STM32_USB-Host-Device_Lib_V2.1.0/Libraries/STM32_USB_OTG_Driver/inc targets/taranis/STM32_USB-Host-Device_Lib_V2.1.0/Libraries/STM32_USB_Device_Library/Core/inc
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EXTRAINCDIRS += targets/taranis/STM32_USB-Host-Device_Lib_V2.1.0/Libraries/STM32_USB_OTG_Driver/inc targets/taranis/STM32_USB-Host-Device_Lib_V2.1.0/Libraries/STM32_USB_Device_Library/Core/inc
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@ -66,6 +66,12 @@ const pm_uchar sticks[] PROGMEM = {
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#define CASE_SPLASH_PARAM(x)
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#define CASE_SPLASH_PARAM(x)
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#endif
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#endif
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#if defined(BATTGRAPH)
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#define CASE_BATTGRAPH(x) x,
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#else
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#define CASE_BATTGRAPH(x)
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#endif
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enum menuGeneralSetupItems {
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enum menuGeneralSetupItems {
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CASE_RTCLOCK(ITEM_SETUP_DATE)
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CASE_RTCLOCK(ITEM_SETUP_DATE)
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CASE_RTCLOCK(ITEM_SETUP_TIME)
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CASE_RTCLOCK(ITEM_SETUP_TIME)
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@ -76,7 +76,9 @@ enum menuGeneralHwItems {
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#define HW_SETTINGS_COLUMN 15*FW
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#define HW_SETTINGS_COLUMN 15*FW
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#if defined(REVPLUS)
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#if defined(REV9E)
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#define POTS_ROWS NAVIGATION_LINE_BY_LINE|1, NAVIGATION_LINE_BY_LINE|1, NAVIGATION_LINE_BY_LINE|1, NAVIGATION_LINE_BY_LINE|1, 0, 0, 0, 0
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#elif defined(REVPLUS)
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#define POTS_ROWS NAVIGATION_LINE_BY_LINE|1, NAVIGATION_LINE_BY_LINE|1, NAVIGATION_LINE_BY_LINE|1, 0, 0
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#define POTS_ROWS NAVIGATION_LINE_BY_LINE|1, NAVIGATION_LINE_BY_LINE|1, NAVIGATION_LINE_BY_LINE|1, 0, 0
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#else
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#else
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#define POTS_ROWS NAVIGATION_LINE_BY_LINE|1, NAVIGATION_LINE_BY_LINE|1, 0, 0
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#define POTS_ROWS NAVIGATION_LINE_BY_LINE|1, NAVIGATION_LINE_BY_LINE|1, 0, 0
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@ -118,7 +120,7 @@ void menuGeneralHardware(uint8_t event)
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case ITEM_SETUP_HW_RS2:
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case ITEM_SETUP_HW_RS2:
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#endif
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#endif
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{
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{
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int idx = (k<=ITEM_SETUP_HW_STICK4 ? k-ITEM_SETUP_HW_STICK1 : k-ITEM_SETUP_HW_LS+7);
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int idx = (k<=ITEM_SETUP_HW_STICK4 ? k-ITEM_SETUP_HW_STICK1 : k-ITEM_SETUP_HW_LS+MIXSRC_SLIDER1-MIXSRC_Rud);
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lcd_putsiAtt(INDENT_WIDTH, y, STR_VSRCRAW, idx+1, 0);
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lcd_putsiAtt(INDENT_WIDTH, y, STR_VSRCRAW, idx+1, 0);
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if (ZEXIST(g_eeGeneral.anaNames[idx]) || attr)
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if (ZEXIST(g_eeGeneral.anaNames[idx]) || attr)
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editName(HW_SETTINGS_COLUMN, y, g_eeGeneral.anaNames[idx], LEN_ANA_NAME, event, attr);
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editName(HW_SETTINGS_COLUMN, y, g_eeGeneral.anaNames[idx], LEN_ANA_NAME, event, attr);
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@ -93,6 +93,11 @@ const uint8_t BootCode[] = {
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__attribute__ ((section(".bootrodata"), used))
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__attribute__ ((section(".bootrodata"), used))
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void _bootStart()
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void _bootStart()
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{
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{
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// turn soft power ON now
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RCC->AHB1ENR |= RCC_AHB1ENR_GPIODEN; // Enable portD clock
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GPIOD->BSRRL = 1;
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GPIOD->MODER = (GPIOD->MODER & 0xFFFFFFFC) | 1;
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RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN; // Enable portC clock
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RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN; // Enable portC clock
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RCC->AHB1ENR |= RCC_AHB1ENR_GPIOEEN; // Enable portE clock
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RCC->AHB1ENR |= RCC_AHB1ENR_GPIOEEN; // Enable portE clock
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@ -56,20 +56,6 @@
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#define CASE_PCBSKY9X(x)
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#define CASE_PCBSKY9X(x)
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#endif
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#endif
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#if defined(PCBTARANIS)
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#define IS_PCBTARANIS() true
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#define IF_PCBTARANIS(x) (x)
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#define CASE_PCBTARANIS(x) x,
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#define IF_9X(x) (0)
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#define CASE_9X(x)
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#else
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#define IS_PCBTARANIS() false
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#define IF_PCBTARANIS(x) (0)
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#define CASE_PCBTARANIS(x)
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#define IF_9X(x) (x)
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#define CASE_9X(x) x,
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#endif
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#if defined(CPUARM)
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#if defined(CPUARM)
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#define CASE_CPUARM(x) x,
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#define CASE_CPUARM(x) x,
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#define IF_CPUARM(x) x
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#define IF_CPUARM(x) x
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@ -90,12 +76,6 @@
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#define CASE_LUA(x)
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#define CASE_LUA(x)
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#endif
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#endif
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#if defined(BATTGRAPH) || defined(PCBTARANIS)
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#define CASE_BATTGRAPH(x) x,
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#else
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#define CASE_BATTGRAPH(x)
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#endif
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#if defined(CPUARM) || defined(CPUM2560)
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#if defined(CPUARM) || defined(CPUM2560)
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#define CASE_PERSISTENT_TIMERS(x) x,
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#define CASE_PERSISTENT_TIMERS(x) x,
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#else
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#else
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@ -381,7 +361,11 @@ enum PotType {
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POT_TYPE_MAX=POT_TYPE_NO_DETENT
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POT_TYPE_MAX=POT_TYPE_NO_DETENT
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};
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};
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#if defined(PCBTARANIS) && defined(REVPLUS)
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#if defined(PCBTARANIS) && defined(REV9E)
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#define IS_POT_AVAILABLE(x) (((x)!=POT3 && (x)!=POT4) || (g_eeGeneral.potsType & (0x03 << (2*((x)-POT1))))!=POT_TYPE_NONE)
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#define IS_POT_MULTIPOS(x) ((x)>=POT1 && (x)<=POT_LAST && ((g_eeGeneral.potsType>>(2*((x)-POT1)))&0x03)==POT_TYPE_MULTIPOS)
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#define IS_POT_WITHOUT_DETENT(x) ((x)>=POT1 && (x)<=POT_LAST && ((g_eeGeneral.potsType>>(2*((x)-POT1)))&0x03)==POT_TYPE_NO_DETENT)
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#elif defined(PCBTARANIS) && defined(REVPLUS)
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#define IS_POT_AVAILABLE(x) ((x)!=POT3 || (g_eeGeneral.potsType & (0x03 << (2*((x)-POT1))))!=POT_TYPE_NONE)
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#define IS_POT_AVAILABLE(x) ((x)!=POT3 || (g_eeGeneral.potsType & (0x03 << (2*((x)-POT1))))!=POT_TYPE_NONE)
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#define IS_POT_MULTIPOS(x) ((x)>=POT1 && (x)<=POT_LAST && ((g_eeGeneral.potsType>>(2*((x)-POT1)))&0x03)==POT_TYPE_MULTIPOS)
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#define IS_POT_MULTIPOS(x) ((x)>=POT1 && (x)<=POT_LAST && ((g_eeGeneral.potsType>>(2*((x)-POT1)))&0x03)==POT_TYPE_MULTIPOS)
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#define IS_POT_WITHOUT_DETENT(x) ((x)>=POT1 && (x)<=POT_LAST && ((g_eeGeneral.potsType>>(2*((x)-POT1)))&0x03)==POT_TYPE_NO_DETENT)
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#define IS_POT_WITHOUT_DETENT(x) ((x)>=POT1 && (x)<=POT_LAST && ((g_eeGeneral.potsType>>(2*((x)-POT1)))&0x03)==POT_TYPE_NO_DETENT)
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@ -471,7 +455,7 @@ enum PotType {
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#define LOAD_MODEL_BITMAP()
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#define LOAD_MODEL_BITMAP()
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#endif
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#endif
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#if defined(PCBTARANIS)
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#if defined(XCURVES)
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void loadCurves();
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void loadCurves();
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#define LOAD_MODEL_CURVES() loadCurves()
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#define LOAD_MODEL_CURVES() loadCurves()
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#else
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#else
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@ -43,7 +43,11 @@
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#include <time.h>
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#include <time.h>
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#include <ctype.h>
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#include <ctype.h>
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#define LCD_ZOOM 2
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#if LCD_W > 212
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#define LCD_ZOOM 1
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#else
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#define LCD_ZOOM 2
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#endif
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#define W2 LCD_W*LCD_ZOOM
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#define W2 LCD_W*LCD_ZOOM
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#define H2 LCD_H*LCD_ZOOM
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#define H2 LCD_H*LCD_ZOOM
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@ -331,9 +335,9 @@ long Open9xSim::onTimeout(FXObject*, FXSelector, void*)
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}
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}
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#if defined(PCBTARANIS)
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#if defined(PCBTARANIS)
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#define BL_COLOR FXRGB(47,123,227)
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#define BL_COLOR FXRGB(47, 123, 227)
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#else
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#else
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#define BL_COLOR FXRGB(150,200,152)
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#define BL_COLOR FXRGB(150, 200, 152)
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#endif
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#endif
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void Open9xSim::setPixel(int x, int y, FXColor color)
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void Open9xSim::setPixel(int x, int y, FXColor color)
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@ -349,9 +353,9 @@ void Open9xSim::refreshDisplay()
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{
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{
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if (lcd_refresh) {
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if (lcd_refresh) {
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lcd_refresh = false;
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lcd_refresh = false;
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FXColor offColor = IS_BACKLIGHT_ON() ? BL_COLOR : FXRGB(200,200,200);
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FXColor offColor = IS_BACKLIGHT_ON() ? BL_COLOR : FXRGB(200, 200, 200);
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#if !defined(PCBTARANIS)
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#if LCD_W == 128
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FXColor onColor = FXRGB(0,0,0);
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FXColor onColor = FXRGB(0, 0, 0);
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#endif
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#endif
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for (int x=0; x<LCD_W; x++) {
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for (int x=0; x<LCD_W; x++) {
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for (int y=0; y<LCD_H; y++) {
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for (int y=0; y<LCD_H; y++) {
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DMA2->LIFCR = DMA_LIFCR_CTCIF0 | DMA_LIFCR_CHTIF0 |DMA_LIFCR_CTEIF0 | DMA_LIFCR_CDMEIF0 | DMA_LIFCR_CFEIF0 ; // Write ones to clear bits
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DMA2->LIFCR = DMA_LIFCR_CTCIF0 | DMA_LIFCR_CHTIF0 |DMA_LIFCR_CTEIF0 | DMA_LIFCR_CDMEIF0 | DMA_LIFCR_CFEIF0 ; // Write ones to clear bits
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DMA2_Stream0->CR |= DMA_SxCR_EN ; // Enable DMA
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DMA2_Stream0->CR |= DMA_SxCR_EN ; // Enable DMA
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ADC1->CR2 |= (uint32_t)ADC_CR2_SWSTART ;
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ADC1->CR2 |= (uint32_t)ADC_CR2_SWSTART ;
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#if defined(REV9E)
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#if defined(REV9E)
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DMA2_Stream1->CR &= ~DMA_SxCR_EN ; // Disable DMA
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DMA2_Stream1->CR &= ~DMA_SxCR_EN ; // Disable DMA
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ADC3->SR &= ~(uint32_t) ( ADC_SR_EOC | ADC_SR_STRT | ADC_SR_OVR ) ;
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ADC3->SR &= ~(uint32_t) ( ADC_SR_EOC | ADC_SR_STRT | ADC_SR_OVR ) ;
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DMA2_Stream1->CR |= DMA_SxCR_EN ; // Enable DMA
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DMA2_Stream1->CR |= DMA_SxCR_EN ; // Enable DMA
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ADC3->CR2 |= (uint32_t)ADC_CR2_SWSTART ;
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ADC3->CR2 |= (uint32_t)ADC_CR2_SWSTART ;
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#endif // #if defined(REV9E)
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#endif // #if defined(REV9E)
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#if defined(REV9E)
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for (unsigned int i=0; i<10000; i++) {
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if ((DMA2->LISR & DMA_LISR_TCIF0) && (DMA2->LISR & DMA_LISR_TCIF1)) {
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break;
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}
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}
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DMA2_Stream0->CR &= ~DMA_SxCR_EN ; // Disable DMA
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DMA2_Stream1->CR &= ~DMA_SxCR_EN ; // Disable DMA
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#else
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for (unsigned int i=0; i<10000; i++) {
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for (unsigned int i=0; i<10000; i++) {
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if (DMA2->LISR & DMA_LISR_TCIF0) {
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if (DMA2->LISR & DMA_LISR_TCIF0) {
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break;
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break;
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}
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}
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}
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}
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DMA2_Stream0->CR &= ~DMA_SxCR_EN ; // Disable DMA
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DMA2_Stream0->CR &= ~DMA_SxCR_EN ; // Disable DMA
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#endif
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#if !defined(REV3)
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#if !defined(REV3)
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// adc direction correct
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// adc direction correct
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@ -94,14 +94,17 @@ extern "C" {
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#define BOOTLOADER_SIZE 0x8000
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#define BOOTLOADER_SIZE 0x8000
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#define FIRMWARE_ADDRESS 0x08000000
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#define FIRMWARE_ADDRESS 0x08000000
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#define PERI1_FREQUENCY 30000000
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#if defined(REV9E)
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#define PERI2_FREQUENCY 60000000
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#define PERI1_FREQUENCY 42000000
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#define PERI2_FREQUENCY 84000000
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#else
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#define PERI1_FREQUENCY 30000000
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#define PERI2_FREQUENCY 60000000
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#endif
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#define TIMER_MULT_APB1 2
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#define TIMER_MULT_APB1 2
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#define TIMER_MULT_APB2 2
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#define TIMER_MULT_APB2 2
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// #define JACK_PPM_OUT()
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// #define JACK_PPM_IN()
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#define PIN_MODE_MASK 0x0003
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#define PIN_MODE_MASK 0x0003
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#define PIN_INPUT 0x0000
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#define PIN_INPUT 0x0000
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#define PIN_OUTPUT 0x0001
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#define PIN_OUTPUT 0x0001
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