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Code Issues Wiki Activity

EEPROM Swap / Copy / Delete model now Ok on ErSky9x

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Simu target on ARM now ok
This commit is contained in:
bsongis 2012-03-29 18:29:49 +00:00
parent 0cf23e266d
commit 6113420a02
11 changed files with 331 additions and 244 deletions
Download patch file Download diff file Expand all files Collapse all files

25
src/Makefile
View file

@ -112,23 +112,17 @@ REV = $(shell sh -c "svnversion | egrep -o '[[:digit:]]+[[:alpha:]]*$$'")
# MCU name # MCU name
ifeq ($(PCB), STD) ifeq ($(PCB), STD)
TRGT = avr- TRGT = avr-
MCU = atmega64 MCU = atmega64
BOARDSRC = board_stock.cpp
EEPROMSRC = eeprom_avr.cpp
CPPDEFS = -DF_CPU=$(F_CPU)UL CPPDEFS = -DF_CPU=$(F_CPU)UL
endif endif
ifeq ($(PCB), V4) ifeq ($(PCB), V4)
TRGT = avr- TRGT = avr-
MCU = atmega2560 MCU = atmega2560
BOARDSRC = board_gruvin9x.cpp
EEPROMSRC = eeprom_avr.cpp
CPPDEFS = -DF_CPU=$(F_CPU)UL CPPDEFS = -DF_CPU=$(F_CPU)UL
endif endif
ifeq ($(PCB), ARM) ifeq ($(PCB), ARM)
TRGT = arm-none-eabi- TRGT = arm-none-eabi-
MCU = cortex-m3 MCU = cortex-m3
BOARDSRC = board_ersky9x.cpp
EEPROMSRC = eeprom_arm.cpp
CPPDEFS = CPPDEFS =
endif endif
@ -256,10 +250,9 @@ ifeq ($(PCB), ARM)
OPT = 2 OPT = 2
CPPDEFS += -DPCBARM CPPDEFS += -DPCBARM
EXTRAINCDIRS += ersky9x EXTRAINCDIRS += ersky9x
CPPSRC += ersky9x/core_cm3.c BOARDSRC = board_ersky9x.cpp
CPPSRC += ersky9x/board_lowlevel.c EXTRABOARDSRC = ersky9x/core_cm3.c ersky9x/board_lowlevel.c ersky9x/crt.c ersky9x/vectors_sam3s.c
CPPSRC += ersky9x/crt.c EEPROMSRC = eeprom_arm.cpp
CPPSRC += ersky9x/vectors_sam3s.c
CPPSRC += ersky9x/sound.cpp CPPSRC += ersky9x/sound.cpp
CPPSRC += beeper.cpp CPPSRC += beeper.cpp
endif endif
@ -269,6 +262,8 @@ ifeq ($(PCB), V4)
OPT = 2 OPT = 2
CPPDEFS += -DPCBV4 -DAUDIO CPPDEFS += -DPCBV4 -DAUDIO
EXTRAINCDIRS += gruvin9x EXTRAINCDIRS += gruvin9x
BOARDSRC += board_gruvin9x.cpp
EEPROMSRC = eeprom_avr.cpp
CPPSRC += audio.cpp CPPSRC += audio.cpp
CPPSRC += gruvin9x/gtime.cpp CPPSRC += gruvin9x/gtime.cpp
CPPSRC += gruvin9x/rtc.cpp CPPSRC += gruvin9x/rtc.cpp
@ -296,6 +291,8 @@ ifeq ($(PCB), STD)
# STD PCB, so ... # STD PCB, so ...
OPT = s OPT = s
CPPDEFS += -DPCBSTD CPPDEFS += -DPCBSTD
BOARDSRC = board_stock.cpp
EEPROMSRC = eeprom_avr.cpp
ifeq ($(AUDIO), YES) ifeq ($(AUDIO), YES)
CPPDEFS += -DAUDIO CPPDEFS += -DAUDIO
@ -511,7 +508,7 @@ FOXLIB=-L/usr/local/lib \
-Wl,-rpath,$(FOXPATH)/src/.libs -Wl,-rpath,$(FOXPATH)/src/.libs
simu: $(BOARDSRC) $(CPPSRC) Makefile simu.cpp simpgmspace.cpp *.h *.lbm eeprom.bin simu: $(BOARDSRC) $(CPPSRC) Makefile simu.cpp simpgmspace.cpp *.h *.lbm eeprom.bin
g++ simu.cpp $(BOARDSRC) $(CPPFLAGS) $(CPPSRC) simpgmspace.cpp $(ARCH) -MD -DSIMU -o simu $(FOXINC) $(FOXLIB) -pthread g++ simu.cpp $(CPPFLAGS) $(BOARDSRC) $(CPPSRC) simpgmspace.cpp $(ARCH) -MD -DSIMU -o simu $(FOXINC) $(FOXLIB) -pthread
eeprom.bin: eeprom.bin:
dd if=/dev/zero of=$@ bs=1 count=2048 dd if=/dev/zero of=$@ bs=1 count=2048
@ -554,9 +551,9 @@ endif
$(OBJDUMP) -h -S $< > $@ $(OBJDUMP) -h -S $< > $@
# Concatenate all sources files in one big file to optimize size # Concatenate all sources files in one big file to optimize size
allsrc.cpp: $(BOARDSRC) $(CPPSRC) allsrc.cpp: $(BOARDSRC) $(CPPSRC) $(EXTRABOARDSRC)
@echo -n > allsrc.cpp @echo -n > allsrc.cpp
for f in $(BOARDSRC) $(CPPSRC); do echo "# 1 \"$$f\"" >> allsrc.cpp; cat "$$f" >> allsrc.cpp; done for f in $(BOARDSRC) $(CPPSRC) $(EXTRABOARDSRC) ; do echo "# 1 \"$$f\"" >> allsrc.cpp; cat "$$f" >> allsrc.cpp; done
remallsrc: remallsrc:
$(REMOVE) allsrc.cpp $(REMOVE) allsrc.cpp

272
src/board_ersky9x.cpp
View file

@ -32,10 +32,9 @@
*/ */
#include "open9x.h" #include "open9x.h"
#include "AT91SAM3S2.h"
#include "core_cm3.h"
uint32_t Master_frequency ; uint32_t Master_frequency ;
volatile uint32_t Tenms ;
/** Console baudrate 9600. */ /** Console baudrate 9600. */
#define CONSOLE_BAUDRATE 9600 #define CONSOLE_BAUDRATE 9600
@ -156,6 +155,8 @@ inline void setup_switches()
#endif #endif
} }
#ifndef SIMU
/** /**
* Configures a UART peripheral with the specified parameters. * Configures a UART peripheral with the specified parameters.
* *
@ -316,9 +317,6 @@ inline void start_timer0()
ptc->TC_CHANNEL[0].TC_CCR = 5 ; // Enable clock and trigger it (may only need trigger) ptc->TC_CHANNEL[0].TC_CCR = 5 ; // Enable clock and trigger it (may only need trigger)
} }
// TODO where used
volatile uint32_t Tenms ;
extern "C" void TC2_IRQHandler() extern "C" void TC2_IRQHandler()
{ {
register uint32_t dummy; register uint32_t dummy;
@ -327,7 +325,7 @@ extern "C" void TC2_IRQHandler()
/* Clear status bit to acknowledge interrupt */ /* Clear status bit to acknowledge interrupt */
dummy = TC0->TC_CHANNEL[2].TC_SR; dummy = TC0->TC_CHANNEL[2].TC_SR;
(void) dummy ; // Discard value - prevents compiler warning (void) dummy ; // Discard value - prevents compiler warning
Tenms |= 1 ; // 10 mS has passed
/* TODO if ( Buzzer_count ) /* TODO if ( Buzzer_count )
{ {
if ( --Buzzer_count == 0 ) if ( --Buzzer_count == 0 )
@ -585,9 +583,12 @@ void board_init()
eeprom_init(); eeprom_init();
} }
#endif
uint16_t getTmr2MHz() uint16_t getTmr2MHz()
{ {
return TC1->TC_CHANNEL[0].TC_CV ; return TC1->TC_CHANNEL[0].TC_CV ;
} }
// keys: // keys:
@ -601,130 +602,124 @@ uint16_t getTmr2MHz()
// LCD pins 5 DOWN, 4 RIGHT, 3 LEFT, 1 UP // LCD pins 5 DOWN, 4 RIGHT, 3 LEFT, 1 UP
uint32_t read_keys() uint32_t read_keys()
{ {
register uint32_t x ; register uint32_t x;
register uint32_t y ; register uint32_t y;
x = PIOC->PIO_PDSR << 1; // 6 LEFT, 5 RIGHT, 4 DOWN, 3 UP ()
x = PIOC->PIO_PDSR << 1 ; // 6 LEFT, 5 RIGHT, 4 DOWN, 3 UP ()
#ifdef REVB #ifdef REVB
y = x & 0x00000020 ; // RIGHT y = x & 0x00000020; // RIGHT
if ( x & 0x00000004 ) if ( x & 0x00000004 )
{ {
y |= 0x00000010 ; // UP y |= 0x00000010; // UP
} }
if ( x & 0x00000010 ) if ( x & 0x00000010 )
{ {
y |= 0x00000040 ; // LEFT y |= 0x00000040; // LEFT
} }
if ( x & 0x00000040 ) if ( x & 0x00000040 )
{ {
y |= 0x00000008 ; // DOWN y |= 0x00000008; // DOWN
} }
#else #else
y = x & 0x00000060 ;
if ( x & 0x00000008 ) y = x & 0x00000060;
{ if (x & 0x00000008) {
y |= 0x00000010 ; y |= 0x00000010;
} }
if ( x & 0x00000010 ) if (x & 0x00000010) {
{ y |= 0x00000008;
y |= 0x00000008 ; }
}
#endif #endif
#ifdef REVB #ifdef REVB
if ( PIOC->PIO_PDSR & 0x01000000 ) if ( PIOC->PIO_PDSR & 0x01000000 )
#else #else
if ( PIOA->PIO_PDSR & 0x80000000 ) if (PIOA->PIO_PDSR & 0x80000000)
#endif #endif
{ {
y |= 4 ; // EXIT y |= 4; // EXIT
} }
#ifdef REVB #ifdef REVB
if ( PIOB->PIO_PDSR & 0x000000020 ) if ( PIOB->PIO_PDSR & 0x000000020 )
#else #else
if ( PIOB->PIO_PDSR & 0x000000040 ) if (PIOB->PIO_PDSR & 0x000000040)
#endif #endif
{ {
y |= 2 ; // MENU y |= 2; // MENU
} }
return y ;
return y ;
} }
uint32_t read_trims() uint32_t read_trims()
{ {
uint32_t trims ; uint32_t trims = 0;
trims = 0 ;
// TRIM_LH_DOWN PA7 (PA23) // TRIM_LH_DOWN PA7 (PA23)
#ifdef REVB #ifdef REVB
if ( ( PIOA->PIO_PDSR & 0x00800000 ) == 0 ) if ( ( PIOA->PIO_PDSR & 0x00800000 ) == 0 )
#else #else
if ( ( PIOA->PIO_PDSR & 0x0080 ) == 0 ) if ((PIOA->PIO_PDSR & 0x0080) == 0)
#endif #endif
{ {
trims |= 1 ; trims |= 1;
} }
// TRIM_LH_UP PB4 // TRIM_LH_UP PB4
if ( ( PIOB->PIO_PDSR & 0x10 ) == 0 ) if ((PIOB->PIO_PDSR & 0x10) == 0) {
{ trims |= 2;
trims |= 2 ; }
}
// TRIM_LV_DOWN PA27 (PA24) // TRIM_LV_DOWN PA27 (PA24)
#ifdef REVB #ifdef REVB
if ( ( PIOA->PIO_PDSR & 0x01000000 ) == 0 ) if ( ( PIOA->PIO_PDSR & 0x01000000 ) == 0 )
#else #else
if ( ( PIOA->PIO_PDSR & 0x08000000 ) == 0 ) if ((PIOA->PIO_PDSR & 0x08000000) == 0)
#endif #endif
{ {
trims |= 4 ; trims |= 4;
} }
// TRIM_LV_UP PC28 // TRIM_LV_UP PC28
if ( ( PIOC->PIO_PDSR & 0x10000000 ) == 0 ) if ((PIOC->PIO_PDSR & 0x10000000) == 0) {
{ trims |= 8;
trims |= 8 ; }
}
// TRIM_RV_DOWN PC10 // TRIM_RV_DOWN PC10
if ( ( PIOC->PIO_PDSR & 0x00000400 ) == 0 ) if ((PIOC->PIO_PDSR & 0x00000400) == 0) {
{ trims |= 0x10;
trims |= 0x10 ; }
}
// TRIM_RV_UP PA30 (PA1) // TRIM_RV_UP PA30 (PA1)
#ifdef REVB #ifdef REVB
if ( ( PIOA->PIO_PDSR & 0x00000002 ) == 0 ) if ( ( PIOA->PIO_PDSR & 0x00000002 ) == 0 )
#else #else
if ( ( PIOA->PIO_PDSR & 0x40000000 ) == 0 ) if ((PIOA->PIO_PDSR & 0x40000000) == 0)
#endif #endif
{ {
trims |= 0x20 ; trims |= 0x20;
} }
// TRIM_RH_DOWN PA29 (PA0) // TRIM_RH_DOWN PA29 (PA0)
#ifdef REVB #ifdef REVB
if ( ( PIOA->PIO_PDSR & 0x00000001 ) == 0 ) if ( ( PIOA->PIO_PDSR & 0x00000001 ) == 0 )
#else #else
if ( ( PIOA->PIO_PDSR & 0x20000000 ) == 0 ) if ((PIOA->PIO_PDSR & 0x20000000) == 0)
#endif #endif
{ {
trims |= 0x40 ; trims |= 0x40;
} }
// TRIM_RH_UP PC9 // TRIM_RH_UP PC9
if ( ( PIOC->PIO_PDSR & 0x00000200 ) == 0 ) if ((PIOC->PIO_PDSR & 0x00000200) == 0) {
{ trims |= 0x80;
trims |= 0x80 ; }
}
return trims ; return trims ;
} }
uint8_t keyDown() uint8_t keyDown()
{ {
return ~read_keys() & 0x7E ; return ~read_keys() & 0x7E ;
@ -732,53 +727,63 @@ uint8_t keyDown()
extern uint32_t keyState(EnumKeys enuk) extern uint32_t keyState(EnumKeys enuk)
{ {
CPU_UINT xxx = 0 ; CPU_UINT xxx = 0;
if(enuk < (int)DIM(keys)) return keys[enuk].state() ? 1 : 0;
switch((uint8_t)enuk) if (enuk < (int) DIM(keys)) return keys[enuk].state() ? 1 : 0;
{
switch ((uint8_t) enuk) {
#ifdef REVB #ifdef REVB
case SW_ElevDR : xxx = PIOC->PIO_PDSR & 0x80000000 ; // ELE_DR PC31 case SW_ElevDR : xxx = PIOC->PIO_PDSR & 0x80000000; // ELE_DR PC31
#else #else
case SW_ElevDR : xxx = PIOA->PIO_PDSR & 0x00000100 ; // ELE_DR PA8 case SW_ElevDR:
xxx = PIOA->PIO_PDSR & 0x00000100; // ELE_DR PA8
#endif #endif
break ; break;
case SW_AileDR : xxx = PIOA->PIO_PDSR & 0x00000004 ; // AIL-DR PA2 case SW_AileDR:
break ; xxx = PIOA->PIO_PDSR & 0x00000004; // AIL-DR PA2
break;
case SW_RuddDR : xxx = PIOA->PIO_PDSR & 0x00008000 ; // RUN_DR PA15 case SW_RuddDR:
break ; xxx = PIOA->PIO_PDSR & 0x00008000; // RUN_DR PA15
break;
// INP_G_ID1 INP_E_ID2 // INP_G_ID1 INP_E_ID2
// id0 0 1 // id0 0 1
// id1 1 1 // id1 1 1
// id2 1 0 // id2 1 0
case SW_ID0 : xxx = ~PIOC->PIO_PDSR & 0x00004000 ; // SW_IDL1 PC14 case SW_ID0:
break ; xxx = ~PIOC->PIO_PDSR & 0x00004000; // SW_IDL1 PC14
case SW_ID1 : xxx = (PIOC->PIO_PDSR & 0x00004000) ; if ( xxx ) xxx = (PIOC->PIO_PDSR & 0x00000800); break;
break ; case SW_ID1:
case SW_ID2 : xxx = ~PIOC->PIO_PDSR & 0x00000800 ; // SW_IDL2 PC11 xxx = (PIOC->PIO_PDSR & 0x00004000);
break ; if (xxx) xxx = (PIOC->PIO_PDSR & 0x00000800);
break;
case SW_ID2:
xxx = ~PIOC->PIO_PDSR & 0x00000800; // SW_IDL2 PC11
break;
case SW_Gear:
case SW_Gear : xxx = PIOC->PIO_PDSR & 0x00010000 ; // SW_GEAR PC16 xxx = PIOC->PIO_PDSR & 0x00010000; // SW_GEAR PC16
break ; break;
#ifdef REVB #ifdef REVB
case SW_ThrCt : xxx = PIOC->PIO_PDSR & 0x00100000 ; // SW_TCUT PC20 case SW_ThrCt : xxx = PIOC->PIO_PDSR & 0x00100000; // SW_TCUT PC20
#else #else
case SW_ThrCt : xxx = PIOA->PIO_PDSR & 0x10000000 ; // SW_TCUT PA28 case SW_ThrCt:
xxx = PIOA->PIO_PDSR & 0x10000000; // SW_TCUT PA28
#endif #endif
break ; break;
case SW_Trainer: xxx = PIOC->PIO_PDSR & 0x00000100 ; // SW-TRAIN PC8 case SW_Trainer:
break ; xxx = PIOC->PIO_PDSR & 0x00000100; // SW-TRAIN PC8
default:; break;
default:
break;
} }
if ( xxx ) if (xxx) {
{ return 1;
return 1 ;
} }
return 0; return 0;
} }
@ -827,25 +832,22 @@ void read_9_adc()
void readKeysAndTrims() void readKeysAndTrims()
{ {
register uint32_t i ; register uint32_t i;
if ( PIOC->PIO_ODSR & 0x00080000 ) if (PIOC->PIO_ODSR & 0x00080000) {
{ PIOC->PIO_CODR = 0x00200000L; // Set bit C19 OFF
PIOC->PIO_CODR = 0x00200000L ; // Set bit C19 OFF }
} else {
else PIOC->PIO_SODR = 0x00200000L; // Set bit C19 ON
{ }
PIOC->PIO_SODR = 0x00200000L ; // Set bit C19 ON
}
uint8_t enuk = KEY_MENU; uint8_t enuk = KEY_MENU;
uint8_t in = ~read_keys() ; uint8_t in = ~read_keys();
for( i=1; i<7; i++) for (i = 1; i < 7; i++) {
{
//INP_B_KEY_MEN 1 .. INP_B_KEY_LFT 6 //INP_B_KEY_MEN 1 .. INP_B_KEY_LFT 6
keys[enuk].input(in & (1<<i),(EnumKeys)enuk); keys[enuk].input(in & (1 << i), (EnumKeys) enuk);
++enuk; ++enuk;
} }
// static const uint8_t crossTrim[]={ // static const uint8_t crossTrim[]={
// 1<<INP_D_TRM_LH_DWN, // 1<<INP_D_TRM_LH_DWN,
// 1<<INP_D_TRM_LH_UP, // 1<<INP_D_TRM_LH_UP,
@ -856,14 +858,13 @@ keys[enuk].input(in & (1<<i),(EnumKeys)enuk);
// 1<<INP_D_TRM_RH_DWN, // 1<<INP_D_TRM_RH_DWN,
// 1<<INP_D_TRM_RH_UP // 1<<INP_D_TRM_RH_UP
// }; // };
in = read_trims() ; in = read_trims();
for( i=1; i<256; i<<=1) for (i = 1; i < 256; i <<= 1) {
{
// INP_D_TRM_RH_UP 0 .. INP_D_TRM_LH_UP 7 // INP_D_TRM_RH_UP 0 .. INP_D_TRM_LH_UP 7
keys[enuk].input(in & i,(EnumKeys)enuk); keys[enuk].input(in & i, (EnumKeys) enuk);
++enuk; ++enuk;
} }
} }
void end_ppm_capture() void end_ppm_capture()
@ -871,3 +872,4 @@ void end_ppm_capture()
TC1->TC_CHANNEL[0].TC_IDR = TC_IDR0_LDRAS ; TC1->TC_CHANNEL[0].TC_IDR = TC_IDR0_LDRAS ;
NVIC_DisableIRQ(TC3_IRQn) ; NVIC_DisableIRQ(TC3_IRQn) ;
} }

4
src/drivers.cpp
View file

@ -137,6 +137,10 @@ void per10ms()
g_tmr10ms++; g_tmr10ms++;
g_blinkTmr10ms++; g_blinkTmr10ms++;
#if defined (PCBARM)
Tenms |= 1 ; // 10 mS has passed
#endif
#if defined (PCBV4) #if defined (PCBV4)
/* Update gloabal Date/Time every 100 per10ms cycles */ /* Update gloabal Date/Time every 100 per10ms cycles */
if (++g_ms100 == 100) if (++g_ms100 == 100)

130
src/eeprom_arm.cpp
View file

@ -87,6 +87,7 @@ uint32_t Update_timer ;
//#define E_WRITEWAITING 5 //#define E_WRITEWAITING 5
//#define E_32ACTIVE 6 //#define E_32ACTIVE 6
// TODO use these constants everywhere
#define EE_WAIT 0 #define EE_WAIT 0
#define EE_NO_WAIT 1 #define EE_NO_WAIT 1
@ -101,8 +102,8 @@ void eeDirty(uint8_t msk)
void handle_serial( void ) ; void handle_serial( void ) ;
uint32_t get_current_block_number( uint32_t block_no, uint16_t *p_size, uint32_t *p_seq ) ; uint32_t get_current_block_number( uint32_t block_no, uint16_t *p_size, uint32_t *p_seq ) ;
uint32_t read32_eeprom_data( uint32_t eeAddress, register uint8_t *buffer, uint32_t size, uint32_t immediate ) ; void read32_eeprom_data( uint32_t eeAddress, register uint8_t *buffer, uint32_t size, uint32_t immediate ) ;
uint32_t write32_eeprom_block( uint32_t eeAddress, register uint8_t *buffer, uint32_t size, uint32_t immediate ) ; void write32_eeprom_block( uint32_t eeAddress, register uint8_t *buffer, uint32_t size, uint32_t immediate ) ;
void ee32_read_model_names( void ) ; void ee32_read_model_names( void ) ;
void ee32LoadModelName(uint8_t id, char *buf, uint8_t len) ; void ee32LoadModelName(uint8_t id, char *buf, uint8_t len) ;
@ -177,23 +178,25 @@ void eeSwapModels(uint8_t id1, uint8_t id2)
{ {
// eeCheck(true) should have been called before entering here // eeCheck(true) should have been called before entering here
uint16_t id1_size = File_system[id1+1].size; uint16_t id2_size = File_system[id2+1].size;
uint32_t id1_block_no = File_system[id1+1].block_no; uint32_t id2_block_no = File_system[id2+1].block_no;
eeCopyModel(id1, id2); eeCopyModel(id2, id1);
// block_no(id1) has been shifted now, but we have the size // block_no(id1) has been shifted now, but we have the size
read32_eeprom_data( (id1_block_no << 12) + sizeof( struct t_eeprom_header), ( uint8_t *)&Eeprom_buffer.data.model_data, id1_size, 0 ) ;
// TODO flash saving with function above ... // TODO flash saving with function above ...
if (id1_size > sizeof(g_model.name)) if (id2_size > sizeof(g_model.name)) {
memcpy(ModelNames[id2], Eeprom_buffer.data.model_data.name, sizeof(g_model.name)); read32_eeprom_data( (id2_block_no << 12) + sizeof( struct t_eeprom_header), ( uint8_t *)&Eeprom_buffer.data.model_data, id2_size, 0 );
else memcpy(ModelNames[id1], Eeprom_buffer.data.model_data.name, sizeof(g_model.name));
memset(ModelNames[id2], 0, sizeof(g_model.name)); }
else {
memset(ModelNames[id1], 0, sizeof(g_model.name));
}
Eeprom32_source_address = (uint8_t *)&Eeprom_buffer.data.model_data; // Get data from here Eeprom32_source_address = (uint8_t *)&Eeprom_buffer.data.model_data; // Get data from here
Eeprom32_data_size = id1_size ; // This much Eeprom32_data_size = id2_size ; // This much
Eeprom32_file_index = id2 + 1 ; // This file system entry Eeprom32_file_index = id1 + 1 ; // This file system entry
Eeprom32_process_state = E32_BLANKCHECK ; Eeprom32_process_state = E32_BLANKCHECK ;
eeWaitFinished(); eeWaitFinished();
} }
@ -254,6 +257,7 @@ uint32_t spi_PDC_action( register uint8_t *command, register uint8_t *tx, regist
uint32_t eeprom_write_one( uint8_t byte, uint8_t count ) uint32_t eeprom_write_one( uint8_t byte, uint8_t count )
{ {
#ifndef SIMU
register Spi *spiptr; register Spi *spiptr;
register uint32_t result; register uint32_t result;
@ -285,6 +289,9 @@ uint32_t eeprom_write_one( uint8_t byte, uint8_t count )
} }
spiptr->SPI_CR = 2; // Disable spiptr->SPI_CR = 2; // Disable
return spiptr->SPI_RDR ; return spiptr->SPI_RDR ;
#else
return !Spi_complete;
#endif
} }
void eeprom_write_enable() void eeprom_write_enable()
@ -298,56 +305,56 @@ uint32_t eeprom_read_status()
} }
// Read eeprom data starting at random address // Read eeprom data starting at random address
uint32_t read32_eeprom_data( uint32_t eeAddress, register uint8_t *buffer, uint32_t size, uint32_t immediate ) void read32_eeprom_data( uint32_t eeAddress, register uint8_t *buffer, uint32_t size, uint32_t immediate )
{ {
register uint8_t *p ; #ifdef SIMU
register uint32_t x ; assert(size);
eeprom_pointer = eeAddress;
p = Spi_tx_buf ; eeprom_buffer_data = (char*)buffer;
eeprom_buffer_size = size;
eeprom_read_operation = true;
Spi_complete = false;
sem_post(&eeprom_write_sem);
#else
register uint8_t *p = Spi_tx_buf ;
*p = 3 ; // Read command *p = 3 ; // Read command
*(p+1) = eeAddress >> 16 ; *(p+1) = eeAddress >> 16 ;
*(p+2) = eeAddress >> 8 ; *(p+2) = eeAddress >> 8 ;
*(p+3) = eeAddress ; // 3 bytes address *(p+3) = eeAddress ; // 3 bytes address
spi_PDC_action( p, 0, buffer, 4, size ) ; spi_PDC_action( p, 0, buffer, 4, size ) ;
#endif
if ( immediate ) if (immediate )
{ return ;
return 0 ;
} while (!Spi_complete) ;
for ( x = 0 ; x < 100000 ; x += 1 )
{
// TODO while + ERROR_TIMEOUT
if ( Spi_complete )
{
break ;
}
}
return x ;
} }
uint32_t write32_eeprom_block( uint32_t eeAddress, register uint8_t *buffer, uint32_t size, uint32_t immediate ) void write32_eeprom_block( uint32_t eeAddress, register uint8_t *buffer, uint32_t size, uint32_t immediate )
{ {
register uint8_t *p; #ifdef SIMU
register uint32_t x; assert(size);
eeprom_pointer = eeAddress;
eeprom_buffer_data = (char*)buffer;
eeprom_buffer_size = size+1;
eeprom_read_operation = false;
Spi_complete = false;
sem_post(&eeprom_write_sem);
#else
eeprom_write_enable(); eeprom_write_enable();
p = Spi_tx_buf; register uint8_t *p = Spi_tx_buf;
*p = 2; // Write command *p = 2; // Write command
*(p + 1) = eeAddress >> 16; *(p + 1) = eeAddress >> 16;
*(p + 2) = eeAddress >> 8; *(p + 2) = eeAddress >> 8;
*(p + 3) = eeAddress; // 3 bytes address *(p + 3) = eeAddress; // 3 bytes address
spi_PDC_action(p, buffer, 0, 4, size); spi_PDC_action(p, buffer, 0, 4, size);
#endif
if (immediate) { if (immediate)
return 0; return;
}
for (x = 0; x < 100000; x += 1) { while (!Spi_complete) ;
if (Spi_complete) {
break;
}
}
return x ;
} }
uint8_t byte_checksum( uint8_t *p, uint32_t size ) uint8_t byte_checksum( uint8_t *p, uint32_t size )
@ -453,22 +460,22 @@ bool ee32LoadGeneral()
memset(&g_eeGeneral, 0, sizeof(EEGeneral)); memset(&g_eeGeneral, 0, sizeof(EEGeneral));
if ( size > sizeof(EEGeneral) ) { if (size > sizeof(EEGeneral)) {
size = sizeof(EEGeneral) ; size = sizeof(EEGeneral) ;
} }
if ( size ) { if (size) {
read32_eeprom_data( ( File_system[0].block_no << 12) + sizeof( struct t_eeprom_header), ( uint8_t *)&g_eeGeneral, size, 0 ) ; read32_eeprom_data( ( File_system[0].block_no << 12) + sizeof( struct t_eeprom_header), ( uint8_t *)&g_eeGeneral, size, 0 ) ;
} }
/*if(g_eeGeneral.myVers<MDVERS) if (g_eeGeneral.myVers == EEPROM_VER) {
sysFlags |= sysFLAG_OLD_EEPROM; // if old EEPROM - Raise flag uint16_t sum = evalChkSum();
*/ if (g_eeGeneral.chkSum == sum) {
g_eeGeneral.myVers = EEPROM_VER; return true;
}
}
uint16_t sum=0; return false;
if(size>(sizeof(EEGeneral)-20)) for(uint8_t i=0; i<12;i++) sum+=g_eeGeneral.calibMid[i];
return g_eeGeneral.chkSum == sum;
} }
void eeLoadModel(uint8_t id) void eeLoadModel(uint8_t id)
@ -640,6 +647,7 @@ void init_spi()
spi_operation( p, spi_buf, 2 ) ; spi_operation( p, spi_buf, 2 ) ;
} }
#ifndef SIMU
extern "C" void SPI_IRQHandler() extern "C" void SPI_IRQHandler()
{ {
register Spi *spiptr ; register Spi *spiptr ;
@ -655,6 +663,7 @@ extern "C" void SPI_IRQHandler()
// Power save // Power save
// PMC->PMC_PCER0 &= ~0x00200000L ; // Disable peripheral clock to SPI // PMC->PMC_PCER0 &= ~0x00200000L ; // Disable peripheral clock to SPI
} }
#endif
void end_spi() void end_spi()
{ {
@ -747,6 +756,9 @@ void ee32_process()
else else
{ {
#endif #endif
#ifdef SIMU
Eeprom32_process_state = E32_WRITESTART ;
#else
eeAddress = Eeprom32_address ; eeAddress = Eeprom32_address ;
eeprom_write_enable() ; eeprom_write_enable() ;
p = Spi_tx_buf ; p = Spi_tx_buf ;
@ -757,6 +769,7 @@ void ee32_process()
spi_PDC_action( p, 0, 0, 4, 0 ) ; spi_PDC_action( p, 0, 0, 4, 0 ) ;
Eeprom32_process_state = E32_ERASESENDING ; Eeprom32_process_state = E32_ERASESENDING ;
Eeprom32_state_after_erase = E32_WRITESTART ; Eeprom32_state_after_erase = E32_WRITESTART ;
#endif
// } // }
// } // }
} }
@ -772,10 +785,8 @@ void ee32_process()
*q++ = *p++; // Copy the data to temp buffer *q++ = *p++; // Copy the data to temp buffer
} }
} }
Eeprom_buffer.header.sequence_no = Eeprom_buffer.header.sequence_no = ++File_system[Eeprom32_file_index].sequence_no;
++File_system[Eeprom32_file_index].sequence_no; File_system[Eeprom32_file_index].size = Eeprom_buffer.header.data_size = Eeprom32_data_size;
File_system[Eeprom32_file_index].size = Eeprom_buffer.header.data_size =
Eeprom32_data_size;
Eeprom_buffer.header.flags = 0; Eeprom_buffer.header.flags = 0;
Eeprom_buffer.header.hcsum = byte_checksum((uint8_t *) &Eeprom_buffer, 7); Eeprom_buffer.header.hcsum = byte_checksum((uint8_t *) &Eeprom_buffer, 7);
total_size = Eeprom32_data_size + sizeof(struct t_eeprom_header); total_size = Eeprom32_data_size + sizeof(struct t_eeprom_header);
@ -820,9 +831,10 @@ void ee32_process()
} }
else else
{ {
File_system[Eeprom32_file_index].block_no ^= 1 ; // This is now the current block
#if 0 #if 0
// now erase the other block // now erase the other block
File_system[Eeprom32_file_index].block_no ^= 1 ; // This is now the current block File_system[Eeprom32_file_index].block_no ^= 1 ; // This is now the current block
eeAddress = Eeprom32_address ^ 0x00001000 ; // Address of block to erase eeAddress = Eeprom32_address ^ 0x00001000 ; // Address of block to erase
eeprom_write_enable() ; eeprom_write_enable() ;
p = Spi_tx_buf ; p = Spi_tx_buf ;
@ -875,7 +887,9 @@ void ee32_read_model_names()
void eeprom_init() void eeprom_init()
{ {
#ifndef SIMU
init_spi() ; init_spi() ;
#endif
fill_file_index() ; fill_file_index() ;
Eeprom32_process_state = E32_IDLE ; Eeprom32_process_state = E32_IDLE ;
} }

2
src/eeprom_avr.cpp
View file

@ -249,7 +249,7 @@ void EeFsFormat()
s_sync_write = false; s_sync_write = false;
} }
bool EeFsOpen() bool EeFsOpen() // TODO inline?
{ {
eeprom_read_block(&eeFs,0,sizeof(eeFs)); eeprom_read_block(&eeFs,0,sizeof(eeFs));

11
src/ersky9x/sound.cpp
View file

@ -32,14 +32,7 @@
* *
****************************************************************************/ ****************************************************************************/
#include "open9x.h"
#include <stdint.h>
#include "AT91SAM3S2.h"
#include "core_cm3.h"
#include "sound.h"
void start_sound( void ) ; void start_sound( void ) ;
void buzzer_on( void ) ; void buzzer_on( void ) ;
@ -58,7 +51,7 @@ extern "C" void TWI0_IRQHandler (void) ;
void audioDefevent( uint8_t e ) ; void audioDefevent( uint8_t e ) ;
extern uint32_t Master_frequency ; extern uint32_t Master_frequency ; // TODO in a .h?
volatile uint32_t Tone_timer ; // Modified in interrupt routine volatile uint32_t Tone_timer ; // Modified in interrupt routine
volatile uint8_t Buzzer_count ; volatile uint8_t Buzzer_count ;

22
src/lcd.cpp
View file

@ -574,8 +574,6 @@ void putsTrimMode(uint8_t x, uint8_t y, uint8_t phase, uint8_t idx, uint8_t att)
#ifdef PCBARM #ifdef PCBARM
#include "AT91SAM3S2.h"
// LCD i/o pins // LCD i/o pins
// LCD_RES PC27 // LCD_RES PC27
// LCD_CS1 PC26 // LCD_CS1 PC26
@ -725,6 +723,7 @@ void lcd_init()
void lcdSetRefVolt(uint8_t val) void lcdSetRefVolt(uint8_t val)
{ {
#ifndef SIMU
register Pio *pioptr ; register Pio *pioptr ;
pioptr = PIOC ; pioptr = PIOC ;
@ -746,8 +745,10 @@ void lcdSetRefVolt(uint8_t val)
pioptr->PIO_PUER = 0x0000003CL ; // Set bits 2, 3, 4, 5 with pullups pioptr->PIO_PUER = 0x0000003CL ; // Set bits 2, 3, 4, 5 with pullups
pioptr->PIO_ODSR = 0 ; // Drive D0 low pioptr->PIO_ODSR = 0 ; // Drive D0 low
#endif #endif
#endif
} }
#ifndef SIMU
void refreshDisplay() void refreshDisplay()
{ {
register Pio *pioptr; register Pio *pioptr;
@ -827,6 +828,7 @@ void refreshDisplay()
#endif #endif
pioptr->PIO_ODSR = 0 ; // Drive D0 low pioptr->PIO_ODSR = 0 ; // Drive D0 low
} }
#endif
#else #else
@ -885,12 +887,9 @@ void lcdSetRefVolt(uint8_t val)
lcdSendCtl(val); lcdSendCtl(val);
} }
#ifndef SIMU
void refreshDisplay() void refreshDisplay()
{ {
#ifdef SIMU
memcpy(lcd_buf, displayBuf, sizeof(displayBuf));
lcd_refresh = true;
#else
uint8_t *p=displayBuf; uint8_t *p=displayBuf;
for(uint8_t y=0; y < 8; y++) { for(uint8_t y=0; y < 8; y++) {
lcdSendCtl(0x04); lcdSendCtl(0x04);
@ -910,7 +909,16 @@ void refreshDisplay()
PORTC_LCD_CTRL |= (1<<OUT_C_LCD_A0); PORTC_LCD_CTRL |= (1<<OUT_C_LCD_A0);
PORTC_LCD_CTRL |= (1<<OUT_C_LCD_CS1); PORTC_LCD_CTRL |= (1<<OUT_C_LCD_CS1);
} }
#endif
} }
#endif
#endif #endif
#ifdef SIMU
void refreshDisplay()
{
memcpy(lcd_buf, displayBuf, sizeof(displayBuf));
lcd_refresh = true;
}
#endif

11
src/open9x.h
View file

@ -46,10 +46,13 @@
#include "gruvin9x/gtime.h" #include "gruvin9x/gtime.h"
#endif #endif
#if defined(PCBARM)
#include "ersky9x/AT91SAM3S2.h"
#endif
#if defined(SIMU) #if defined(SIMU)
#include "simpgmspace.h" #include "simpgmspace.h"
#elif defined(PCBARM) #elif defined(PCBARM)
#include "ersky9x/AT91SAM3S2.h"
#include "ersky9x/core_cm3.h" #include "ersky9x/core_cm3.h"
typedef const unsigned char pm_uchar; typedef const unsigned char pm_uchar;
typedef const char pm_char; typedef const char pm_char;
@ -560,9 +563,13 @@ extern uint8_t s_eeDirtyMsk;
#define STORE_GENERALVARS eeDirty(EE_GENERAL) #define STORE_GENERALVARS eeDirty(EE_GENERAL)
#if defined (PCBARM) #if defined (PCBARM)
#include "AT91SAM3S2.h" #ifndef SIMU
#define BACKLIGHT_ON (PWM->PWM_CH_NUM[0].PWM_CDTY = 0/*TODO g_eeGeneral.bright*/) #define BACKLIGHT_ON (PWM->PWM_CH_NUM[0].PWM_CDTY = 0/*TODO g_eeGeneral.bright*/)
#define BACKLIGHT_OFF (PWM->PWM_CH_NUM[0].PWM_CDTY = 100) #define BACKLIGHT_OFF (PWM->PWM_CH_NUM[0].PWM_CDTY = 100)
#else
#define BACKLIGHT_ON
#define BACKLIGHT_OFF
#endif
#ifdef REVB #ifdef REVB
#define NUMBER_ANALOG 9 #define NUMBER_ANALOG 9
#else #else

38
src/simpgmspace.cpp
View file

@ -31,11 +31,7 @@
* *
*/ */
#include <ctype.h>
#include "simpgmspace.h"
#include "lcd.h"
#include "open9x.h" #include "open9x.h"
#include "menus.h"
volatile uint8_t pinb=0, pinc=0xff, pind, pine=0xff, ping=0xff, pinh=0xff, pinj=0xff, pinl=0; volatile uint8_t pinb=0, pinc=0xff, pind, pine=0xff, ping=0xff, pinh=0xff, pinj=0xff, pinl=0;
uint8_t portb, portc, porth=0, dummyport; uint8_t portb, portc, porth=0, dummyport;
@ -43,8 +39,20 @@ uint16_t dummyport16;
const char *eepromFile = NULL; const char *eepromFile = NULL;
FILE *fp = NULL; FILE *fp = NULL;
#if defined(PCBARM)
Pio Pioa;
Pio Piob;
Pio Pioc;
uint32_t eeprom_pointer;
char* eeprom_buffer_data;
volatile int32_t eeprom_buffer_size;
bool eeprom_read_operation;
#define EESIZE (128*4048)
#else
extern uint16_t eeprom_pointer; extern uint16_t eeprom_pointer;
extern const char* eeprom_buffer_data; extern const char* eeprom_buffer_data;
#endif
uint8_t eeprom[EESIZE]; uint8_t eeprom[EESIZE];
sem_t eeprom_write_sem; sem_t eeprom_write_sem;
@ -59,6 +67,7 @@ void setSwitch(int8_t swtch)
break; break;
case DSW_ID2: case DSW_ID2:
ping &= ~(1<<INP_G_ID1); pine |= (1<<INP_E_ID2); ping &= ~(1<<INP_G_ID1); pine |= (1<<INP_E_ID2);
break;
default: default:
break; break;
} }
@ -71,7 +80,14 @@ void *eeprom_write_function(void *)
if (!eeprom_thread_running) if (!eeprom_thread_running)
return NULL; return NULL;
#if defined(PCBARM)
if (eeprom_read_operation) {
assert(eeprom_buffer_size);
eeprom_read_block(eeprom_buffer_data, (const void *)(int64_t)eeprom_pointer, eeprom_buffer_size);
// TODO sleep()
}
else {
#endif
while (--eeprom_buffer_size) { while (--eeprom_buffer_size) {
assert(eeprom_buffer_size > 0); assert(eeprom_buffer_size > 0);
if (fp) { if (fp) {
@ -79,7 +95,9 @@ void *eeprom_write_function(void *)
perror("error in fseek"); perror("error in fseek");
if (fwrite(eeprom_buffer_data, 1, 1, fp) != 1) if (fwrite(eeprom_buffer_data, 1, 1, fp) != 1)
perror("error in fwrite"); perror("error in fwrite");
#if !defined(PCBARM)
sleep(5/*ms*/); sleep(5/*ms*/);
#endif
} }
else { else {
memcpy(&eeprom[eeprom_pointer], eeprom_buffer_data, 1); memcpy(&eeprom[eeprom_pointer], eeprom_buffer_data, 1);
@ -91,6 +109,10 @@ void *eeprom_write_function(void *)
fflush(fp); fflush(fp);
} }
} }
#if defined(PCBARM)
}
Spi_complete = 1;
#endif
} }
return 0; return 0;
@ -109,13 +131,19 @@ void *main_thread(void *)
g_menuStack[0] = menuMainView; g_menuStack[0] = menuMainView;
g_menuStack[1] = menuProcModelSelect; g_menuStack[1] = menuProcModelSelect;
#ifdef PCBARM
eeprom_init();
#endif
eeReadAll(); //load general setup and selected model eeReadAll(); //load general setup and selected model
if (main_thread_running == 1) { if (main_thread_running == 1) {
#ifdef SPLASH #ifdef SPLASH
doSplash(); doSplash();
#endif #endif
#if !defined(PCBARM)
checkLowEEPROM(); checkLowEEPROM();
#endif
checkTHR(); checkTHR();
checkSwitches(); checkSwitches();
checkAlarm(); checkAlarm();

27
src/simpgmspace.h
View file

@ -95,6 +95,24 @@ typedef const int16_t pm_int16_t;
typedef const int8_t pm_int8_t; typedef const int8_t pm_int8_t;
extern sem_t eeprom_write_sem; extern sem_t eeprom_write_sem;
#if defined(PCBARM)
extern Pio Pioa, Piob, Pioc;
#undef PIOA
#define PIOA (&Pioa)
#undef PIOB
#define PIOB (&Piob)
#undef PIOC
#define PIOC (&Pioc)
extern uint32_t eeprom_pointer;
extern char* eeprom_buffer_data;
extern volatile int32_t eeprom_buffer_size;
extern bool eeprom_read_operation;
extern volatile uint32_t Spi_complete;
#else
#define PIOA 0
#define PIOB 0
#define PIOC 0
#endif
#define loop_until_bit_is_set( port, bitnum) \ #define loop_until_bit_is_set( port, bitnum) \
while ( 0/*! ( (port) & (1 << (bitnum)) )*/ ) ; while ( 0/*! ( (port) & (1 << (bitnum)) )*/ ) ;
@ -218,6 +236,15 @@ extern sem_t eeprom_write_sem;
#define WGM12 0 #define WGM12 0
#define CS10 0 #define CS10 0
#if defined(PCBARM)
extern volatile uint32_t Tenms;
extern uint32_t Master_frequency;
#define NVIC_EnableIRQ(x)
#define NVIC_DisableIRQ(x)
#define __disable_irq()
#define __enable_irq()
#endif
extern volatile unsigned char pinb,pinc,pind,pine,ping,pinh,pinj,pinl; extern volatile unsigned char pinb,pinc,pind,pine,ping,pinh,pinj,pinl;
extern uint8_t portb, portc, porth, dummyport; extern uint8_t portb, portc, porth, dummyport;
extern uint16_t dummyport16; extern uint16_t dummyport16;

33
src/simu.cpp
View file

@ -35,7 +35,6 @@
#include "FXExpression.h" #include "FXExpression.h"
#include "FXPNGImage.h" #include "FXPNGImage.h"
#include <unistd.h> #include <unistd.h>
#include "simpgmspace.h"
#include "fxkeys.h" #include "fxkeys.h"
#include "open9x.h" #include "open9x.h"
#include "menus.h" #include "menus.h"
@ -273,25 +272,33 @@ void Open9xSim::refreshDiplay()
} }
if(hasFocus()) { if(hasFocus()) {
static FXuint keys1[]={ static uint64_t keys1[]={
KEY_Return, INP_B_KEY_MEN, INP_P_KEY_MEN, KEY_Return, INP_B_KEY_MEN, INP_P_KEY_MEN, (uint64_t)PIOB, 0x40,
KEY_Page_Up, INP_B_KEY_MEN, INP_P_KEY_MEN, KEY_Page_Up, INP_B_KEY_MEN, INP_P_KEY_MEN, (uint64_t)PIOB, 0x40,
KEY_KP_1, INP_B_KEY_MEN, INP_P_KEY_MEN, KEY_KP_1, INP_B_KEY_MEN, INP_P_KEY_MEN, (uint64_t)PIOB, 0x40,
KEY_Page_Down, INP_B_KEY_EXT, INP_P_KEY_EXT, KEY_Page_Down, INP_B_KEY_EXT, INP_P_KEY_EXT, (uint64_t)PIOA, 0x80000000,
KEY_BackSpace, INP_B_KEY_EXT, INP_P_KEY_EXT, KEY_BackSpace, INP_B_KEY_EXT, INP_P_KEY_EXT, (uint64_t)PIOA, 0x80000000,
KEY_KP_0, INP_B_KEY_EXT, INP_P_KEY_EXT, KEY_KP_0, INP_B_KEY_EXT, INP_P_KEY_EXT, (uint64_t)PIOA, 0x80000000,
KEY_Down, INP_B_KEY_DWN, INP_P_KEY_DWN, KEY_Down, INP_B_KEY_DWN, INP_P_KEY_DWN, (uint64_t)PIOC, 0x10 >> 1,
KEY_Up, INP_B_KEY_UP, INP_P_KEY_UP, KEY_Up, INP_B_KEY_UP, INP_P_KEY_UP, (uint64_t)PIOC, 0x08 >> 1,
KEY_Right, INP_B_KEY_RGT, INP_P_KEY_RGT, KEY_Right, INP_B_KEY_RGT, INP_P_KEY_RGT, (uint64_t)PIOC, 0x20 >> 1,
KEY_Left, INP_B_KEY_LFT, INP_P_KEY_LFT KEY_Left, INP_B_KEY_LFT, INP_P_KEY_LFT, (uint64_t)PIOC, 0x40 >> 1,
}; };
pinb &= ~ 0x7e; pinb &= ~ 0x7e;
pinl &= ~ 0x3f; // for v4 pinl &= ~ 0x3f; // for v4
for(unsigned i=0; i<DIM(keys1);i+=3) { #if defined(PCBARM)
PIOC->PIO_PDSR = 0xFFFFFFFF;
PIOB->PIO_PDSR = 0xFFFFFFFF;
PIOA->PIO_PDSR = 0xFFFFFFFF;
#endif
for(unsigned i=0; i<DIM(keys1);i+=5) {
if (getApp()->getKeyState(keys1[i])) { if (getApp()->getKeyState(keys1[i])) {
pinb |= (1<<keys1[i+1]); pinb |= (1<<keys1[i+1]);
pinl |= (1<<keys1[i+2]); pinl |= (1<<keys1[i+2]);
#if defined(PCBARM)
((Pio*)keys1[i+3])->PIO_PDSR &= ~(keys1[i+4]);
#endif
} }
} }