mirror of
https://github.com/opentx/opentx.git
synced 2025-07-21 15:25:17 +03:00
EEPROM Swap / Copy / Delete model now Ok on ErSky9x
Simu target on ARM now ok
This commit is contained in:
bsongis
parent
0cf23e266d
commit
6113420a02
11 changed files with 331 additions and 244 deletions
25
src/Makefile
25
src/Makefile
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@ -112,23 +112,17 @@ REV = $(shell sh -c "svnversion | egrep -o '[[:digit:]]+[[:alpha:]]*$$'")
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# MCU name
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ifeq ($(PCB), STD)
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TRGT = avr-
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MCU = atmega64
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BOARDSRC = board_stock.cpp
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EEPROMSRC = eeprom_avr.cpp
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MCU = atmega64
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CPPDEFS = -DF_CPU=$(F_CPU)UL
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endif
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ifeq ($(PCB), V4)
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TRGT = avr-
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MCU = atmega2560
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BOARDSRC = board_gruvin9x.cpp
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EEPROMSRC = eeprom_avr.cpp
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CPPDEFS = -DF_CPU=$(F_CPU)UL
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endif
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ifeq ($(PCB), ARM)
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TRGT = arm-none-eabi-
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MCU = cortex-m3
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BOARDSRC = board_ersky9x.cpp
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EEPROMSRC = eeprom_arm.cpp
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CPPDEFS =
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endif
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@ -256,10 +250,9 @@ ifeq ($(PCB), ARM)
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OPT = 2
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CPPDEFS += -DPCBARM
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EXTRAINCDIRS += ersky9x
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CPPSRC += ersky9x/core_cm3.c
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CPPSRC += ersky9x/board_lowlevel.c
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CPPSRC += ersky9x/crt.c
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CPPSRC += ersky9x/vectors_sam3s.c
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BOARDSRC = board_ersky9x.cpp
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EXTRABOARDSRC = ersky9x/core_cm3.c ersky9x/board_lowlevel.c ersky9x/crt.c ersky9x/vectors_sam3s.c
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EEPROMSRC = eeprom_arm.cpp
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CPPSRC += ersky9x/sound.cpp
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CPPSRC += beeper.cpp
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endif
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@ -269,6 +262,8 @@ ifeq ($(PCB), V4)
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OPT = 2
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CPPDEFS += -DPCBV4 -DAUDIO
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EXTRAINCDIRS += gruvin9x
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BOARDSRC += board_gruvin9x.cpp
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EEPROMSRC = eeprom_avr.cpp
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CPPSRC += audio.cpp
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CPPSRC += gruvin9x/gtime.cpp
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CPPSRC += gruvin9x/rtc.cpp
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@ -296,6 +291,8 @@ ifeq ($(PCB), STD)
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# STD PCB, so ...
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OPT = s
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CPPDEFS += -DPCBSTD
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BOARDSRC = board_stock.cpp
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EEPROMSRC = eeprom_avr.cpp
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ifeq ($(AUDIO), YES)
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CPPDEFS += -DAUDIO
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@ -511,7 +508,7 @@ FOXLIB=-L/usr/local/lib \
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-Wl,-rpath,$(FOXPATH)/src/.libs
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simu: $(BOARDSRC) $(CPPSRC) Makefile simu.cpp simpgmspace.cpp *.h *.lbm eeprom.bin
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g++ simu.cpp $(BOARDSRC) $(CPPFLAGS) $(CPPSRC) simpgmspace.cpp $(ARCH) -MD -DSIMU -o simu $(FOXINC) $(FOXLIB) -pthread
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g++ simu.cpp $(CPPFLAGS) $(BOARDSRC) $(CPPSRC) simpgmspace.cpp $(ARCH) -MD -DSIMU -o simu $(FOXINC) $(FOXLIB) -pthread
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eeprom.bin:
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dd if=/dev/zero of=$@ bs=1 count=2048
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@ -554,9 +551,9 @@ endif
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$(OBJDUMP) -h -S $< > $@
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# Concatenate all sources files in one big file to optimize size
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allsrc.cpp: $(BOARDSRC) $(CPPSRC)
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allsrc.cpp: $(BOARDSRC) $(CPPSRC) $(EXTRABOARDSRC)
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@echo -n > allsrc.cpp
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for f in $(BOARDSRC) $(CPPSRC); do echo "# 1 \"$$f\"" >> allsrc.cpp; cat "$$f" >> allsrc.cpp; done
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for f in $(BOARDSRC) $(CPPSRC) $(EXTRABOARDSRC) ; do echo "# 1 \"$$f\"" >> allsrc.cpp; cat "$$f" >> allsrc.cpp; done
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remallsrc:
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$(REMOVE) allsrc.cpp
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@ -32,10 +32,9 @@
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*/
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#include "open9x.h"
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#include "AT91SAM3S2.h"
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#include "core_cm3.h"
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uint32_t Master_frequency ;
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volatile uint32_t Tenms ;
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/** Console baudrate 9600. */
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#define CONSOLE_BAUDRATE 9600
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@ -156,6 +155,8 @@ inline void setup_switches()
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#endif
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}
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#ifndef SIMU
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/**
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* Configures a UART peripheral with the specified parameters.
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*
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@ -316,9 +317,6 @@ inline void start_timer0()
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ptc->TC_CHANNEL[0].TC_CCR = 5 ; // Enable clock and trigger it (may only need trigger)
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}
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// TODO where used
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volatile uint32_t Tenms ;
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extern "C" void TC2_IRQHandler()
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{
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register uint32_t dummy;
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@ -327,7 +325,7 @@ extern "C" void TC2_IRQHandler()
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/* Clear status bit to acknowledge interrupt */
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dummy = TC0->TC_CHANNEL[2].TC_SR;
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(void) dummy ; // Discard value - prevents compiler warning
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Tenms |= 1 ; // 10 mS has passed
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/* TODO if ( Buzzer_count )
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{
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if ( --Buzzer_count == 0 )
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@ -585,9 +583,12 @@ void board_init()
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eeprom_init();
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}
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#endif
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uint16_t getTmr2MHz()
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{
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return TC1->TC_CHANNEL[0].TC_CV ;
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return TC1->TC_CHANNEL[0].TC_CV ;
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}
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// keys:
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@ -601,130 +602,124 @@ uint16_t getTmr2MHz()
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// LCD pins 5 DOWN, 4 RIGHT, 3 LEFT, 1 UP
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uint32_t read_keys()
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{
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register uint32_t x ;
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register uint32_t y ;
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register uint32_t x;
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register uint32_t y;
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x = PIOC->PIO_PDSR << 1; // 6 LEFT, 5 RIGHT, 4 DOWN, 3 UP ()
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x = PIOC->PIO_PDSR << 1 ; // 6 LEFT, 5 RIGHT, 4 DOWN, 3 UP ()
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#ifdef REVB
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y = x & 0x00000020 ; // RIGHT
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if ( x & 0x00000004 )
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{
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y |= 0x00000010 ; // UP
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}
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if ( x & 0x00000010 )
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{
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y |= 0x00000040 ; // LEFT
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}
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if ( x & 0x00000040 )
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{
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y |= 0x00000008 ; // DOWN
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}
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y = x & 0x00000020; // RIGHT
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if ( x & 0x00000004 )
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{
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y |= 0x00000010; // UP
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}
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if ( x & 0x00000010 )
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{
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y |= 0x00000040; // LEFT
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}
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if ( x & 0x00000040 )
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{
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y |= 0x00000008; // DOWN
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}
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#else
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y = x & 0x00000060 ;
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if ( x & 0x00000008 )
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{
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y |= 0x00000010 ;
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}
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if ( x & 0x00000010 )
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{
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y |= 0x00000008 ;
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}
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y = x & 0x00000060;
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if (x & 0x00000008) {
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y |= 0x00000010;
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}
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if (x & 0x00000010) {
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y |= 0x00000008;
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}
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#endif
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#ifdef REVB
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if ( PIOC->PIO_PDSR & 0x01000000 )
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if ( PIOC->PIO_PDSR & 0x01000000 )
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#else
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if ( PIOA->PIO_PDSR & 0x80000000 )
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if (PIOA->PIO_PDSR & 0x80000000)
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#endif
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{
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y |= 4 ; // EXIT
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}
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{
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y |= 4; // EXIT
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}
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#ifdef REVB
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if ( PIOB->PIO_PDSR & 0x000000020 )
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if ( PIOB->PIO_PDSR & 0x000000020 )
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#else
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if ( PIOB->PIO_PDSR & 0x000000040 )
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if (PIOB->PIO_PDSR & 0x000000040)
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#endif
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{
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y |= 2 ; // MENU
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}
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return y ;
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{
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y |= 2; // MENU
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}
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return y ;
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}
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uint32_t read_trims()
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{
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uint32_t trims ;
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trims = 0 ;
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uint32_t trims = 0;
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// TRIM_LH_DOWN PA7 (PA23)
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#ifdef REVB
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if ( ( PIOA->PIO_PDSR & 0x00800000 ) == 0 )
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if ( ( PIOA->PIO_PDSR & 0x00800000 ) == 0 )
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#else
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if ( ( PIOA->PIO_PDSR & 0x0080 ) == 0 )
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if ((PIOA->PIO_PDSR & 0x0080) == 0)
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#endif
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{
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trims |= 1 ;
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}
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{
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trims |= 1;
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}
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// TRIM_LH_UP PB4
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if ( ( PIOB->PIO_PDSR & 0x10 ) == 0 )
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{
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trims |= 2 ;
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}
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if ((PIOB->PIO_PDSR & 0x10) == 0) {
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trims |= 2;
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}
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// TRIM_LV_DOWN PA27 (PA24)
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#ifdef REVB
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if ( ( PIOA->PIO_PDSR & 0x01000000 ) == 0 )
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if ( ( PIOA->PIO_PDSR & 0x01000000 ) == 0 )
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#else
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if ( ( PIOA->PIO_PDSR & 0x08000000 ) == 0 )
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if ((PIOA->PIO_PDSR & 0x08000000) == 0)
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#endif
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{
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trims |= 4 ;
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}
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{
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trims |= 4;
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}
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// TRIM_LV_UP PC28
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if ( ( PIOC->PIO_PDSR & 0x10000000 ) == 0 )
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{
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trims |= 8 ;
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}
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if ((PIOC->PIO_PDSR & 0x10000000) == 0) {
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trims |= 8;
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}
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// TRIM_RV_DOWN PC10
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if ( ( PIOC->PIO_PDSR & 0x00000400 ) == 0 )
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{
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trims |= 0x10 ;
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}
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if ((PIOC->PIO_PDSR & 0x00000400) == 0) {
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trims |= 0x10;
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}
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// TRIM_RV_UP PA30 (PA1)
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#ifdef REVB
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if ( ( PIOA->PIO_PDSR & 0x00000002 ) == 0 )
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if ( ( PIOA->PIO_PDSR & 0x00000002 ) == 0 )
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#else
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if ( ( PIOA->PIO_PDSR & 0x40000000 ) == 0 )
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if ((PIOA->PIO_PDSR & 0x40000000) == 0)
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#endif
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{
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trims |= 0x20 ;
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}
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{
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trims |= 0x20;
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}
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// TRIM_RH_DOWN PA29 (PA0)
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#ifdef REVB
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if ( ( PIOA->PIO_PDSR & 0x00000001 ) == 0 )
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if ( ( PIOA->PIO_PDSR & 0x00000001 ) == 0 )
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#else
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if ( ( PIOA->PIO_PDSR & 0x20000000 ) == 0 )
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if ((PIOA->PIO_PDSR & 0x20000000) == 0)
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#endif
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{
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trims |= 0x40 ;
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}
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{
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trims |= 0x40;
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}
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// TRIM_RH_UP PC9
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if ( ( PIOC->PIO_PDSR & 0x00000200 ) == 0 )
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{
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trims |= 0x80 ;
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}
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if ((PIOC->PIO_PDSR & 0x00000200) == 0) {
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trims |= 0x80;
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}
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return trims ;
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return trims ;
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}
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uint8_t keyDown()
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{
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return ~read_keys() & 0x7E ;
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@ -732,53 +727,63 @@ uint8_t keyDown()
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extern uint32_t keyState(EnumKeys enuk)
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{
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CPU_UINT xxx = 0 ;
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if(enuk < (int)DIM(keys)) return keys[enuk].state() ? 1 : 0;
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CPU_UINT xxx = 0;
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switch((uint8_t)enuk)
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{
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if (enuk < (int) DIM(keys)) return keys[enuk].state() ? 1 : 0;
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switch ((uint8_t) enuk) {
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#ifdef REVB
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case SW_ElevDR : xxx = PIOC->PIO_PDSR & 0x80000000 ; // ELE_DR PC31
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case SW_ElevDR : xxx = PIOC->PIO_PDSR & 0x80000000; // ELE_DR PC31
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#else
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case SW_ElevDR : xxx = PIOA->PIO_PDSR & 0x00000100 ; // ELE_DR PA8
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case SW_ElevDR:
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xxx = PIOA->PIO_PDSR & 0x00000100; // ELE_DR PA8
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#endif
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break ;
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break;
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case SW_AileDR : xxx = PIOA->PIO_PDSR & 0x00000004 ; // AIL-DR PA2
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break ;
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case SW_AileDR:
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xxx = PIOA->PIO_PDSR & 0x00000004; // AIL-DR PA2
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break;
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case SW_RuddDR : xxx = PIOA->PIO_PDSR & 0x00008000 ; // RUN_DR PA15
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break ;
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case SW_RuddDR:
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xxx = PIOA->PIO_PDSR & 0x00008000; // RUN_DR PA15
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break;
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// INP_G_ID1 INP_E_ID2
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// id0 0 1
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// id1 1 1
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// id2 1 0
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case SW_ID0 : xxx = ~PIOC->PIO_PDSR & 0x00004000 ; // SW_IDL1 PC14
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break ;
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case SW_ID1 : xxx = (PIOC->PIO_PDSR & 0x00004000) ; if ( xxx ) xxx = (PIOC->PIO_PDSR & 0x00000800);
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break ;
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case SW_ID2 : xxx = ~PIOC->PIO_PDSR & 0x00000800 ; // SW_IDL2 PC11
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break ;
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case SW_ID0:
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xxx = ~PIOC->PIO_PDSR & 0x00004000; // SW_IDL1 PC14
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break;
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case SW_ID1:
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xxx = (PIOC->PIO_PDSR & 0x00004000);
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if (xxx) xxx = (PIOC->PIO_PDSR & 0x00000800);
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break;
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case SW_ID2:
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xxx = ~PIOC->PIO_PDSR & 0x00000800; // SW_IDL2 PC11
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break;
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case SW_Gear : xxx = PIOC->PIO_PDSR & 0x00010000 ; // SW_GEAR PC16
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break ;
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case SW_Gear:
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xxx = PIOC->PIO_PDSR & 0x00010000; // SW_GEAR PC16
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break;
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#ifdef REVB
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case SW_ThrCt : xxx = PIOC->PIO_PDSR & 0x00100000 ; // SW_TCUT PC20
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case SW_ThrCt : xxx = PIOC->PIO_PDSR & 0x00100000; // SW_TCUT PC20
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#else
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case SW_ThrCt : xxx = PIOA->PIO_PDSR & 0x10000000 ; // SW_TCUT PA28
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case SW_ThrCt:
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xxx = PIOA->PIO_PDSR & 0x10000000; // SW_TCUT PA28
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#endif
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break ;
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break;
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case SW_Trainer: xxx = PIOC->PIO_PDSR & 0x00000100 ; // SW-TRAIN PC8
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break ;
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default:;
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case SW_Trainer:
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xxx = PIOC->PIO_PDSR & 0x00000100; // SW-TRAIN PC8
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break;
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default:
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break;
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}
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if ( xxx )
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{
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return 1 ;
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if (xxx) {
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return 1;
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}
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return 0;
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}
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@ -827,25 +832,22 @@ void read_9_adc()
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void readKeysAndTrims()
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{
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register uint32_t i ;
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register uint32_t i;
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if ( PIOC->PIO_ODSR & 0x00080000 )
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{
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PIOC->PIO_CODR = 0x00200000L ; // Set bit C19 OFF
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}
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else
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{
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PIOC->PIO_SODR = 0x00200000L ; // Set bit C19 ON
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}
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if (PIOC->PIO_ODSR & 0x00080000) {
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PIOC->PIO_CODR = 0x00200000L; // Set bit C19 OFF
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}
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else {
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PIOC->PIO_SODR = 0x00200000L; // Set bit C19 ON
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}
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uint8_t enuk = KEY_MENU;
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uint8_t in = ~read_keys() ;
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for( i=1; i<7; i++)
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{
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uint8_t enuk = KEY_MENU;
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uint8_t in = ~read_keys();
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for (i = 1; i < 7; i++) {
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//INP_B_KEY_MEN 1 .. INP_B_KEY_LFT 6
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keys[enuk].input(in & (1<<i),(EnumKeys)enuk);
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++enuk;
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}
|
||||
keys[enuk].input(in & (1 << i), (EnumKeys) enuk);
|
||||
++enuk;
|
||||
}
|
||||
// static const uint8_t crossTrim[]={
|
||||
// 1<<INP_D_TRM_LH_DWN,
|
||||
// 1<<INP_D_TRM_LH_UP,
|
||||
|
|
@ -856,14 +858,13 @@ keys[enuk].input(in & (1<<i),(EnumKeys)enuk);
|
|||
// 1<<INP_D_TRM_RH_DWN,
|
||||
// 1<<INP_D_TRM_RH_UP
|
||||
// };
|
||||
in = read_trims() ;
|
||||
in = read_trims();
|
||||
|
||||
for( i=1; i<256; i<<=1)
|
||||
{
|
||||
for (i = 1; i < 256; i <<= 1) {
|
||||
// INP_D_TRM_RH_UP 0 .. INP_D_TRM_LH_UP 7
|
||||
keys[enuk].input(in & i,(EnumKeys)enuk);
|
||||
++enuk;
|
||||
}
|
||||
keys[enuk].input(in & i, (EnumKeys) enuk);
|
||||
++enuk;
|
||||
}
|
||||
}
|
||||
|
||||
void end_ppm_capture()
|
||||
|
|
@ -871,3 +872,4 @@ void end_ppm_capture()
|
|||
TC1->TC_CHANNEL[0].TC_IDR = TC_IDR0_LDRAS ;
|
||||
NVIC_DisableIRQ(TC3_IRQn) ;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -137,6 +137,10 @@ void per10ms()
|
|||
g_tmr10ms++;
|
||||
g_blinkTmr10ms++;
|
||||
|
||||
#if defined (PCBARM)
|
||||
Tenms |= 1 ; // 10 mS has passed
|
||||
#endif
|
||||
|
||||
#if defined (PCBV4)
|
||||
/* Update gloabal Date/Time every 100 per10ms cycles */
|
||||
if (++g_ms100 == 100)
|
||||
|
|
|
|||
|
|
@ -87,6 +87,7 @@ uint32_t Update_timer ;
|
|||
//#define E_WRITEWAITING 5
|
||||
//#define E_32ACTIVE 6
|
||||
|
||||
// TODO use these constants everywhere
|
||||
#define EE_WAIT 0
|
||||
#define EE_NO_WAIT 1
|
||||
|
||||
|
|
@ -101,8 +102,8 @@ void eeDirty(uint8_t msk)
|
|||
void handle_serial( void ) ;
|
||||
|
||||
uint32_t get_current_block_number( uint32_t block_no, uint16_t *p_size, uint32_t *p_seq ) ;
|
||||
uint32_t read32_eeprom_data( uint32_t eeAddress, register uint8_t *buffer, uint32_t size, uint32_t immediate ) ;
|
||||
uint32_t write32_eeprom_block( uint32_t eeAddress, register uint8_t *buffer, uint32_t size, uint32_t immediate ) ;
|
||||
void read32_eeprom_data( uint32_t eeAddress, register uint8_t *buffer, uint32_t size, uint32_t immediate ) ;
|
||||
void write32_eeprom_block( uint32_t eeAddress, register uint8_t *buffer, uint32_t size, uint32_t immediate ) ;
|
||||
void ee32_read_model_names( void ) ;
|
||||
void ee32LoadModelName(uint8_t id, char *buf, uint8_t len) ;
|
||||
|
||||
|
|
@ -177,23 +178,25 @@ void eeSwapModels(uint8_t id1, uint8_t id2)
|
|||
{
|
||||
// eeCheck(true) should have been called before entering here
|
||||
|
||||
uint16_t id1_size = File_system[id1+1].size;
|
||||
uint32_t id1_block_no = File_system[id1+1].block_no;
|
||||
uint16_t id2_size = File_system[id2+1].size;
|
||||
uint32_t id2_block_no = File_system[id2+1].block_no;
|
||||
|
||||
eeCopyModel(id1, id2);
|
||||
eeCopyModel(id2, id1);
|
||||
|
||||
// block_no(id1) has been shifted now, but we have the size
|
||||
read32_eeprom_data( (id1_block_no << 12) + sizeof( struct t_eeprom_header), ( uint8_t *)&Eeprom_buffer.data.model_data, id1_size, 0 ) ;
|
||||
|
||||
// TODO flash saving with function above ...
|
||||
if (id1_size > sizeof(g_model.name))
|
||||
memcpy(ModelNames[id2], Eeprom_buffer.data.model_data.name, sizeof(g_model.name));
|
||||
else
|
||||
memset(ModelNames[id2], 0, sizeof(g_model.name));
|
||||
if (id2_size > sizeof(g_model.name)) {
|
||||
read32_eeprom_data( (id2_block_no << 12) + sizeof( struct t_eeprom_header), ( uint8_t *)&Eeprom_buffer.data.model_data, id2_size, 0 );
|
||||
memcpy(ModelNames[id1], Eeprom_buffer.data.model_data.name, sizeof(g_model.name));
|
||||
}
|
||||
else {
|
||||
memset(ModelNames[id1], 0, sizeof(g_model.name));
|
||||
}
|
||||
|
||||
Eeprom32_source_address = (uint8_t *)&Eeprom_buffer.data.model_data; // Get data from here
|
||||
Eeprom32_data_size = id1_size ; // This much
|
||||
Eeprom32_file_index = id2 + 1 ; // This file system entry
|
||||
Eeprom32_data_size = id2_size ; // This much
|
||||
Eeprom32_file_index = id1 + 1 ; // This file system entry
|
||||
Eeprom32_process_state = E32_BLANKCHECK ;
|
||||
eeWaitFinished();
|
||||
}
|
||||
|
|
@ -254,6 +257,7 @@ uint32_t spi_PDC_action( register uint8_t *command, register uint8_t *tx, regist
|
|||
|
||||
uint32_t eeprom_write_one( uint8_t byte, uint8_t count )
|
||||
{
|
||||
#ifndef SIMU
|
||||
register Spi *spiptr;
|
||||
register uint32_t result;
|
||||
|
||||
|
|
@ -285,6 +289,9 @@ uint32_t eeprom_write_one( uint8_t byte, uint8_t count )
|
|||
}
|
||||
spiptr->SPI_CR = 2; // Disable
|
||||
return spiptr->SPI_RDR ;
|
||||
#else
|
||||
return !Spi_complete;
|
||||
#endif
|
||||
}
|
||||
|
||||
void eeprom_write_enable()
|
||||
|
|
@ -298,56 +305,56 @@ uint32_t eeprom_read_status()
|
|||
}
|
||||
|
||||
// Read eeprom data starting at random address
|
||||
uint32_t read32_eeprom_data( uint32_t eeAddress, register uint8_t *buffer, uint32_t size, uint32_t immediate )
|
||||
void read32_eeprom_data( uint32_t eeAddress, register uint8_t *buffer, uint32_t size, uint32_t immediate )
|
||||
{
|
||||
register uint8_t *p ;
|
||||
register uint32_t x ;
|
||||
|
||||
p = Spi_tx_buf ;
|
||||
#ifdef SIMU
|
||||
assert(size);
|
||||
eeprom_pointer = eeAddress;
|
||||
eeprom_buffer_data = (char*)buffer;
|
||||
eeprom_buffer_size = size;
|
||||
eeprom_read_operation = true;
|
||||
Spi_complete = false;
|
||||
sem_post(&eeprom_write_sem);
|
||||
#else
|
||||
register uint8_t *p = Spi_tx_buf ;
|
||||
*p = 3 ; // Read command
|
||||
*(p+1) = eeAddress >> 16 ;
|
||||
*(p+2) = eeAddress >> 8 ;
|
||||
*(p+3) = eeAddress ; // 3 bytes address
|
||||
spi_PDC_action( p, 0, buffer, 4, size ) ;
|
||||
#endif
|
||||
|
||||
if ( immediate )
|
||||
{
|
||||
return 0 ;
|
||||
}
|
||||
for ( x = 0 ; x < 100000 ; x += 1 )
|
||||
{
|
||||
// TODO while + ERROR_TIMEOUT
|
||||
if ( Spi_complete )
|
||||
{
|
||||
break ;
|
||||
}
|
||||
}
|
||||
return x ;
|
||||
if (immediate )
|
||||
return ;
|
||||
|
||||
while (!Spi_complete) ;
|
||||
}
|
||||
|
||||
uint32_t write32_eeprom_block( uint32_t eeAddress, register uint8_t *buffer, uint32_t size, uint32_t immediate )
|
||||
void write32_eeprom_block( uint32_t eeAddress, register uint8_t *buffer, uint32_t size, uint32_t immediate )
|
||||
{
|
||||
register uint8_t *p;
|
||||
register uint32_t x;
|
||||
|
||||
#ifdef SIMU
|
||||
assert(size);
|
||||
eeprom_pointer = eeAddress;
|
||||
eeprom_buffer_data = (char*)buffer;
|
||||
eeprom_buffer_size = size+1;
|
||||
eeprom_read_operation = false;
|
||||
Spi_complete = false;
|
||||
sem_post(&eeprom_write_sem);
|
||||
#else
|
||||
eeprom_write_enable();
|
||||
|
||||
p = Spi_tx_buf;
|
||||
register uint8_t *p = Spi_tx_buf;
|
||||
*p = 2; // Write command
|
||||
*(p + 1) = eeAddress >> 16;
|
||||
*(p + 2) = eeAddress >> 8;
|
||||
*(p + 3) = eeAddress; // 3 bytes address
|
||||
spi_PDC_action(p, buffer, 0, 4, size);
|
||||
#endif
|
||||
|
||||
if (immediate) {
|
||||
return 0;
|
||||
}
|
||||
for (x = 0; x < 100000; x += 1) {
|
||||
if (Spi_complete) {
|
||||
break;
|
||||
}
|
||||
}
|
||||
return x ;
|
||||
if (immediate)
|
||||
return;
|
||||
|
||||
while (!Spi_complete) ;
|
||||
}
|
||||
|
||||
uint8_t byte_checksum( uint8_t *p, uint32_t size )
|
||||
|
|
@ -453,22 +460,22 @@ bool ee32LoadGeneral()
|
|||
|
||||
memset(&g_eeGeneral, 0, sizeof(EEGeneral));
|
||||
|
||||
if ( size > sizeof(EEGeneral) ) {
|
||||
if (size > sizeof(EEGeneral)) {
|
||||
size = sizeof(EEGeneral) ;
|
||||
}
|
||||
|
||||
if ( size ) {
|
||||
if (size) {
|
||||
read32_eeprom_data( ( File_system[0].block_no << 12) + sizeof( struct t_eeprom_header), ( uint8_t *)&g_eeGeneral, size, 0 ) ;
|
||||
}
|
||||
|
||||
/*if(g_eeGeneral.myVers<MDVERS)
|
||||
sysFlags |= sysFLAG_OLD_EEPROM; // if old EEPROM - Raise flag
|
||||
*/
|
||||
g_eeGeneral.myVers = EEPROM_VER;
|
||||
if (g_eeGeneral.myVers == EEPROM_VER) {
|
||||
uint16_t sum = evalChkSum();
|
||||
if (g_eeGeneral.chkSum == sum) {
|
||||
return true;
|
||||
}
|
||||
}
|
||||
|
||||
uint16_t sum=0;
|
||||
if(size>(sizeof(EEGeneral)-20)) for(uint8_t i=0; i<12;i++) sum+=g_eeGeneral.calibMid[i];
|
||||
return g_eeGeneral.chkSum == sum;
|
||||
return false;
|
||||
}
|
||||
|
||||
void eeLoadModel(uint8_t id)
|
||||
|
|
@ -640,6 +647,7 @@ void init_spi()
|
|||
spi_operation( p, spi_buf, 2 ) ;
|
||||
}
|
||||
|
||||
#ifndef SIMU
|
||||
extern "C" void SPI_IRQHandler()
|
||||
{
|
||||
register Spi *spiptr ;
|
||||
|
|
@ -655,6 +663,7 @@ extern "C" void SPI_IRQHandler()
|
|||
// Power save
|
||||
// PMC->PMC_PCER0 &= ~0x00200000L ; // Disable peripheral clock to SPI
|
||||
}
|
||||
#endif
|
||||
|
||||
void end_spi()
|
||||
{
|
||||
|
|
@ -747,6 +756,9 @@ void ee32_process()
|
|||
else
|
||||
{
|
||||
#endif
|
||||
#ifdef SIMU
|
||||
Eeprom32_process_state = E32_WRITESTART ;
|
||||
#else
|
||||
eeAddress = Eeprom32_address ;
|
||||
eeprom_write_enable() ;
|
||||
p = Spi_tx_buf ;
|
||||
|
|
@ -757,6 +769,7 @@ void ee32_process()
|
|||
spi_PDC_action( p, 0, 0, 4, 0 ) ;
|
||||
Eeprom32_process_state = E32_ERASESENDING ;
|
||||
Eeprom32_state_after_erase = E32_WRITESTART ;
|
||||
#endif
|
||||
// }
|
||||
// }
|
||||
}
|
||||
|
|
@ -772,10 +785,8 @@ void ee32_process()
|
|||
*q++ = *p++; // Copy the data to temp buffer
|
||||
}
|
||||
}
|
||||
Eeprom_buffer.header.sequence_no =
|
||||
++File_system[Eeprom32_file_index].sequence_no;
|
||||
File_system[Eeprom32_file_index].size = Eeprom_buffer.header.data_size =
|
||||
Eeprom32_data_size;
|
||||
Eeprom_buffer.header.sequence_no = ++File_system[Eeprom32_file_index].sequence_no;
|
||||
File_system[Eeprom32_file_index].size = Eeprom_buffer.header.data_size = Eeprom32_data_size;
|
||||
Eeprom_buffer.header.flags = 0;
|
||||
Eeprom_buffer.header.hcsum = byte_checksum((uint8_t *) &Eeprom_buffer, 7);
|
||||
total_size = Eeprom32_data_size + sizeof(struct t_eeprom_header);
|
||||
|
|
@ -820,9 +831,10 @@ void ee32_process()
|
|||
}
|
||||
else
|
||||
{
|
||||
File_system[Eeprom32_file_index].block_no ^= 1 ; // This is now the current block
|
||||
#if 0
|
||||
// now erase the other block
|
||||
File_system[Eeprom32_file_index].block_no ^= 1 ; // This is now the current block
|
||||
File_system[Eeprom32_file_index].block_no ^= 1 ; // This is now the current block
|
||||
eeAddress = Eeprom32_address ^ 0x00001000 ; // Address of block to erase
|
||||
eeprom_write_enable() ;
|
||||
p = Spi_tx_buf ;
|
||||
|
|
@ -875,7 +887,9 @@ void ee32_read_model_names()
|
|||
|
||||
void eeprom_init()
|
||||
{
|
||||
#ifndef SIMU
|
||||
init_spi() ;
|
||||
#endif
|
||||
fill_file_index() ;
|
||||
Eeprom32_process_state = E32_IDLE ;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -249,7 +249,7 @@ void EeFsFormat()
|
|||
s_sync_write = false;
|
||||
}
|
||||
|
||||
bool EeFsOpen()
|
||||
bool EeFsOpen() // TODO inline?
|
||||
{
|
||||
eeprom_read_block(&eeFs,0,sizeof(eeFs));
|
||||
|
||||
|
|
|
|||
|
|
@ -32,14 +32,7 @@
|
|||
*
|
||||
****************************************************************************/
|
||||
|
||||
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
#include "AT91SAM3S2.h"
|
||||
#include "core_cm3.h"
|
||||
|
||||
#include "sound.h"
|
||||
#include "open9x.h"
|
||||
|
||||
void start_sound( void ) ;
|
||||
void buzzer_on( void ) ;
|
||||
|
|
@ -58,7 +51,7 @@ extern "C" void TWI0_IRQHandler (void) ;
|
|||
void audioDefevent( uint8_t e ) ;
|
||||
|
||||
|
||||
extern uint32_t Master_frequency ;
|
||||
extern uint32_t Master_frequency ; // TODO in a .h?
|
||||
|
||||
volatile uint32_t Tone_timer ; // Modified in interrupt routine
|
||||
volatile uint8_t Buzzer_count ;
|
||||
|
|
|
|||
22
src/lcd.cpp
22
src/lcd.cpp
|
|
@ -574,8 +574,6 @@ void putsTrimMode(uint8_t x, uint8_t y, uint8_t phase, uint8_t idx, uint8_t att)
|
|||
|
||||
#ifdef PCBARM
|
||||
|
||||
#include "AT91SAM3S2.h"
|
||||
|
||||
// LCD i/o pins
|
||||
// LCD_RES PC27
|
||||
// LCD_CS1 PC26
|
||||
|
|
@ -725,6 +723,7 @@ void lcd_init()
|
|||
|
||||
void lcdSetRefVolt(uint8_t val)
|
||||
{
|
||||
#ifndef SIMU
|
||||
register Pio *pioptr ;
|
||||
pioptr = PIOC ;
|
||||
|
||||
|
|
@ -746,8 +745,10 @@ void lcdSetRefVolt(uint8_t val)
|
|||
pioptr->PIO_PUER = 0x0000003CL ; // Set bits 2, 3, 4, 5 with pullups
|
||||
pioptr->PIO_ODSR = 0 ; // Drive D0 low
|
||||
#endif
|
||||
#endif
|
||||
}
|
||||
|
||||
#ifndef SIMU
|
||||
void refreshDisplay()
|
||||
{
|
||||
register Pio *pioptr;
|
||||
|
|
@ -827,6 +828,7 @@ void refreshDisplay()
|
|||
#endif
|
||||
pioptr->PIO_ODSR = 0 ; // Drive D0 low
|
||||
}
|
||||
#endif
|
||||
|
||||
#else
|
||||
|
||||
|
|
@ -885,12 +887,9 @@ void lcdSetRefVolt(uint8_t val)
|
|||
lcdSendCtl(val);
|
||||
}
|
||||
|
||||
#ifndef SIMU
|
||||
void refreshDisplay()
|
||||
{
|
||||
#ifdef SIMU
|
||||
memcpy(lcd_buf, displayBuf, sizeof(displayBuf));
|
||||
lcd_refresh = true;
|
||||
#else
|
||||
uint8_t *p=displayBuf;
|
||||
for(uint8_t y=0; y < 8; y++) {
|
||||
lcdSendCtl(0x04);
|
||||
|
|
@ -910,7 +909,16 @@ void refreshDisplay()
|
|||
PORTC_LCD_CTRL |= (1<<OUT_C_LCD_A0);
|
||||
PORTC_LCD_CTRL |= (1<<OUT_C_LCD_CS1);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef SIMU
|
||||
void refreshDisplay()
|
||||
{
|
||||
memcpy(lcd_buf, displayBuf, sizeof(displayBuf));
|
||||
lcd_refresh = true;
|
||||
}
|
||||
#endif
|
||||
|
||||
|
|
|
|||
11
src/open9x.h
11
src/open9x.h
|
|
@ -46,10 +46,13 @@
|
|||
#include "gruvin9x/gtime.h"
|
||||
#endif
|
||||
|
||||
#if defined(PCBARM)
|
||||
#include "ersky9x/AT91SAM3S2.h"
|
||||
#endif
|
||||
|
||||
#if defined(SIMU)
|
||||
#include "simpgmspace.h"
|
||||
#elif defined(PCBARM)
|
||||
#include "ersky9x/AT91SAM3S2.h"
|
||||
#include "ersky9x/core_cm3.h"
|
||||
typedef const unsigned char pm_uchar;
|
||||
typedef const char pm_char;
|
||||
|
|
@ -560,9 +563,13 @@ extern uint8_t s_eeDirtyMsk;
|
|||
#define STORE_GENERALVARS eeDirty(EE_GENERAL)
|
||||
|
||||
#if defined (PCBARM)
|
||||
#include "AT91SAM3S2.h"
|
||||
#ifndef SIMU
|
||||
#define BACKLIGHT_ON (PWM->PWM_CH_NUM[0].PWM_CDTY = 0/*TODO g_eeGeneral.bright*/)
|
||||
#define BACKLIGHT_OFF (PWM->PWM_CH_NUM[0].PWM_CDTY = 100)
|
||||
#else
|
||||
#define BACKLIGHT_ON
|
||||
#define BACKLIGHT_OFF
|
||||
#endif
|
||||
#ifdef REVB
|
||||
#define NUMBER_ANALOG 9
|
||||
#else
|
||||
|
|
|
|||
|
|
@ -31,11 +31,7 @@
|
|||
*
|
||||
*/
|
||||
|
||||
#include <ctype.h>
|
||||
#include "simpgmspace.h"
|
||||
#include "lcd.h"
|
||||
#include "open9x.h"
|
||||
#include "menus.h"
|
||||
|
||||
volatile uint8_t pinb=0, pinc=0xff, pind, pine=0xff, ping=0xff, pinh=0xff, pinj=0xff, pinl=0;
|
||||
uint8_t portb, portc, porth=0, dummyport;
|
||||
|
|
@ -43,8 +39,20 @@ uint16_t dummyport16;
|
|||
const char *eepromFile = NULL;
|
||||
FILE *fp = NULL;
|
||||
|
||||
#if defined(PCBARM)
|
||||
Pio Pioa;
|
||||
Pio Piob;
|
||||
Pio Pioc;
|
||||
uint32_t eeprom_pointer;
|
||||
char* eeprom_buffer_data;
|
||||
volatile int32_t eeprom_buffer_size;
|
||||
bool eeprom_read_operation;
|
||||
#define EESIZE (128*4048)
|
||||
#else
|
||||
extern uint16_t eeprom_pointer;
|
||||
extern const char* eeprom_buffer_data;
|
||||
#endif
|
||||
|
||||
uint8_t eeprom[EESIZE];
|
||||
sem_t eeprom_write_sem;
|
||||
|
||||
|
|
@ -59,6 +67,7 @@ void setSwitch(int8_t swtch)
|
|||
break;
|
||||
case DSW_ID2:
|
||||
ping &= ~(1<<INP_G_ID1); pine |= (1<<INP_E_ID2);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
|
@ -71,7 +80,14 @@ void *eeprom_write_function(void *)
|
|||
|
||||
if (!eeprom_thread_running)
|
||||
return NULL;
|
||||
|
||||
#if defined(PCBARM)
|
||||
if (eeprom_read_operation) {
|
||||
assert(eeprom_buffer_size);
|
||||
eeprom_read_block(eeprom_buffer_data, (const void *)(int64_t)eeprom_pointer, eeprom_buffer_size);
|
||||
// TODO sleep()
|
||||
}
|
||||
else {
|
||||
#endif
|
||||
while (--eeprom_buffer_size) {
|
||||
assert(eeprom_buffer_size > 0);
|
||||
if (fp) {
|
||||
|
|
@ -79,7 +95,9 @@ void *eeprom_write_function(void *)
|
|||
perror("error in fseek");
|
||||
if (fwrite(eeprom_buffer_data, 1, 1, fp) != 1)
|
||||
perror("error in fwrite");
|
||||
#if !defined(PCBARM)
|
||||
sleep(5/*ms*/);
|
||||
#endif
|
||||
}
|
||||
else {
|
||||
memcpy(&eeprom[eeprom_pointer], eeprom_buffer_data, 1);
|
||||
|
|
@ -91,6 +109,10 @@ void *eeprom_write_function(void *)
|
|||
fflush(fp);
|
||||
}
|
||||
}
|
||||
#if defined(PCBARM)
|
||||
}
|
||||
Spi_complete = 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
|
@ -109,13 +131,19 @@ void *main_thread(void *)
|
|||
g_menuStack[0] = menuMainView;
|
||||
g_menuStack[1] = menuProcModelSelect;
|
||||
|
||||
#ifdef PCBARM
|
||||
eeprom_init();
|
||||
#endif
|
||||
|
||||
eeReadAll(); //load general setup and selected model
|
||||
|
||||
if (main_thread_running == 1) {
|
||||
#ifdef SPLASH
|
||||
doSplash();
|
||||
#endif
|
||||
#if !defined(PCBARM)
|
||||
checkLowEEPROM();
|
||||
#endif
|
||||
checkTHR();
|
||||
checkSwitches();
|
||||
checkAlarm();
|
||||
|
|
|
|||
|
|
@ -95,6 +95,24 @@ typedef const int16_t pm_int16_t;
|
|||
typedef const int8_t pm_int8_t;
|
||||
|
||||
extern sem_t eeprom_write_sem;
|
||||
#if defined(PCBARM)
|
||||
extern Pio Pioa, Piob, Pioc;
|
||||
#undef PIOA
|
||||
#define PIOA (&Pioa)
|
||||
#undef PIOB
|
||||
#define PIOB (&Piob)
|
||||
#undef PIOC
|
||||
#define PIOC (&Pioc)
|
||||
extern uint32_t eeprom_pointer;
|
||||
extern char* eeprom_buffer_data;
|
||||
extern volatile int32_t eeprom_buffer_size;
|
||||
extern bool eeprom_read_operation;
|
||||
extern volatile uint32_t Spi_complete;
|
||||
#else
|
||||
#define PIOA 0
|
||||
#define PIOB 0
|
||||
#define PIOC 0
|
||||
#endif
|
||||
|
||||
#define loop_until_bit_is_set( port, bitnum) \
|
||||
while ( 0/*! ( (port) & (1 << (bitnum)) )*/ ) ;
|
||||
|
|
@ -218,6 +236,15 @@ extern sem_t eeprom_write_sem;
|
|||
#define WGM12 0
|
||||
#define CS10 0
|
||||
|
||||
#if defined(PCBARM)
|
||||
extern volatile uint32_t Tenms;
|
||||
extern uint32_t Master_frequency;
|
||||
#define NVIC_EnableIRQ(x)
|
||||
#define NVIC_DisableIRQ(x)
|
||||
#define __disable_irq()
|
||||
#define __enable_irq()
|
||||
#endif
|
||||
|
||||
extern volatile unsigned char pinb,pinc,pind,pine,ping,pinh,pinj,pinl;
|
||||
extern uint8_t portb, portc, porth, dummyport;
|
||||
extern uint16_t dummyport16;
|
||||
|
|
|
|||
33
src/simu.cpp
33
src/simu.cpp
|
|
@ -35,7 +35,6 @@
|
|||
#include "FXExpression.h"
|
||||
#include "FXPNGImage.h"
|
||||
#include <unistd.h>
|
||||
#include "simpgmspace.h"
|
||||
#include "fxkeys.h"
|
||||
#include "open9x.h"
|
||||
#include "menus.h"
|
||||
|
|
@ -273,25 +272,33 @@ void Open9xSim::refreshDiplay()
|
|||
}
|
||||
|
||||
if(hasFocus()) {
|
||||
static FXuint keys1[]={
|
||||
KEY_Return, INP_B_KEY_MEN, INP_P_KEY_MEN,
|
||||
KEY_Page_Up, INP_B_KEY_MEN, INP_P_KEY_MEN,
|
||||
KEY_KP_1, INP_B_KEY_MEN, INP_P_KEY_MEN,
|
||||
KEY_Page_Down, INP_B_KEY_EXT, INP_P_KEY_EXT,
|
||||
KEY_BackSpace, INP_B_KEY_EXT, INP_P_KEY_EXT,
|
||||
KEY_KP_0, INP_B_KEY_EXT, INP_P_KEY_EXT,
|
||||
KEY_Down, INP_B_KEY_DWN, INP_P_KEY_DWN,
|
||||
KEY_Up, INP_B_KEY_UP, INP_P_KEY_UP,
|
||||
KEY_Right, INP_B_KEY_RGT, INP_P_KEY_RGT,
|
||||
KEY_Left, INP_B_KEY_LFT, INP_P_KEY_LFT
|
||||
static uint64_t keys1[]={
|
||||
KEY_Return, INP_B_KEY_MEN, INP_P_KEY_MEN, (uint64_t)PIOB, 0x40,
|
||||
KEY_Page_Up, INP_B_KEY_MEN, INP_P_KEY_MEN, (uint64_t)PIOB, 0x40,
|
||||
KEY_KP_1, INP_B_KEY_MEN, INP_P_KEY_MEN, (uint64_t)PIOB, 0x40,
|
||||
KEY_Page_Down, INP_B_KEY_EXT, INP_P_KEY_EXT, (uint64_t)PIOA, 0x80000000,
|
||||
KEY_BackSpace, INP_B_KEY_EXT, INP_P_KEY_EXT, (uint64_t)PIOA, 0x80000000,
|
||||
KEY_KP_0, INP_B_KEY_EXT, INP_P_KEY_EXT, (uint64_t)PIOA, 0x80000000,
|
||||
KEY_Down, INP_B_KEY_DWN, INP_P_KEY_DWN, (uint64_t)PIOC, 0x10 >> 1,
|
||||
KEY_Up, INP_B_KEY_UP, INP_P_KEY_UP, (uint64_t)PIOC, 0x08 >> 1,
|
||||
KEY_Right, INP_B_KEY_RGT, INP_P_KEY_RGT, (uint64_t)PIOC, 0x20 >> 1,
|
||||
KEY_Left, INP_B_KEY_LFT, INP_P_KEY_LFT, (uint64_t)PIOC, 0x40 >> 1,
|
||||
};
|
||||
|
||||
pinb &= ~ 0x7e;
|
||||
pinl &= ~ 0x3f; // for v4
|
||||
for(unsigned i=0; i<DIM(keys1);i+=3) {
|
||||
#if defined(PCBARM)
|
||||
PIOC->PIO_PDSR = 0xFFFFFFFF;
|
||||
PIOB->PIO_PDSR = 0xFFFFFFFF;
|
||||
PIOA->PIO_PDSR = 0xFFFFFFFF;
|
||||
#endif
|
||||
for(unsigned i=0; i<DIM(keys1);i+=5) {
|
||||
if (getApp()->getKeyState(keys1[i])) {
|
||||
pinb |= (1<<keys1[i+1]);
|
||||
pinl |= (1<<keys1[i+2]);
|
||||
#if defined(PCBARM)
|
||||
((Pio*)keys1[i+3])->PIO_PDSR &= ~(keys1[i+4]);
|
||||
#endif
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue