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Merge branch 'bsongis/Taranis_audio_freeze' of https://github.com/opentx/opentx into next
This commit is contained in:
commit
624bab7826
9 changed files with 28 additions and 4 deletions
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@ -337,10 +337,15 @@ void AudioQueue::pushBuffer(AudioBuffer *buffer)
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{
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buffer->state = AUDIO_BUFFER_FILLED;
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if (dacQueue(buffer))
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buffer->state = AUDIO_BUFFER_PLAYING;
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__disable_irq();
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bufferWIdx = nextBufferIdx(bufferWIdx);
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if (dacQueue(buffer)) {
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buffer->state = AUDIO_BUFFER_PLAYING;
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}
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__enable_irq();
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}
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void mix(uint16_t * result, int sample, unsigned int fade)
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@ -108,7 +108,9 @@ ISR(TIMER1_COMPA_vect) //2MHz pulse generation (BLOCKING ISR)
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// Call setupPulses only after REST pulse had been sent.
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// Must do this before toggle PORTB to keep timing accurate
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if (IS_DSM2_SERIAL_PROTOCOL(s_current_protocol[0]) || *((uint16_t*)pulses2MHzRPtr) == 0) {
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OCR1A = SETUP_PULSES_DURATION;
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if (!IS_DSM2_SERIAL_PROTOCOL(s_current_protocol[0])) {
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OCR1A = SETUP_PULSES_DURATION;
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}
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setupPulses(); // does not sei() for setupPulsesPPM
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heartbeat |= HEART_TIMER_PULSES;
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return;
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@ -326,6 +326,7 @@ extern volatile uint32_t Tenms;
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extern uint32_t Master_frequency;
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#define NVIC_EnableIRQ(x)
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#define NVIC_DisableIRQ(x)
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#define NVIC_SetPriority(...)
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#define __disable_irq()
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#define __enable_irq()
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#endif
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@ -88,7 +88,9 @@ void dacInit()
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DAC->CR = DAC_CR_TEN1 | DAC_CR_EN1 ; // Enable DAC
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NVIC_SetPriority(DMA1_Stream5_IRQn, 2) ; // High priority interrupt
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NVIC_EnableIRQ(TIM6_DAC_IRQn) ; // TODO needed?
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NVIC_SetPriority(TIM6_DAC_IRQn, 7);
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NVIC_EnableIRQ(DMA1_Stream5_IRQn) ;
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NVIC_SetPriority(DMA1_Stream5_IRQn, 7);
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}
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bool dacQueue(AudioBuffer *buffer)
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@ -155,6 +155,7 @@ void init5msTimer()
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TIM14->CR1 = 5 ;
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TIM14->DIER |= 1 ;
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NVIC_EnableIRQ(TIM8_TRG_COM_TIM14_IRQn) ;
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NVIC_SetPriority(TIM8_TRG_COM_TIM14_IRQn, 7);
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}
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void stop5msTimer( void )
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@ -160,6 +160,7 @@ static void init_pa10_none()
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TIM1->DIER |= TIM_DIER_CC2IE ; // Enable this interrupt
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TIM1->CR1 |= TIM_CR1_CEN ;
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NVIC_EnableIRQ(TIM1_CC_IRQn) ;
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NVIC_SetPriority(TIM1_CC_IRQn, 7);
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}
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static void disable_pa10_none()
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@ -202,6 +203,7 @@ static void init_pa7_none()
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TIM8->DIER |= TIM_DIER_CC2IE ; // Enable this interrupt
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TIM8->CR1 |= TIM_CR1_CEN ;
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NVIC_EnableIRQ(TIM8_CC_IRQn) ;
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NVIC_SetPriority(TIM8_CC_IRQn, 7);
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}
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static void disable_pa7_none()
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@ -267,7 +269,8 @@ static void init_pa10_pxx()
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TIM1->SR &= ~TIM_SR_CC2IF ; // Clear flag
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TIM1->DIER |= TIM_DIER_CC2IE ; // Enable this interrupt
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TIM1->CR1 |= TIM_CR1_CEN ;
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NVIC_EnableIRQ(TIM1_CC_IRQn) ;
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NVIC_EnableIRQ(TIM1_CC_IRQn);
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NVIC_SetPriority(TIM1_CC_IRQn, 7);
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}
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static void disable_pa10_pxx()
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@ -316,7 +319,9 @@ static void init_pa10_ppm()
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TIM1->CR1 = TIM_CR1_CEN ;
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NVIC_EnableIRQ(TIM1_CC_IRQn) ;
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NVIC_SetPriority(TIM1_CC_IRQn, 7);
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NVIC_EnableIRQ(TIM1_UP_TIM10_IRQn) ;
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NVIC_SetPriority(TIM1_UP_TIM10_IRQn, 7);
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}
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static void disable_pa10_ppm()
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@ -428,6 +433,7 @@ static void init_pa7_pxx()
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TIM8->DIER |= TIM_DIER_CC2IE ; // Enable this interrupt
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TIM8->CR1 |= TIM_CR1_CEN ;
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NVIC_EnableIRQ(TIM8_CC_IRQn) ;
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NVIC_SetPriority(TIM8_CC_IRQn, 7);
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}
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static void disable_pa7_pxx()
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@ -501,6 +507,7 @@ static void init_pa7_dsm2()
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TIM8->DIER |= TIM_DIER_CC2IE ; // Enable this interrupt
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TIM8->CR1 |= TIM_CR1_CEN ;
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NVIC_EnableIRQ(TIM8_CC_IRQn) ;
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NVIC_SetPriority(TIM8_CC_IRQn, 7);
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}
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static void disable_pa7_dsm2()
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@ -555,7 +562,9 @@ static void init_pa7_ppm()
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TIM8->CR1 = TIM_CR1_CEN ;
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NVIC_EnableIRQ(TIM8_CC_IRQn) ;
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NVIC_SetPriority(TIM8_CC_IRQn, 7);
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NVIC_EnableIRQ(TIM8_UP_TIM13_IRQn) ;
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NVIC_SetPriority(TIM8_UP_TIM13_IRQn, 7);
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}
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static void disable_pa7_ppm()
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@ -78,6 +78,7 @@ void sportInit(void)
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USART_ITConfig(SPORT, USART_IT_RXNE, ENABLE);
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NVIC_EnableIRQ(USART2_IRQn);
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NVIC_SetPriority(USART2_IRQn, 6);
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}
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void sportPutc(const char c)
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@ -71,6 +71,7 @@ void init_trainer_ppm()
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TIM3->CR1 = TIM_CR1_CEN ;
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NVIC_EnableIRQ(TIM3_IRQn) ;
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NVIC_SetPriority(TIM3_IRQn, 7);
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}
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// TODO - testing
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@ -99,6 +100,7 @@ void init_trainer_capture()
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TIM3->DIER |= TIM_DIER_CC3IE ;
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TIM3->CR1 = TIM_CR1_CEN ;
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NVIC_EnableIRQ(TIM3_IRQn) ;
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NVIC_SetPriority(TIM3_IRQn, 7);
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}
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void stop_trainer_capture()
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@ -69,6 +69,7 @@ void uartInit(uint32_t baudrate)
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USART_ITConfig(UART3, USART_IT_TXE, DISABLE);
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NVIC_EnableIRQ(USART3_IRQn);
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NVIC_SetPriority(USART3_IRQn, 8);
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}
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#if defined(DEBUG)
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