1
0
Fork 0
mirror of https://github.com/opentx/opentx.git synced 2025-07-16 12:55:12 +03:00

Switch refactoring continued

This commit is contained in:
3djc 2019-05-27 07:55:36 +02:00
parent b7929451cc
commit 6870a152e7

View file

@ -384,71 +384,110 @@ enum SwitchSources {
SWSRC_SD1,
SWSRC_SD2,
#endif
#if defined(PCBHORUS) || defined(PCBX9D) || defined(PCBX9DP) || defined(PCBX9E) || defined(PCBXLITES)
#if defined(HARDWARE_SWITCH_E)
SWSRC_SE0,
SWSRC_SE1,
SWSRC_SE2,
#endif
#if defined(PCBHORUS) || defined(PCBX9D) || defined(PCBX9DP) || defined(PCBX9E) || defined(PCBX7) || defined(PCBXLITES)
#if defined(HARDWARE_SWITCH_F)
SWSRC_SF0,
SWSRC_SF1,
SWSRC_SF2,
#endif
#if defined(PCBHORUS) || defined(PCBX9D) || defined(PCBX9DP) || defined(PCBX9E)
#if defined(HARDWARE_SWITCH_G)
SWSRC_SG0,
SWSRC_SG1,
SWSRC_SG2,
#endif
#if defined(PCBHORUS) || defined(PCBX9D) || defined(PCBX9DP) || defined(PCBX9E) || defined(PCBX7)
#if defined(HARDWARE_SWITCH_H)
SWSRC_SH0,
SWSRC_SH1,
SWSRC_SH2,
#endif
#if defined(PCBX7)
#if defined(HARDWARE_SWITCH_I)
SWSRC_SI0,
SWSRC_SI1,
SWSRC_SI2,
#endif
#if defined(HARDWARE_SWITCH_J)
SWSRC_SJ0,
SWSRC_SJ1,
SWSRC_SJ2,
#endif
#if defined(PCBX9E)
#if defined(HARDWARE_SWITCH_I)
SWSRC_SI0,
SWSRC_SI1,
SWSRC_SI2,
#endif
#if defined(HARDWARE_SWITCH_J)
SWSRC_SJ0,
SWSRC_SJ1,
SWSRC_SJ2,
#endif
#if defined(HARDWARE_SWITCH_K)
SWSRC_SK0,
SWSRC_SK1,
SWSRC_SK2,
#endif
#if defined(HARDWARE_SWITCH_L)
SWSRC_SL0,
SWSRC_SL1,
SWSRC_SL2,
#endif
#if defined(HARDWARE_SWITCH_M)
SWSRC_SM0,
SWSRC_SM1,
SWSRC_SM2,
#endif
#if defined(HARDWARE_SWITCH_N)
SWSRC_SN0,
SWSRC_SN1,
SWSRC_SN2,
#endif
#if defined(HARDWARE_SWITCH_O)
SWSRC_SO0,
SWSRC_SO1,
SWSRC_SO2,
#endif
#if defined(HARDWARE_SWITCH_P)
SWSRC_SP0,
SWSRC_SP1,
SWSRC_SP2,
#endif
#if defined(HARDWARE_SWITCH_Q)
SWSRC_SQ0,
SWSRC_SQ1,
SWSRC_SQ2,
#endif
#if defined(HARDWARE_SWITCH_R)
SWSRC_SR0,
SWSRC_SR1,
SWSRC_SR2,
#endif
#if defined(PCBHORUS)
#if defined(HARDWARE_SWITCH_GMBL)
SWSRC_GMBL0,
SWSRC_GMBL1,
SWSRC_GMBL2,
#endif
#if defined(HARDWARE_SWITCH_GMBR)
SWSRC_GMBR0,
SWSRC_GMBR1,
SWSRC_GMBR2,