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Fixes #1436 - Be careful, there is a conversion on M128/gruvin9x boards,

L13, L14 and L15 are removed
This commit is contained in:
bsongis 2014-07-04 12:22:28 +02:00
parent b8a6548686
commit 711b54c98e
13 changed files with 10 additions and 29 deletions

View file

@ -19,7 +19,7 @@
#define MAX_MIXERS(board, version) (IS_ARM(board) ? 64 : 32)
#define MAX_CHANNELS(board, version) (IS_ARM(board) ? 32 : 16)
#define MAX_EXPOS(board, version) (IS_ARM(board) ? ((IS_TARANIS(board) && version >= 216) ? 64 : 32) : (IS_DBLRAM(board, version) ? 16 : 14))
#define MAX_CUSTOM_SWITCHES(board, version) (IS_ARM(board) ? 32 : (IS_DBLEEPROM(board, version) ? 15 : 12))
#define MAX_CUSTOM_SWITCHES(board, version) (IS_ARM(board) ? 32 : ((IS_DBLEEPROM(board, version) && version<217) ? 15 : 12))
#define MAX_CUSTOM_FUNCTIONS(board, version) (IS_ARM(board) ? (version >= 216 ? 64 : 32) : (IS_DBLEEPROM(board, version) ? 24 : 16))
#define MAX_CURVES(board, version) (IS_ARM(board) ? ((IS_TARANIS(board) && version >= 216) ? 32 : 16) : O9X_MAX_CURVES)
#define MAX_GVARS(board, version) ((IS_ARM(board) && version >= 216) ? 9 : 5)

View file

@ -369,10 +369,10 @@ int OpenTxEepromInterface::save(uint8_t *eeprom, RadioData &radioData, uint32_t
break;
case BOARD_GRUVIN9X:
case BOARD_MEGA2560:
version = 216;
version = 217;
break;
case BOARD_M128:
version = 216;
version = 217;
break;
case BOARD_STOCK:
version = 216;
@ -561,8 +561,6 @@ int OpenTxFirmware::getCapability(const Capability capability)
case LogicalSwitches:
if (IS_ARM(board))
return 32;
else if (board==BOARD_GRUVIN9X||board==BOARD_M128)
return 15;
else
return 12;
case CustomAndSwitches:
@ -876,6 +874,9 @@ bool OpenTxEepromInterface::checkVersion(unsigned int version)
case 216:
// A lot of things (first github release)
break;
case 217:
// 3 logical switches removed on M128 / gruvin9x boards
break;
default:
return false;
}

View file

@ -58,10 +58,10 @@
#define EEPROM_VER 216
#define FIRST_CONV_EEPROM_VER 215
#elif defined(CPUM2560) || defined(CPUM2561)
#define EEPROM_VER 216
#define EEPROM_VER 217
#define FIRST_CONV_EEPROM_VER EEPROM_VER
#elif defined(CPUM128)
#define EEPROM_VER 216
#define EEPROM_VER 217
#else
#define EEPROM_VER 216
#endif
@ -108,7 +108,7 @@
#define MAX_FLIGHT_MODES 6
#define MAX_MIXERS 32
#define MAX_EXPOS 16
#define NUM_LOGICAL_SWITCH 15 // number of custom switches
#define NUM_LOGICAL_SWITCH 12 // number of custom switches
#define NUM_CFN 24 // number of functions assigned to switches
#define NUM_TRAINER 8
#define NUM_POTS 3
@ -119,7 +119,7 @@
#define MAX_FLIGHT_MODES 5
#define MAX_MIXERS 32
#define MAX_EXPOS 14
#define NUM_LOGICAL_SWITCH 15 // number of custom switches
#define NUM_LOGICAL_SWITCH 12 // number of custom switches
#define NUM_CFN 24 // number of functions assigned to switches
#define NUM_TRAINER 8
#define NUM_POTS 3

View file

@ -420,8 +420,6 @@
#if defined(CPUARM)
#define TR_LOGICALSW "L1\0""L2\0""L3\0""L4\0""L5\0""L6\0""L7\0""L8\0""L9\0""L10""L11""L12""L13""L14""L15""L16""L17""L18""L19""L20""L21""L22""L23""L24""L25""L26""L27""L28""L29""L30""L31""L32"
#elif defined(PCBGRUVIN9X) || defined(CPUM2561) || defined(CPUM128)
#define TR_LOGICALSW "L1\0""L2\0""L3\0""L4\0""L5\0""L6\0""L7\0""L8\0""L9\0""L10""L11""L12""L13""L14""L15"
#else
#define TR_LOGICALSW "L1\0""L2\0""L3\0""L4\0""L5\0""L6\0""L7\0""L8\0""L9\0""L10""L11""L12"
#endif

View file

@ -420,8 +420,6 @@
#if defined(CPUARM)
#define TR_LOGICALSW "L1\0""L2\0""L3\0""L4\0""L5\0""L6\0""L7\0""L8\0""L9\0""L10""L11""L12""L13""L14""L15""L16""L17""L18""L19""L20""L21""L22""L23""L24""L25""L26""L27""L28""L29""L30""L31""L32"
#elif defined(PCBGRUVIN9X) || defined(CPUM2561) || defined(CPUM128)
#define TR_LOGICALSW "L1\0""L2\0""L3\0""L4\0""L5\0""L6\0""L7\0""L8\0""L9\0""L10""L11""L12""L13""L14""L15"
#else
#define TR_LOGICALSW "L1\0""L2\0""L3\0""L4\0""L5\0""L6\0""L7\0""L8\0""L9\0""L10""L11""L12"
#endif

View file

@ -420,8 +420,6 @@
#if defined(CPUARM)
#define TR_LOGICALSW "L1\0""L2\0""L3\0""L4\0""L5\0""L6\0""L7\0""L8\0""L9\0""L10""L11""L12""L13""L14""L15""L16""L17""L18""L19""L20""L21""L22""L23""L24""L25""L26""L27""L28""L29""L30""L31""L32"
#elif defined(PCBGRUVIN9X) || defined(CPUM2561) || defined(CPUM128)
#define TR_LOGICALSW "L1\0""L2\0""L3\0""L4\0""L5\0""L6\0""L7\0""L8\0""L9\0""L10""L11""L12""L13""L14""L15"
#else
#define TR_LOGICALSW "L1\0""L2\0""L3\0""L4\0""L5\0""L6\0""L7\0""L8\0""L9\0""L10""L11""L12"
#endif

View file

@ -420,8 +420,6 @@
#if defined(CPUARM)
#define TR_LOGICALSW "L1\0""L2\0""L3\0""L4\0""L5\0""L6\0""L7\0""L8\0""L9\0""L10""L11""L12""L13""L14""L15""L16""L17""L18""L19""L20""L21""L22""L23""L24""L25""L26""L27""L28""L29""L30""L31""L32"
#elif defined(PCBGRUVIN9X) || defined(CPUM2561) || defined(CPUM128)
#define TR_LOGICALSW "L1\0""L2\0""L3\0""L4\0""L5\0""L6\0""L7\0""L8\0""L9\0""L10""L11""L12""L13""L14""L15"
#else
#define TR_LOGICALSW "L1\0""L2\0""L3\0""L4\0""L5\0""L6\0""L7\0""L8\0""L9\0""L10""L11""L12"
#endif

View file

@ -420,8 +420,6 @@
#if defined(CPUARM)
#define TR_LOGICALSW "L1\0""L2\0""L3\0""L4\0""L5\0""L6\0""L7\0""L8\0""L9\0""L10""L11""L12""L13""L14""L15""L16""L17""L18""L19""L20""L21""L22""L23""L24""L25""L26""L27""L28""L29""L30""L31""L32"
#elif defined(PCBGRUVIN9X) || defined(CPUM2561) || defined(CPUM128)
#define TR_LOGICALSW "L1\0""L2\0""L3\0""L4\0""L5\0""L6\0""L7\0""L8\0""L9\0""L10""L11""L12""L13""L14""L15"
#else
#define TR_LOGICALSW "L1\0""L2\0""L3\0""L4\0""L5\0""L6\0""L7\0""L8\0""L9\0""L10""L11""L12"
#endif

View file

@ -420,8 +420,6 @@
#if defined(CPUARM)
#define TR_LOGICALSW "L1\0""L2\0""L3\0""L4\0""L5\0""L6\0""L7\0""L8\0""L9\0""L10""L11""L12""L13""L14""L15""L16""L17""L18""L19""L20""L21""L22""L23""L24""L25""L26""L27""L28""L29""L30""L31""L32"
#elif defined(PCBGRUVIN9X) || defined(CPUM2561) || defined(CPUM128)
#define TR_LOGICALSW "L1\0""L2\0""L3\0""L4\0""L5\0""L6\0""L7\0""L8\0""L9\0""L10""L11""L12""L13""L14""L15"
#else
#define TR_LOGICALSW "L1\0""L2\0""L3\0""L4\0""L5\0""L6\0""L7\0""L8\0""L9\0""L10""L11""L12"
#endif

View file

@ -420,8 +420,6 @@
#if defined(CPUARM)
#define TR_LOGICALSW "L1\0""L2\0""L3\0""L4\0""L5\0""L6\0""L7\0""L8\0""L9\0""L10""L11""L12""L13""L14""L15""L16""L17""L18""L19""L20""L21""L22""L23""L24""L25""L26""L27""L28""L29""L30""L31""L32"
#elif defined(PCBGRUVIN9X) || defined(CPUM2561) || defined(CPUM128)
#define TR_LOGICALSW "L1\0""L2\0""L3\0""L4\0""L5\0""L6\0""L7\0""L8\0""L9\0""L10""L11""L12""L13""L14""L15"
#else
#define TR_LOGICALSW "L1\0""L2\0""L3\0""L4\0""L5\0""L6\0""L7\0""L8\0""L9\0""L10""L11""L12"
#endif

View file

@ -420,8 +420,6 @@
#if defined(CPUARM)
#define TR_LOGICALSW "L1\0""L2\0""L3\0""L4\0""L5\0""L6\0""L7\0""L8\0""L9\0""L10""L11""L12""L13""L14""L15""L16""L17""L18""L19""L20""L21""L22""L23""L24""L25""L26""L27""L28""L29""L30""L31""L32"
#elif defined(PCBGRUVIN9X) || defined(CPUM2561) || defined(CPUM128)
#define TR_LOGICALSW "L1\0""L2\0""L3\0""L4\0""L5\0""L6\0""L7\0""L8\0""L9\0""L10""L11""L12""L13""L14""L15"
#else
#define TR_LOGICALSW "L1\0""L2\0""L3\0""L4\0""L5\0""L6\0""L7\0""L8\0""L9\0""L10""L11""L12"
#endif

View file

@ -420,8 +420,6 @@
#if defined(CPUARM)
#define TR_LOGICALSW "L1\0""L2\0""L3\0""L4\0""L5\0""L6\0""L7\0""L8\0""L9\0""L10""L11""L12""L13""L14""L15""L16""L17""L18""L19""L20""L21""L22""L23""L24""L25""L26""L27""L28""L29""L30""L31""L32"
#elif defined(PCBGRUVIN9X) || defined(CPUM2561) || defined(CPUM128)
#define TR_LOGICALSW "L1\0""L2\0""L3\0""L4\0""L5\0""L6\0""L7\0""L8\0""L9\0""L10""L11""L12""L13""L14""L15"
#else
#define TR_LOGICALSW "L1\0""L2\0""L3\0""L4\0""L5\0""L6\0""L7\0""L8\0""L9\0""L10""L11""L12"
#endif

View file

@ -420,8 +420,6 @@
#if defined(CPUARM)
#define TR_LOGICALSW "L1\0""L2\0""L3\0""L4\0""L5\0""L6\0""L7\0""L8\0""L9\0""L10""L11""L12""L13""L14""L15""L16""L17""L18""L19""L20""L21""L22""L23""L24""L25""L26""L27""L28""L29""L30""L31""L32"
#elif defined(PCBGRUVIN9X) || defined(CPUM2561) || defined(CPUM128)
#define TR_LOGICALSW "L1\0""L2\0""L3\0""L4\0""L5\0""L6\0""L7\0""L8\0""L9\0""L10""L11""L12""L13""L14""L15"
#else
#define TR_LOGICALSW "L1\0""L2\0""L3\0""L4\0""L5\0""L6\0""L7\0""L8\0""L9\0""L10""L11""L12"
#endif