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Taranis external module fix
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parent
8cd50725fa
commit
7b5b7c6d54
8 changed files with 25 additions and 22 deletions
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@ -119,11 +119,7 @@ void setupPulsesPXX(uint8_t module)
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void setupPulsesPXX2(uint8_t module)
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void setupPulsesPXX2(uint8_t module)
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{
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{
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if (module == INTERNAL_MODULE) {
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modulePulsesData[module].pxx2.setupFrame(module);
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if (modulePulsesData[module].pxx2.setupFrame(module)) {
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intmoduleSendNextPXX2Frame();
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}
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}
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#if 0
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#if 0
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// here we have to wait that telemetryInit() is called, hence this test
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// here we have to wait that telemetryInit() is called, hence this test
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@ -281,7 +277,7 @@ void setupPulses(uint8_t module, uint8_t protocol)
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}
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}
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}
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}
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void setupPulses(uint8_t module)
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bool setupPulses(uint8_t module)
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{
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{
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uint8_t required_protocol = getRequiredProtocol(module);
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uint8_t required_protocol = getRequiredProtocol(module);
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@ -291,9 +287,11 @@ void setupPulses(uint8_t module)
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disablePulses(module, moduleSettings[module].protocol);
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disablePulses(module, moduleSettings[module].protocol);
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moduleSettings[module].protocol = required_protocol;
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moduleSettings[module].protocol = required_protocol;
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enablePulses(module, required_protocol);
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enablePulses(module, required_protocol);
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return false;
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}
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}
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else {
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else {
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setupPulses(module, required_protocol);
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setupPulses(module, required_protocol);
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return true;
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}
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}
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}
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}
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@ -161,7 +161,7 @@ union TrainerPulsesData {
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extern TrainerPulsesData trainerPulsesData;
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extern TrainerPulsesData trainerPulsesData;
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void setupPulses(uint8_t module);
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bool setupPulses(uint8_t module);
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void setupPulsesDSM2(uint8_t module);
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void setupPulsesDSM2(uint8_t module);
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void setupPulsesCrossfire(uint8_t module);
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void setupPulsesCrossfire(uint8_t module);
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void setupPulsesMultimodule(uint8_t module);
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void setupPulsesMultimodule(uint8_t module);
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@ -94,7 +94,7 @@ extern "C" void INTMODULE_USART_IRQHandler(void)
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}
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}
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}
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}
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void intmoduleSendNextPXX2Frame()
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void intmoduleSendNextFrame()
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{
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{
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if (moduleSettings[INTERNAL_MODULE].protocol == PROTOCOL_CHANNELS_PXX2) {
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if (moduleSettings[INTERNAL_MODULE].protocol == PROTOCOL_CHANNELS_PXX2) {
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DMA_InitTypeDef DMA_InitStructure;
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DMA_InitTypeDef DMA_InitStructure;
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@ -288,6 +288,6 @@ extern "C" void EXTMODULE_TIMER_IRQHandler()
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{
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{
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EXTMODULE_TIMER->DIER &= ~TIM_DIER_CC2IE; // Stop this interrupt
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EXTMODULE_TIMER->DIER &= ~TIM_DIER_CC2IE; // Stop this interrupt
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EXTMODULE_TIMER->SR &= ~TIM_SR_CC2IF;
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EXTMODULE_TIMER->SR &= ~TIM_SR_CC2IF;
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setupPulses(EXTERNAL_MODULE);
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if (setupPulses(EXTERNAL_MODULE))
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extmoduleSendNextFrame();
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extmoduleSendNextFrame();
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}
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}
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@ -183,7 +183,7 @@ void init_no_pulses(uint8_t module);
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void disable_no_pulses(uint8_t module);
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void disable_no_pulses(uint8_t module);
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void init_ppm(uint8_t module);
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void init_ppm(uint8_t module);
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void disable_ppm(uint8_t module);
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void disable_ppm(uint8_t module);
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void intmoduleSendNextPXX2Frame();
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void intmoduleSendNextFrame();
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void init_pxx2(uint8_t module);
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void init_pxx2(uint8_t module);
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void disable_pxx2(uint8_t module);
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void disable_pxx2(uint8_t module);
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void init_pxx(uint8_t module);
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void init_pxx(uint8_t module);
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@ -94,6 +94,9 @@ void extmodulePpmStart()
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EXTMODULE_TIMER->EGR = 1;
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EXTMODULE_TIMER->EGR = 1;
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EXTMODULE_TIMER->DIER |= TIM_DIER_UDE;
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EXTMODULE_TIMER->DIER |= TIM_DIER_UDE;
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EXTMODULE_TIMER->CCMR1 = TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC2PE; // PWM mode 1
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EXTMODULE_TIMER->CCMR1 = TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC2PE; // PWM mode 1
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EXTMODULE_TIMER->SR &= ~TIM_SR_CC2IF; // Clear flag
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EXTMODULE_TIMER->CCR2 = 40000; // The first frame will be sent in 20ms
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EXTMODULE_TIMER->DIER |= TIM_DIER_CC2IE; // Enable this interrupt
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EXTMODULE_TIMER->CR1 |= TIM_CR1_CEN;
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EXTMODULE_TIMER->CR1 |= TIM_CR1_CEN;
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NVIC_EnableIRQ(EXTMODULE_TIMER_DMA_STREAM_IRQn);
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NVIC_EnableIRQ(EXTMODULE_TIMER_DMA_STREAM_IRQn);
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@ -126,6 +129,9 @@ void extmoduleSerialStart(uint32_t /*baudrate*/, uint32_t period_half_us)
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EXTMODULE_TIMER->EGR = 1; // Restart
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EXTMODULE_TIMER->EGR = 1; // Restart
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EXTMODULE_TIMER->DIER |= TIM_DIER_UDE; // Enable DMA on update
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EXTMODULE_TIMER->DIER |= TIM_DIER_UDE; // Enable DMA on update
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EXTMODULE_TIMER->CCMR1 = TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0;
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EXTMODULE_TIMER->CCMR1 = TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0;
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EXTMODULE_TIMER->SR &= ~TIM_SR_CC2IF; // Clear flag
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EXTMODULE_TIMER->CCR2 = 40000; // The first frame will be sent in 20ms
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EXTMODULE_TIMER->DIER |= TIM_DIER_CC2IE; // Enable this interrupt
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EXTMODULE_TIMER->CR1 |= TIM_CR1_CEN;
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EXTMODULE_TIMER->CR1 |= TIM_CR1_CEN;
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NVIC_EnableIRQ(EXTMODULE_TIMER_DMA_STREAM_IRQn);
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NVIC_EnableIRQ(EXTMODULE_TIMER_DMA_STREAM_IRQn);
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@ -224,6 +230,9 @@ void extmodulePxxStart()
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EXTMODULE_TIMER->EGR = 1; // Restart
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EXTMODULE_TIMER->EGR = 1; // Restart
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EXTMODULE_TIMER->DIER |= TIM_DIER_UDE; // Enable DMA on update
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EXTMODULE_TIMER->DIER |= TIM_DIER_UDE; // Enable DMA on update
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EXTMODULE_TIMER->CCMR1 = TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2;
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EXTMODULE_TIMER->CCMR1 = TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2;
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EXTMODULE_TIMER->SR &= ~TIM_SR_CC2IF; // Clear flag
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EXTMODULE_TIMER->CCR2 = 40000; // The first frame will be sent in 20ms
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EXTMODULE_TIMER->DIER |= TIM_DIER_CC2IE; // Enable this interrupt
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EXTMODULE_TIMER->CR1 |= TIM_CR1_CEN;
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EXTMODULE_TIMER->CR1 |= TIM_CR1_CEN;
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NVIC_EnableIRQ(EXTMODULE_TIMER_DMA_STREAM_IRQn);
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NVIC_EnableIRQ(EXTMODULE_TIMER_DMA_STREAM_IRQn);
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@ -315,6 +324,7 @@ extern "C" void EXTMODULE_TIMER_CC_IRQHandler()
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{
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{
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EXTMODULE_TIMER->DIER &= ~TIM_DIER_CC2IE; // Stop this interrupt
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EXTMODULE_TIMER->DIER &= ~TIM_DIER_CC2IE; // Stop this interrupt
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EXTMODULE_TIMER->SR &= ~TIM_SR_CC2IF;
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EXTMODULE_TIMER->SR &= ~TIM_SR_CC2IF;
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setupPulses(EXTERNAL_MODULE);
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if (setupPulses(EXTERNAL_MODULE)) {
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extmoduleSendNextFrame();
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extmoduleSendNextFrame();
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}
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}
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}
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@ -97,11 +97,6 @@ void intmodulePxx2Start()
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// TODO
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// TODO
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}
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}
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void intmoduleSendNextPXX2Frame()
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{
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// TODO
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}
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void intmodulePxxStart()
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void intmodulePxxStart()
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{
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{
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INTERNAL_MODULE_ON();
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INTERNAL_MODULE_ON();
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@ -186,6 +181,6 @@ extern "C" void INTMODULE_TIMER_CC_IRQHandler()
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{
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{
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INTMODULE_TIMER->DIER &= ~TIM_DIER_CC2IE; // Stop this interrupt
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INTMODULE_TIMER->DIER &= ~TIM_DIER_CC2IE; // Stop this interrupt
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INTMODULE_TIMER->SR &= ~TIM_SR_CC2IF;
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INTMODULE_TIMER->SR &= ~TIM_SR_CC2IF;
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setupPulses(INTERNAL_MODULE);
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if (setupPulses(INTERNAL_MODULE))
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intmoduleSendNextFrame();
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intmoduleSendNextFrame();
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}
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}
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@ -82,8 +82,8 @@ void sendSynchronousPulses()
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{
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{
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for (uint8_t module = 0; module < NUM_MODULES; module++) {
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for (uint8_t module = 0; module < NUM_MODULES; module++) {
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uint8_t protocol = moduleSettings[module].protocol;
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uint8_t protocol = moduleSettings[module].protocol;
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if (isProtocolSynchronous(protocol)) {
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if (isProtocolSynchronous(protocol) && setupPulses(module)) {
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setupPulses(module);
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intmoduleSendNextFrame();
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}
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}
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}
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}
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}
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}
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